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the fuse driver looks for vdd_fuse during its init
process in order to burn fuses
Bug 836973
Original-Change-Id: Ia5008b2a08f6fc00d3ffc8e2b198efbd4bbd62fc
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/43908
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Re017e9bd5f391381fedb0bd9681a4d1f09c47e99
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Set LP0 as default suspend_mode for Enterprise and 1197.
Set LP1 as suspend_mode for Enterprise A01.
BUG 861362
Original-Change-Id: I2c0fdbe38b074528accf9c55a780f00c17074373
Reviewed-on: http://git-master/r/45871
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rc85f78a9d7df6531f779e33f42847b7c246b8052
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Add board support needed for PMU switch off when tsensor
detects temperature > TH3 threshold set.
bug 850047
Original-Change-Id: I7a283cedc735264dd8ea52801f7f1a103e9293cb
Reviewed-on: http://git-master/r/41531
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rc4bf2206a7207e28434b46baed442cd6f2797fbc
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Added EDP support for Enterprise board via ext temp sensor nct1008
Bug 824621
Original-Change-Id: I476b9ad2cb46620d4775e6ee6e102b45f2b4dc27
Reviewed-on: http://git-master/r/43144
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rd0a03e8e8786fc76dd57149d9df315d084072cae
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Bug 853132
Original-Change-Id: Ib3f05a14060381bb8c39ac4920073976867226d4
Reviewed-on: http://git-master/r/42787
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Tested-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: Re36d5aa76c6001ba7f46822bcc20bd41bc781928
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modify enterprise board files to add support for ov9726
bug 829399
Original-Change-Id: I9ebbb9926820d9209224906d2a3aa8dcde072a12
Reviewed-on: http://git-master/r/40467
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rb444bad59ae0f7ce83b79c8326175fa15964d069
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Added the board level suspend/resume and call the console
suspend from board level suspend/resume.
bug 820536
Original-Change-Id: I246265241246dc0682870571c927bd23023e5aca
Reviewed-on: http://git-master/r/41448
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Rebase-Id: Re1f3dd4f75ee05456899d9a67f74ae84f9572654
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Add flash device to I2C bus 2.
Add power sequence for flash device.
Bug 844017
Original-Change-Id: Ieda304825ebbb87f61a11045f0b8be4272467588
Reviewed-on: http://git-master/r/40692
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Tested-by: Jihoon Bang <jbang@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R04353dd51b680715578f2c1594e0f474b37530a6
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Add separate power sequence and ID to rear sensors.
It will allow them to operate independently.
Bug 844021
Original-Change-Id: Iaf3399ea4c70999d1c8ea432f2df10c078e86004
Reviewed-on: http://git-master/r/40386
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Jihoon Bang <jbang@nvidia.com>
Tested-by: Jihoon Bang <jbang@nvidia.com>
Rebase-Id: R4bbc3008be78ea2fba63926fafedaea5b54cc4b3
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Adding public definition in the 80031 header so that client
can used directly in place of defining at client level.
Original-Change-Id: Ifb64e0ffc83bc29c470d08a49d0915613a677537
Reviewed-on: http://git-master/r/40208
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R981610616a78797050538c2a4eb5160ea11384c8
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Making VIO and SMP3 to be always on as these are parent to some
other rails.
This is software workaround avoid recursive locking when doing the
regulator disable/enable in notifier_call_chain of regulator
core driver.
bug 845849
Original-Change-Id: I9e1de53e86a0c8aeafd88b6e10d2245283fb7660
Reviewed-on: http://git-master/r/39130
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: Rd29727335ccac915bb54a9f20b35a995f3775fba
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Configuring the regulator SMPS1 output such that output of
regulator SMPS1 is controlled by the input peripheral power
request signal PREQ2.
bug 839809
bug 829405
Original-Change-Id: I352feb47444077af4a3da2d0a321feb1f3d8a9a0
Reviewed-on: http://git-master/r/39118
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Rebase-Id: Re0019fef9cc5789b184c2f5704e8a93abc56b5e5
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Adding VBUS regulator information to activate the VBUS.
bug 833736
Original-Change-Id: I1cf4c2eb112a6ea26b74c3d1a2754019a47533fd
Reviewed-on: http://git-master/r/38500
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Rebase-Id: R1bf2e329910d76bde5f0897f1f84147d1db1952a
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Board changes needed to enable TI PMU 80031 RTC
on enterprise are added.
bug 833336
Original-Change-Id: Ic2d2374ed6bff773964bd7bf6b81c69feda2d9b1
Reviewed-on: http://git-master/r/34457
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: Raa8d932bdbd4586201160e4070077b59ce5f55cc
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Board related changes, needed to turn off the device,
are being addded.
bug 833661
Original-Change-Id: Ia5f5f69fc19367995e6ad988a185825bd7b4d969
Reviewed-on: http://git-master/r/36670
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: Reaa3eb086baabd1d3b37a86555c7d2cfcb2eea68
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The PMU generates interrupt as active low. So configuring the
Power management unit to have the active low interrupt from PMU_INT
pin.
bug 839238
Original-Change-Id: I69e5cfb756d3b9e39fe7515cf8126753800cda03
Reviewed-on: http://git-master/r/37670
Tested-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Tested-by: Venu Byravarasu <vbyravarasu@nvidia.com>
Rebase-Id: R4e0d333cc9dc2186ecc8b651c127912964769ff9
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Rebase-Id: R0ce2f32451e4fdef46917bd4a6c54b979c24d258
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Suspend support for enterprise board added with following changes -
1. suspend initialization for enterprise added
2. tegra suspend platform data - corereq_high polarity for
enterprise board corrected. timer parameters matched with
cardhu settings.
Bug 826737
Change-Id: Ie4ee0d436ccb1ec83cf60b116fa66b015366d134
Reviewed-on: http://git-master/r/32413
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R9c00530272bf5bba50a960802c5b89519c08c70e
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Filling the supply names for all regulator based on power diagram/
schematic of enterprise board.
bug 830124
Change-Id: I69288ef742acca7e7011f41c918e9ddab5a0032d
Reviewed-on: http://git-master/r/34422
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Mohit Singh <mpsingh@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Rebase-Id: R4ecc9cd5bc81e3c0271528ee71ddacde7e5e3f7c
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Enable mpu and isl & proxy sensors for enterprise board
Bug 827932
Change-Id: I735790f722b143ac654b5f8c0b1d4b3914e693d9
Reviewed-on: http://git-master/r/31879
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R7c2d4d8b434670769c6f09f55f364799335d0d53
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There is independent driver for the pmu tps80031 and so updating the
power rail information based on this driver. Also registering
the tps80031 device.
bug 830904
Change-Id: I98b6ed382dd8b849bd44015f2a2e39e7326cd4a9
Reviewed-on: http://git-master/r/32958
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R6af201cae368b97e658f6eff8851760f77cebe2d
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Providing the clock init platform data to mpu80031 driver to support
the 32KHz clock generation.
bug 829520
Change-Id: I0f8912fcf5f938b8f238853a48cf411c7fd9fc78
Reviewed-on: http://git-master/r/32596
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
Rebase-Id: R63cc0c6ea4967775524e57924b89319fd90ef6c5
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Adding the board file for power and
enabling the TI 6025 pmu driver.
Original-Change-Id: I4676223599877ca51d892b373bcae03778c25f57
Reviewed-on: http://git-master/r/28668
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Change-Id: I5ee27c2aa99075960b3255fb7a9dbae397e3b71d
Rebase-Id: R7fda12e3247fa1e7769198113e8c883a1c1b6e09
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