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path: root/arch/arm/mach-tegra/board.h
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2012-12-17arm: tegra: display: handle fbmem2 cmdline parameterJong Kim
Parse and handle fbmem2 cmdline parameter. bug 1175957 Change-Id: I0933825371bf13782e9f4364a4dba078929ae836 Signed-off-by: Jong Kim <jongk@nvidia.com> Reviewed-on: http://git-master/r/170662 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2012-12-17arm: tegra: display: provide framebuffer clear functionJong Kim
Add tegra_clear_framebuffer function. bug 1175957 Change-Id: I12c249e011ecd839bbe9c5371b8be6e8a4b27bba Signed-off-by: Jong Kim <jongk@nvidia.com> Reviewed-on: http://git-master/r/170661 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2012-09-05ARM: tegra: enterprise: enable wl18xx wireless module supportRakesh Goyal
Bug 990784 Change-Id: I173df3f7244e7d0b40ae5aad98c72885ff42fdab Signed-off-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-on: http://git-master/r/129103 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-06-19arm: tegra: Fix cpu governor change issuePuneet Saxena
It fixes the issue where cpu governor change was inconsistent across platforms. In T2x, AUTO HOTPLUG is disabled therefore we need to store/restore gov for all online cpus across LP0 cycle. In T3x, AUTO HOTPLUG is enabled therefore storing/restoring gov for Cpu0 across LP0 cycle. Cpu0 remains online in suspend and resume. bug 991081 Change-Id: I167654aa21e4832b3fdc40e3d388a4d3f984632b Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: http://git-master/r/105404 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-21arm: tegra: governor: change governor using cpufreq interfacePuneet Saxena
Older code sets "conservative" governor in early-suspend using sysfs entries.This implementation changes governor in early-suspend using cpufreq interfaces. bug 871958 Change-Id: I721afb6184982a063dc5f330da31f8fb88481cfd Signed-off-by: Puneet Saxena <puneets@nvidia.com> Reviewed-on: http://git-master/r/100849 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-30arch: arm: tegra: Add support for marvell 8797Nitin Bindal
If bootloader specify that marvell wifi chip is present on the board, then create marvell wifi device, else create broadcom wifi device. Bug 954218 Change-Id: Ia0515e70b6d4b239a165b8d8629e3b90c19666b6 Signed-off-by: Nitin Bindal <nbindal@nvidia.com> Reviewed-on: http://git-master/r/98490 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-19arm: tegra: resolve compilation time warningsSanjay Singh Rawat
Bug 949219 Change-Id: I875f8688a272c415ebf345b8f30e4afdf7551b29 Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/91523 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-20ARM: tegra: Add support to identify if image RCKAshwini Ghuge
With this change, we can identify if system enters RCK mode in kernel. Bug 948270 Change-Id: I4240fd4171b6b71fbc5f1271f21a588d62db88b1 Signed-off-by: Ashwini Ghuge <aghuge@nvidia.com> Reviewed-on: http://git-master/r/90914 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-18arm: tegra: p1852: Add proc interface for board specific infoBob Johnston
1) /proc/board_serial will have the board serial number. 2) /proc/skuinfo will have 18 character sku information. 3) /proc/skuver will have 2 character sku version number. 4) /proc/prodinfo will have product information 5) /proc/prodver will have product version number. bug 931053 Change-Id: I7daccf932d3ee55b13c89eb4aaa519f51d8dba3e Signed-off-by: Bob Johnston <bjohnston@nvidia.com> Reviewed-on: http://git-master/r/90378 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-14arm: tegra: ventana: use fixed regulator instead of direct gpioPritesh Raithatha
Bug 925547 Change-Id: I81f87cef3a9767d9bd60b72e33a23620392ab5fc Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-on: http://git-master/r/89736 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-03-08ARM: tegra: Fix warnings for missing type forward referenceScott Williams
Change-Id: Ic327c7323f1d98639b20a44527d9e4a0c01d11d2 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/88113 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-03-05arm: tegra: kai: read mac address from board eepromOm Prakash Singh
Bug 927456 Change-Id: I98e1d8960888a4e6dd429e73c9ac0d1fce7d90be Signed-off-by: Om Prakash Singh <omp@nvidia.com> Reviewed-on: http://git-master/r/86958 Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-02-13ARM: tegra: Clean up CACHE_L2X0 conditionals and includesScott Williams
Change-Id: I9862e73f264c757f97aaad03f3373fb1d3e95462 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/79138 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-01-30arm: tegra: modify governor parameter set functionWen Yi
Use the parameter name and value to set to the conservative governor. Also defined the value of freq_step to be 3 and set it during early suspension. Bug 922351 Reviewed-on: http://git-master/r/73841 Change-Id: Ieefa487f8b255d4bf242a7d98b07dc3758a70e86 Signed-off-by: Wen Yi <wyi@nvidia.com> Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/77743 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-01-12arm: tegra: move ram console to common codesHaley Teng
cleanup ram console related source codes and move most of the implementation in board files to common.c since ram console is a common debug mechanism. bug 873307 Signed-off-by: Haley Teng <hteng@nvidia.com> Reviewed-on: http://git-master/r/54598 Reviewed-on: http://git-master/r/66588 (cherry picked from commit 119ce36b7bed370a528dfebc80bd79698118248d) Change-Id: I8b769b422305101a97f1fbc99db4af48dc7d4f25 Reviewed-on: http://git-master/r/71961 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com> Reviewed-on: http://git-master/r/74552 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-12-28arm: tegra: Create nvmap dev based on config flag.Krishna Reddy
Create nvmap dev and related resources only when CONFIG_TEGRA_NVMAP is defined. Change-Id: Iee9e43de79767353a750f73cddd6550a74315cff Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/70699 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
2011-12-21arm: tegra: enterprise: support A01 camera moduleJihoon Bang
Change if statement to support E1513 A01 board in E1197. Add tegra_get_camera_board_info to parse camera module id that is passed in from bootloader. Bug 914552 Change-Id: I20c3bcaf181e29446aa254ea189d917bc6905488 Signed-off-by: Jihoon Bang <jbang@nvidia.com> Reviewed-on: http://git-master/r/69504 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
2011-12-15arm: tegra: pcie: Adding tegra3 support for pcieJay Agarwal
Added support for tegra3 to pcie driver Fixes bug: 637871 Reviewed-on: http://git-master/r/44989 (cherry picked from commit 9bbfb4189474ede7f16a20b564ac7da2a93f6750) Change-Id: Ic0bb5b8d3098030baee5d8db6ca043df71db5a8e Signed-off-by: Krishna Kishore <kthota@nvidia.com> Reviewed-on: http://git-master/r/62059 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-12-08arm: tegra: Set G-CPU L2 cache latency to 0x442/552.Krishna Reddy
also restore the L2 cache latency values after exit from LP2. Bug 909628 Change-Id: Ia113d3511255f77ba5f5bfbfafebe43ba247818f Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/67767 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-11-30arm: tegra: set cpufreq governor parameterWen Yi
The new parameters help cpu frequency stay in low level clock as much as possible. This helps reduce power consumption when display is off. BUG 817727 Original-Change-Id: I030319d78e793a0372008a5c0640dce3720a47d8 Reviewed-on: http://git-master/r/35266 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: Rf4785634a4dedbbfe466901552e9deffa0360603
2011-11-30ARM: tegra: common: dynamic cpufreq governorBharat Nihalani
To improve the power consumption situation for MP3 playback the scaling governor is set to conservative when display is turned off and the default governor is saved. The governor is restored when display is turned on. Bug 817727 Original work done by "Wen Yi <wyi@nvidia.com>" Original-Change-Id: I43ffb0d508cc6d0a80eeeffcbab77526b644c437 Reviewed-on: http://git-master/r/32194 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R53c225edaf58a449053f192f03b3c095e54cbfd9
2011-11-30arm: tegra: whistler/ventana: dynamic cpufreq governorWen Yi
To improve the power consumption situation for MP3 playback the scaling governor is set to conservative when display is turned off and the default governor is saved. The governor is restored when display is turned on. Bug 817727 Original-Change-Id: I8693b5ae4c83d00895f2fae3db9397dd894de722 Reviewed-on: http://git-master/r/28270 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rfd63ecaa01ea85a71db933881c49e181c83b7a36
2011-11-30arm: tegra: Add support for vpr heap.Krishna Reddy
Bug 875847 Change-Id: Ieb237b3415f0861dfa13371fdbb7b3dbdac197b1 Reviewed-on: http://git-master/r/61246 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Rebase-Id: Rbed707e8bcba433aaed18fe9119c10902d4e618b
2011-11-30video: tegra: support display board PM313Hyungwoo Yang
This change supports PM313 with 19X12 panel. The change uses PM313 in "Single input to Dual output" mode Bug ID : 822980 Reviewed-on: http://git-master/r/50215 (cherry picked from commit b83e795747fa860b5b7fb66b2067ebe4f15bcfd0) Change-Id: Iabf707ded2976e9877481c215d0b1f1940781f14 Reviewed-on: http://git-master/r/60085 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Re8eadc35c75fa21b0a5f3cb3bee0e8cb77dc3238
2011-11-30arm: tegra: Handler for parsing kernel command max_cpu_currLaxman Dewangan
Adding handler for parsing the kernel command max_cpu_curr and api for retruning the max_cpu_current. bug 888679 Reviewed-on: http://git-master/r/58626 (cherry picked from commit 4d2da03c37a1a1401b4ef87b888f487a99b175b7) Change-Id: Ic5a53fe4e41317f48b986867081f3e7d96103f0d Reviewed-on: http://git-master/r/59290 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: Ra426e2b10268bc7eadbe394c107528378f043e15
2011-11-30arm: tegra: Support for kernel command audio_codecLaxman Dewangan
Adding the handler to parse the kernel command "audio_codec". bug 876544 Reviewed-on: http://git-master/r/56623 (cherry picked from commit b82c518354864c7dba03beea3c576edfab428efd) Change-Id: Icb42164ea1276f4f5af941b8ba2f80076759af8b Reviewed-on: http://git-master/r/57779 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: Rf3a0eed42103ef830c9697da42eb685fde6f6fe9
2011-11-30arm: tegra: Add handle for kernel option power_supplyLaxman Dewangan
Adding the handler function for the kernel command line option "power_supply". Reviewed-on: http://git-master/r/50674 (cherry picked from commit 8d9e6bbe59ab68f44a4713f5d1bcc7877baf8180) Change-Id: I07796b6ee5893d73ac7557e81aac5d26b299c491 Reviewed-on: http://git-master/r/57262 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rd64bf314bcdfe3f7bdbcdee946ed261bfce5938f
2011-11-30arm: tegra: parse kernel command line for debug port idLaxman Dewangan
Parsing the linux command line for the debug port id. bug 795847 Reviewed-on: http://git-master/r/51370 (cherry picked from commit f988c97564f9ecf4b78f4e935e2cfc4ca1b6db0e) Change-Id: Ib1bbdd9f671ab4c22cffdf379d3b9fd79a5a8736 Reviewed-on: http://git-master/r/57042 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R8b31dafaa124fb7e99d219bb464703b5696da0ff
2011-11-30ARM: tegra: Update copyrightsScott Williams
Change-Id: I156af0bdd8b37cb23aec214c3e158027252e27e1 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/51157 Rebase-Id: R795bf03590a76b6c494afd37603ed951dc2cd082
2011-11-30ARM: tegra: pm: Do not use ioremap for sys memPrashant Gaikwad
ARMv6+ architecture does not allow ioremap on system memory. lp0 is relocated using ioremap on DRAM. If lp0 vector start address is in system memory then use memblock_reserve and do not relocate. Else if it is overlapping with carveout/fb then first remove the carveout/fb using memblock_remove and then use ioremap. Bug 827199 Reviewed-on: http://git-master/r/43685 (cherry picked from commit 1753408edc65ebfc0d4d203f2be960d49ca747a8) Original-Change-Id: Ic4abfbc98b43aafb2756cb3e69d0ee178204ec7d Reviewed-on: http://git-master/r/44717 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Re90d5554c301471fd177632887741109318c2c97
2011-11-30arm: tegra: cardhu: Added I2C arbitration lost recovery mechanismAlok Chauhan
Added the code for arbitration lost recovery mechanism for i2c driver and Initialize gpio number for i2c clock and data as part of platform data. bug 854305 Original-Change-Id: Icdc243a5025c766d65816542a6d5aabd61e6eee1 Reviewed-on: http://git-master/r/43200 Reviewed-by: Bandi Krishna Chaitanya <bandik@nvidia.com> Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com> Reviewed-by: Alok Chauhan <alokc@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R11e00587725418e6e6ef5d0fa2f718424cc0635e
2011-11-30ARM: tegra: cardhu: switch off PMU at high temperaturevenu byravarasu
Add board support needed for PMU switch off when tsensor detects temperature > TH3 threshold set. bug 850047 Original-Change-Id: I7a283cedc735264dd8ea52801f7f1a103e9293cb Reviewed-on: http://git-master/r/41531 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rc4bf2206a7207e28434b46baed442cd6f2797fbc
2011-11-30arm: tegra: enterprise: init modem according to modem_idSteve Lin
Init baseband modems according to the modem_id passed from the bootloader. Bug 842870 Original-Change-Id: Ib8cd37877eb50ac67a337ef20dd6c6f631169578 Reviewed-on: http://git-master/r/39273 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R12d2b58e46d8962858394ba0328d3d0c43fa8bc9
2011-11-30arm: tegra: cardhu: Fix the issue of boot screen corruption.Kevin Huang
- The issue is due to the corruption of bootloader fb during kernel initialization. This change reserves the bootloader fb and then frees it until bootloader fb is copied to fb for Cardhu, Ventana, Whistler, Enterprise and Aruba. - Change color depth of Cardhu and Harmony to 32-bit. Bug 828271 Bug 832016 Original-Change-Id: I05ef5930ee68dcbd672a5cb59b4568a2c88a2e55 Reviewed-on: http://git-master/r/34966 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rb3c9280ea4643ccee661d37d24fb540319470bf7
2011-11-30arm: tegra: tsensor: driver instantiationBitan Biswas
Tegra internal tsensor driver supported for fuse revision 0.8 and above. Bug 661228 Original-Change-Id: I820f6b5f20c20bb2d1ba04266148f5969ab84444 Reviewed-on: http://git-master/r/36054 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R4725524b5e3f83b4cd3dd7d0020ef2d6e09a87d0
2011-11-30ARM: tegra: Reserve first 1K of IRAM for cpu reset handlerScott Williams
Change-Id: I377cb69b07071511de7b1a1de8d315e6bf1919b0 Signed-off-by: Scott Williams <scwilliams@nvidia.com> DW: Split into logical changes Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com> Rebase-Id: Rcd9cc391e18aebc6485698a73347a1e8c458c4c5
2011-11-30arm: tegra: common: setup of pmuboard option of kernel commandLaxman Dewangan
Adding setup function for the kernel command option pmuboard. bug 829846 Change-Id: I227fcab7b805a50945dc39a193ba29d90663b9f8 Reviewed-on: http://git-master/r/36557 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R4830f8818fce3a85e99e75856644c95e4a18f5ab
2011-11-30arm: tegra: Support for core_edp and panel type from kernel command.Laxman Dewangan
Selecting the core EDP voltage and panel type from the kernel commands. The bootloader pass this information through kernel command. Board will select the default configuration if there is no command option for these parameters. bug 822053 Original-Change-Id: Id7909d70b599c4a313d60d3ba2a9cf5b9eb7f2c3 Reviewed-on: http://git-master/r/30853 Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R168653eae3bd5965bcbef2cde3ba26c8dace8f23
2011-11-30[arm:tegra] Adding MC_DECERR interrupt handlerHiro Sugawara
Adding MC_DECERR interrupt handler ported from Froyo. This addition will not gracefully terminate a failing DMA transfer. The handler does noting but simply reporting the error status with prink, and the clinet software will likely hang forever waiting for a non- completing DMA transfer. But it is still useful for debugging. Reviewed-on: http://git-master/r/16289 (cherry picked from commit 4c66e8b978f054b332c21a97a53d89f588d24889) Original-Change-Id: I7b19c70d8cbb62be9ab3f955bf19c707c1e5045d Reviewed-on: http://git-master/r/16590 Tested-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: Ibdcfe63d56d22e39d8c5398ff50eb663bd0d82f3 Rebase-Id: R5a24a2ae2ab4585c3d48c76761beef815a665649
2011-11-30arm: tegra: use debug_uartport kernel parameterPradeep Goudagunta
Use debug_uartport kernel option to configure debug uart port as high speed(ttyHS1) or low speed(ttyS0) according to odmdata(19:18). Bug 803465 Original-Change-Id: Ide9a74c358a42f25ddb3ca03f4d949dc053f59f4 Reviewed-on: http://git-master/r/24019 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R9f97592339354828a0324c8645e41f523c93dd76
2011-11-30tegra: add an api to get board infoNitin Kumbhar
Bootloader can pass "board_info" as kernel parameter to specify board's id, sku, fab, major_revision and minor_revision. Based on this parameter, an api is provided to fetch board information. Original-Change-Id: Iacbc2f12562008908bf46ff85ea3064f31245e4c Reviewed-on: http://git-master/r/12552 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R333efe8d8ca0602bd064708b03d51b89b399cb2a
2011-11-30[ARM] tegra: Add function to copy framebuffer contentsColin Cross
Due to conflicting restrictions on the location of the framebuffer between the bootloader and the protected aperture, the framebuffer is likely to need to be moved during boot. This patch provides tegra_move_framebuffer, which can handle move the framebuffer from lowmem, highmem, or unmapped memory into unmapped memory. Change-Id: Ic37e5e337cd3129065fe56fd7777a86d06ad69ac
2011-11-30[ARM] tegra: Add function to enable protected apertureColin Cross
Change-Id: I699cee3bc9a131259b330655126146f5d1f92043 Signed-off-by: Colin Cross <ccross@android.com>
2011-11-30[ARM] tegra: Use memblock_remove to allocate carveout and framebufferColin Cross
This uses the patch by rmk to allow memblock_remove to be used to remove areas of memory from the 1:1 mapping, allowing them to be remapped later using iomap or, for Tegra, nvmap. Also uses memblock_reserve to reserve the lp0 boot vector, so it doesn't need to be copied later in tegra_init_suspend. tegra_reserve should be called from the machine reserve callback after any board-specific memory areas are reserved. Change-Id: I26be8544a03b6da74fe66dc53a77681d431c303c Signed-off-by: Colin Cross <ccross@android.com>
2011-11-30ARM: tegra: Add suspend supportColin Cross
Tegra supports three low power modes that involve powering down the CPU. LP2 powers down both CPU cores and the GICs, but leaves the core peripherals, including the memory controller and the legacy interrupt controller, enabled. The legacy interrupt controller is used as the wakeup source, and any interrupt can wake the device. LP2 can be used in idle. LP1 is the same as LP2, but in addition turns off the memory controller and puts the DDR memory in self-refresh. Any interrupt can wake the device. LP1 could be used in idle if no peripherals are doing DMA. LP0 turns off everything in the SoC except the RTC and a power management controller, both of which run off a 32 kHz clock. The power management controller has 32 wake sources, all other interrupts can not be used to wake from LP0. These low power modes power-gate the main CPU complex, requiring a full processor state save and restore from a reset vector. Platform-specific data (power good times, PMU capabilities, etc.) must be specified when registering the suspend operations to ensure that platform power sequencing restrictions are maintained. In both LP0 and LP1, SDRAM is placed into self-refresh. in order to safely perform this transition, the final shutdown procedure responsible for * turning off the MMU and L1 data cache * putting memory into self-refresh * setting the DDR pads to the lowest power state * and turning off PLLs is copied into IRAM (at the address TEGRA_IRAM_BASE + SZ_4K) at the start of the suspend process. In LP1 mode (like LP2), the CPU is reset and executes the code specified at the EVP reset vector. Since SDRAM is in self-refresh, this code must also be located in IRAM, and it must re-enable DRAM before restoring the full context. In this implementation, it enables the CPU on PLLP, enables PLLC and PLLM, restores the SCLK burst policy, and jumps to the LP2 reset vector to restore the rest of the system (MMU, PLLX, coresite, etc.). The LP2 reset vector is expected to be found in PMC_SCRATCH1, and is initialized during system-bootup. In LP0 mode, the core voltage domain is also shutoff. As a result, all of the volatile state in the core voltage domain (e.g., pinmux registers, clock registers, etc.) must be saved to memory so that it can be restored after the system resumes. A limited set of wakeups are available from LP0, and the correct levels for the wakeups must be programmed into the PMC wakepad configuration register prior to system shutdown. On resume, the system resets into the boot ROM, and the boot ROM restores SDRAM and other system state using values saved during kernel initialization in the PMC scratch registers. Resuming from LP0 requires the boot ROM to supply a signed recovery codeblob to the kernel; the kernel expects that the length and address of this blob is supplied with the lp0_vec= command line argument; if not present, suspend- to-LP0 will be disabled For simplicity, the outer cache is shutdown for both LP0 and LP1; it is possible to optimize the LP1 routine to bypass outer cache shutdown and restart. Includes fixes from: Scott Williams <scwilliams@nvidia.com> Aleksandr Frid <afrid@nvidia.com> Vik Kasivajhula <tkasivajhula@nvidia.com> Bharat Nihalani <Kbnihalani@nvidia.com> James Wylder <james.wylder@motorola.com> Allen Martin <amartin@nvidia.com> Change-Id: I9e4e61c2fbb8c7bb5a29b1832ea38e7ea0524c52 Original-author: Gary King <gking@nvidia.com> Signed-off-by: Gary King <gking@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
2011-02-22ARM: tegra: Move tegra_common_init to tegra_init_earlyColin Cross
Move tegra_common_init to tegra_init_early, and set it as the init_early entry in the machine struct. Initializes the clocks earlier so that timers can enable their clocks. Also reorders the members in the Harmony and Trimslice boards' machine structs to match the order they are called in. Signed-off-by: Colin Cross <ccross@android.com> Acked-by: Olof Johansson <olof@lixom.net>
2011-02-10ARM: tegra: Allow overriding arch_resetColin Cross
Signed-off-by: Colin Cross <ccross@android.com>
2010-10-21tegra: add PCI Express supportMike Rapoport
Change-Id: Ibd0bcd46895eb88952b9db29e1f68572d39aae01 Signed-off-by: Mike Rapoport <mike@compulab.co.il> Acked-by: Arnd Bergmann <arnd@arndb.de> CC: Russell King <linux@arm.linux.org.uk> CC: Gary King <GKing@nvidia.com> Signed-off-by: Colin Cross <ccross@android.com>
2010-08-05[ARM] tegra: initial tegra supportErik Gilling
v2: Fixes from Mike Rapoport - remove unused header files (mach/dma.h and mach/nand.h) - remove tegra 1 references from Makefile.boot v2: fixes from Russell King - remove mach/io.h include from mach/iomap.h - fix whitespace in Kconfig v2: from Colin Cross - fix invalid immediate in debug-macro.S v3: - allow selection of multiple boards Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Erik Gilling <konkers@android.com>
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