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path: root/arch/arm/mach-tegra/cpuidle-t3.c
AgeCommit message (Expand)Author
2013-01-23ARM: tegra30: Remove arch timer code from cpuidleBo Yan
2012-11-07ARM: tegra11x: cpuidle: Remove LP2 referencesBo Yan
2012-10-29ARM: tegra: replace tegra_cpu_wfi with cpu_do_idleBo Yan
2012-10-29ARM: tegra: restructure cpuidle utility functionsBo Yan
2012-10-26ARM: tegra: Change CPU idle power state namesBo Yan
2012-10-24ARM: tegra30: Remove "power_gating" controlBo Yan
2012-10-22ARM: tegra11x: Create cpuidle driver for t11xBo Yan
2012-10-22ARM: tegra: Fix typoBo Yan
2012-10-22ARM: tegra11x: Support per-core CPU power gatingBo Yan
2012-10-22ARM: tegra: More accurate name for LP2 functionsBo Yan
2012-10-22ARM: tegra11x: Fix TimerValue data typeBo Yan
2012-10-22ARM: tegra: power: Suspend/resume cpu dfll modeAlex Frid
2012-10-12ARM: tegra11: Call cpu_pm callback in LP2 laterBo Yan
2012-08-02ARM: tegra: remove trace_power_start callsPeter De Schrijver
2012-07-27ARM: tegra11: Use CPU private timer for LP2Bo Yan
2012-07-25ARM: tegra: New macro name for LP2 timer configBo Yan
2012-07-11ARM: tegra: Fix diagnostic register save & restoreBo Yan
2012-07-02ARM: tegra11: Support Curacao buildBo Yan
2012-06-28ARM: tegra: Disable LP2 for tegra3 A01 onlyBo Yan
2012-06-28ARM: tegra11: Support power gating CPU0 partitionBo Yan
2012-06-28ARM: tegra11: Select partitions for power gatingBo Yan
2012-06-27ARM: tegar11: clock: Handle DFLL during LP2 stateAlex Frid
2012-04-09ARM: tegra: fuse: fix usage of tegra_revision, process_id etcVarun Wadekar
2012-03-27ARM: tegra3: try saving cpu arch registerDan Willemsen
2012-03-27ARM: tegra: rethink the cpu suspend-resume code pathVarun Wadekar
2012-03-25fixup: PLAT_PHYS_OFFSETDan Willemsen
2012-03-25fixup: cpuidle fallbackDan Willemsen
2012-03-25fixup: module.h (cpuidle-t3.c)Dan Willemsen
2012-03-25fixup: cpu_pm.h (cpuidle-t3.c)Dan Willemsen
2012-03-25ARM: tegra: cpuidle changes (last_residency, last_state)Dan Willemsen
2012-03-22ARM: tegra: power: Don't enter LP2 if not in NOHZ modeAlex Frid
2012-03-22ARM: tegra: power: Power off multiple CPUs on-lineAlex Frid
2012-03-22ARM: tegra: power: Add external LP2 wake timers on secondary CPUsAlex Frid
2012-03-22ARM: tegra: power: Don't over-sleep LP2 on secondary CPUsAlex Frid
2012-03-22ARM: tegra: power: Separate lp2 latency for secondary CPUsAlex Frid
2012-03-22ARM: tegra: power: Separate lp2 latency for G/LP CPU modesAlex Frid
2012-03-22ARM: tegra: power: Re-factor Tegra3 secondary CPU LP2 entryAlex Frid
2012-03-22ARM: tegra: power: Fix Tegra3 LP2 statsAlex Frid
2012-03-22arm: tegra: REVERT "use unsigned cpuidle latency variables"Joseph Lehrer
2012-03-22arm: tegra: use unsigned cpuidle latency variablesJoseph Lehrer
2012-03-22ARM: tegra: dvfs: Add DVFS rails statisticAlex Frid
2012-03-22ARM: tegra: power: Fix LP2/LP3 states accounting on Tegra3Alex Frid
2012-03-22ARM: tegra: power: Add Tegra3 cpu idle parametersAlex Frid
2012-03-22ARM: tegra: power: Update Tegra3 LP2 time predictionAlex Frid
2012-03-22ARM: tegra: power: Clean Tegra3 LP2 entry procedureAlex Frid
2012-03-22ARM: tegra: power: Fix premature clock event broadcast modeScott Williams
2012-03-22ARM: tegra: power: Rename variables for consistencyScott Williams
2012-03-22ARM: tegra: power: CPU complex must be suspended on CPU0Scott Williams
2012-03-22ARM: tegra: power: Add LP2 in idle support for secondary CPUsScott Williams
2012-03-22ARM: tegra: timer: Save TWD registers on secondary CPU LP2Scott Williams
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