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path: root/arch/arm/mach-tegra/cpuidle-t3.c
AgeCommit message (Expand)Author
2012-04-19Revert "ARM: tegra: rethink the cpu suspend-resume code path"Sang-Hun Lee
2012-04-05ARM: tegra: rethink the cpu suspend-resume code pathVarun Wadekar
2012-03-06ARM: tegra: power: Don't enter LP2 if not in NOHZ modeAlex Frid
2012-02-23ARM: tegra: power: Power off multiple CPUs on-lineAlex Frid
2012-02-17ARM: tegra: power: Add external LP2 wake timers on secondary CPUsAlex Frid
2012-02-13ARM: tegra: power: Don't over-sleep LP2 on secondary CPUsAlex Frid
2012-02-03ARM: tegra: power: Separate lp2 latency for secondary CPUsAlex Frid
2012-02-03ARM: tegra: power: Separate lp2 latency for G/LP CPU modesAlex Frid
2012-02-03ARM: tegra: power: Re-factor Tegra3 secondary CPU LP2 entryAlex Frid
2012-01-12ARM: tegra: power: Fix Tegra3 LP2 statsAlex Frid
2012-01-10arm: tegra: REVERT "use unsigned cpuidle latency variables"Joseph Lehrer
2011-12-30arm: tegra: use unsigned cpuidle latency variablesJoseph Lehrer
2011-12-15ARM: tegra: dvfs: Add DVFS rails statisticAlex Frid
2011-11-30ARM: tegra: power: Fix LP2/LP3 states accounting on Tegra3Alex Frid
2011-11-30ARM: tegra: power: Add Tegra3 cpu idle parametersAlex Frid
2011-11-30ARM: tegra: power: Update Tegra3 LP2 time predictionAlex Frid
2011-11-30ARM: tegra: power: Clean Tegra3 LP2 entry procedureAlex Frid
2011-11-30ARM: tegra: power: Fix premature clock event broadcast modeScott Williams
2011-11-30ARM: tegra: power: Rename variables for consistencyScott Williams
2011-11-30ARM: tegra: power: CPU complex must be suspended on CPU0Scott Williams
2011-11-30ARM: tegra: power: Add LP2 in idle support for secondary CPUsScott Williams
2011-11-30ARM: tegra: timer: Save TWD registers on secondary CPU LP2Scott Williams
2011-11-30ARM: tegra3: power: Add LP2 power mode support for CPU 0Scott Williams
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