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path: root/arch/arm/mach-tegra/devices.c
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2012-11-12Merge branch 'l4t/l4t-r16-r2' into colibriMarcel Ziswiler
Conflicts: arch/arm/mach-tegra/tegra3_usb_phy.c arch/arm/mach-tegra/usb_phy.c drivers/usb/gadget/tegra_udc.c drivers/usb/otg/Makefile drivers/video/tegra/fb.c sound/soc/tegra/tegra_pcm.c
2012-09-10Merge branch 'l4t/l4t-r16' into colibriMarcel Ziswiler
Merge with latest NVIDIA L4T R16. Only real conflict concerning inverted VBUS gpio support.
2012-07-16ARM: tegra: p1852: Dual-display support for all SKUsDongfang Shi
Ported Peter's original change 86413 to main. board-p1852-panel.c: Add support for primary and secondary LVDS displays, and secondary HDMI display. board-p1852-pinmux.c: Add configuration for HDMI and LVDS board-p1852.c: board-p1852.h: Support for determining which p1852 sku is in use hdmi.c:If no edid retrieved, but there's a hardwired mode, enable it (used to support HDMI->LVDS output on p1852 sku 2) devices.c:added secondary display data. Bug 977859 Bug 994011 Change-Id: Ide8fb6bf7dd873b1d50269fb98d7c1687e4d9073 Signed-off-by: Dongfang Shi <dshi@nvidia.com> Reviewed-on: http://git-master/r/100438 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-07-09ARM: tegra: wdt: Remove legacy WDT device supportKamal Kannan Balagopalan
Tegra3 adds new CPU watchdog timers. Remove the obsolete legacy WDT support for Tegra3 Bug 857748 Change-Id: I82478e1b43f22f39c1b8e6e66ae5299ffd079d1b Signed-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com> Reviewed-on: http://git-master/r/109908 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-07-09ARM: tegra: wdt: Add support for Tegra3 CPU WDTsKamal Kannan Balagopalan
Tegra3 adds new CPU watchdog timers. Add device support for the CPU WDTs. Bug 857748 Change-Id: I0f99c37fed89879d39667b734654c659fe631aaf Signed-off-by: Kamal Kannan Balagopalan <kbalagopalan@nvidia.com> Reviewed-on: http://git-master/r/108379 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-07-06arm: tegra: cec: Add IO support for tegra3 cecAnkit Pashiney
Add IO and device support for tegra 3 cec block bug 894195 Change-Id: Icc68b2f900002cf14f48609d4676e7b3e091e948 Signed-off-by: Ankit Pashiney <apashiney@nvidia.com> Reviewed-on: http://git-master/r/105517 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-06-08Initial Toradex Colibri T20 L4T R15 support.Marcel Ziswiler
2012-06-03arm: tegra: p1852: Add i2s/tdm mode selectionNitin Pai
Added code to select i2s vs tdm mode. Added tdm-pcm-audio device defination. Changed the pcm driver to use tdm-pcm-audio device. Added fields to pass the pcm driver name to ASoC. Added P1852_TDM config to KConfig and Linux defconfig Bug 948478 Change-Id: I82fa03ab947cc615089e0a3107fb53901a1c00cd Signed-off-by: Bob Johnston <bjohnston@nvidia.com> Reviewed-on: http://git-master/r/105383 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-24usb: tegra: modify USB platform data structuresRakesh Bodla
Modify USB structures of platform data. Based on the new platform data structures modifying the initialization in board files. Bug 887361 Change-Id: Ie6347a078c9a596a4debe21a353e127ddde35220 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/103597 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-05-06arm: tegra: update the udc driver nameRakesh Bodla
Update the clocks structure to use new udc driver name. Also, update the device structure. Bug 887361 Change-Id: I0fd846ab177e8651f285bcb9796361d30967b830 Signed-off-by: Rakesh Bodla <rbodla@nvidia.com> Reviewed-on: http://git-master/r/99448 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-02-28video: tegra: host: Merge tegra_grhost and host1x devicesMayuresh Kulkarni
- tegra_grhost is a platform device that represents host1x - nvhost has device host1x which represents the same hardware - merge these two device structs - as the new struct is a nvhost_device, platform_driver is also converted into a nvhost_driver - register nvhost device before other graphics devices. this ensures that nvhost_probe() is called as soon as nvhost_driver is registered with the core. - this also ensures that nvmap is probed first, followed by nvhost, followed by tegra-dc and nvavp (if they are enabled). Change-Id: Ic420a6516a9cb20d6f481692a4db10fa6053dd90 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/82631 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-23ARM: tegra: clock src initialisation for debug port in common placeLaxman Dewangan
Moving clock source rate initialisation of debug ports in common place from board files. In this way, it does not need to call the same function from all board files and so avoid duplicating. Change-Id: I4e0292c7760488125c0dd8ee5fa23f50faca3436 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/85174 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-01-30ARM: tegra: clock: Auto-detect PLLP rate in uart initAlex Frid
Tegra3 platform may boot with one of the predefined fixed PLLP (peripheral PLL) output rates: 216MHz, 408MHz, or 204MHz. This commit implements auto-detection of PLLP rate, and debug uart configuration during kernel uart initialization. Bug 928260 Change-Id: I3fac4c462f28ac3dc1c72c0cc0f8f87fa0a809c4 Reviewed-on: http://git-master/r/75849 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Signed-off-by: Alex Frid <afrid@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/77294 Reviewed-by: Automatic_Commit_Validation_User
2012-01-23ARM: IOMMU: Tegra20: Add iommu_ops for GART driverHiroshi DOYU
Tegra 20 IOMMU H/W, GART (Graphics Address Relocation Table). This patch implements struct iommu_ops for GART for the upper IOMMU API. This H/W module supports only single virtual address space(domain), and manages a single level 1-to-1 mapping H/W translation page table. Change-Id: I2f550bf0e14d9f994abdde79b835ddfe815faa5a Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/75945 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-01-19arm: tegra: Add display and nvmap devicesManoj Chourasia
bug 871603 Reviewed-on: http://git-master/r/72257 Change-Id: I78e7e6c2d86ed8336cb32374f1f3e904365d46ec Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/75542 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
2012-01-13Tegra: DTV: Added resources and device for DTVAdam Jiang
Added dtv interface device to Tegra3 platform. Fixed Bug 904626 Fixed Bug 881303 Change-Id: Id2a4e6f015d3edf1ecd0e76f5586ae2ec00ed380 Signed-off-by: Adam Jiang <chaoj@nvidia.com> Reviewed-on: http://git-master/r/66627 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Reviewed-on: http://git-master/r/74890 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-01-12arm: tegra: smmu: Move tegra_smmu.h under "include/mach"Hiroshi DOYU
This is the preparation the following patches so that this header can be referred from another directly than "arch/arm/mach-tegra". Change-Id: I846970f306ff3daa8229e10e6f33b8e9fcf57cf9 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/73947 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-01-12arm: tegra: smmu: Set TEGRA_IOMMU_SMMU for platform_deviceHiroshi DOYU
This platform_device will be used for struct iommu_ops for SMMU in addition to iovmm-smmu exclusively. Change-Id: I8a15ba5ce40cd4bd5df255ecbe70a79a33fe8209 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/72216 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2011-12-15arm: tegra: cardhu: pcie support for cardhu bspJay Agarwal
Enabling PCIE support in cardhu board. Fixes bug: 637871 Reviewed-on: http://git-master/r/34474 (cherry picked from commit bde3e58d998b6e76934152219b8803327cea2fad) Change-Id: I18c548b458ad3d17ec07d2ec5b16fd83897b44b1 Signed-off-by: Krishna Kishore <kthota@nvidia.com> Reviewed-on: http://git-master/r/62072 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2011-11-30tegra: NOR: Add NOR platform deviceManoj Chourasia
Added NOR platform device for Tegra. Reviewed-on: http://git-master/r/56895 (cherry picked from commit 6b93835cef6321f286b8efcd032a1a1cc7a6ae9d) Change-Id: Ie0219f1b7534f140a1da924f4f97a52f50d59ad2 Signed-off-by: Manoj Chourasia <mchourasia@nvidia.com> Reviewed-on: http://git-master/r/66705 Tested-by: Gerrit_Virtual_Submit Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: R8ca0f2697a54ee48996c57af936bcc69c942db46
2011-11-30arm: tegra: Add HDA supportSumit Bhattacharya
Modify HDA device names to be inline with Intel HDA driver. Also add entries for both HDA controller memory base address and HDA controller PCI base address. Also modify the dev_id and con_id of HDA related clocks so that they can be used by HDA driver. Bug 872652 Change-Id: Ifa05fe7d3d524e9ae310594a0e582c297dc52ef7 Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-on: http://git-master/r/59506 Reviewed-by: Scott Peterson <speterson@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Rebase-Id: R098f861d94a78a1401841b71b8c591b902b7b0bc
2011-11-30arm: tegra: Add dummy platform driver for BT and BBSumit Bhattacharya
Use dummy spdif-dit platform driver for bluetooth and baseband platform driver. Bug 872652 Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Change-Id: I111e1f16d545d19b37c2a49c212160a210eea9f4 Reviewed-on: http://git-master/r/61503 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R058f68adf8951ba33dccdcaf6760875650de761e
2011-11-30arm: tegra: Correct DAS base addressSumit Bhattacharya
Bug 872652 Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Change-Id: I27911d144c5636ce8be26c6c3830dea09b4a2cde Reviewed-on: http://git-master/r/61234 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rb361a4da4573ba22c418a5c12fb820c9135292bb
2011-11-30arm: tegra: add dam to devices.hNikesh Oswal
Bug: 862023 Change-Id: I135529efcb8bf4518802d950a07e6923690419b0 Signed-off-by: Nikesh Oswal <noswal@nvidia.com> Reviewed-on: http://git-master/r/57881 Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com> Rebase-Id: R6c2419452e13142b07963e65a256e9da1e181ab2
2011-11-30arm: tegra: Remove T30 SPDIF DMA resource infoSumit Bhattacharya
Bug 872652 Change-Id: Iaea76918169f3270f865122f824f60678c419b50 Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-on: http://git-master/r/55970 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R70b9408e1c66c97a63a9408dda43aacd369c3178
2011-11-30arch: arm: Enable SPDIF driver for Tegra30Sumit Bhattacharya
Bug 872652 Change-Id: Ic170dc2fc86f74d9e67d3b73a6f83368597dafcb Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-on: http://git-master/r/54975 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R96e76083f2cf154be6c450aff9005a0057bf5cb4
2011-11-30arm: tegra: smmu: Remove IORESOURCE use from SMMU IOVA rangeHiro Sugawara
SMMU simply needs to know its assigned IOVA range, but does not need address space resources. Bug 874438 Change-Id: I0b9943d06c49363cfc0355586866f3bd6b217274 Reviewed-on: http://git-master/r/54534 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R3f4045ef2858960cd987a7477ec6869168ccec7d
2011-11-30ARM: tegra: nvavp: registering new nvavp driverBharat Nihalani
Also re-arranged tegra_nvavp code so that it is common accross boards Bug 880623 Change-Id: I7d634a718e07e07e945fb512466b3a0672aea7e2 Reviewed-on: http://git-master/r/54487 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R78e4af97d967003560e80efce79d6b22d6d66c4f
2011-11-30arch: arm: tegra: Add SPDIF driver supportSumit Bhattacharya
Bug 872652 Signed-off-by: Sumit Bhattacharya <sumitb@nvidia.com> Change-Id: I7b948b820434721511c008f644b69d93c23865e1 Reviewed-on: http://git-master/r/53094 Tested-by: Sumit Bhattacharya <sumitb@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R3fb55fe060065d76fb18010ad249e6ee0f96a944
2011-11-30ARM: tegra: Only Tegra3 has TSENSORScott Williams
Change-Id: I232d3ae5e037d491d1d8d185e75c1c9a7035cd4c Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/50354 Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Rebase-Id: R899f3aaf97ca7f21785749a8675ba1bc461f81f9
2011-11-30arm: tegra: devices: Add PMC IO address in SE resourcesKasoju Mallikarjun
Added PMC IO registers as platform resources of Security Engine for storing context save buffer address in PMC registes during context save. Bug 855476 Original-Change-Id: I3bd5791743b157139d61ecea3d3e1ef131d8cce5 Reviewed-on: http://git-master/r/44808 Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Rebase-Id: Rd5030cf1659887cedd9f60b00224ad7dddd7cd8c
2011-11-30arm: tegra: devices: Set emc rate for avpPrashant Gaikwad
Set emc clock rate for avp client as required by the platform. Original-Change-Id: I10374e1967cda6a9f497ba0a95bd62c3b58ecc40 Reviewed-on: http://git-master/r/40167 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R54697789f03d9465339029b49cba336cb9592c88
2011-11-30arm:tegra:tsensor: device definitionsBitan Biswas
Tegra internal temperature sensor addresses defined Bug 661228 Original-Change-Id: I061ac9e7da3115d1e832e645582353f93378d291 Reviewed-on: http://git-master/r/36119 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Tested-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R62de8521a55164f582eb2b0f8ad5a83bbc02876c
2011-11-30ARM: Tegra: Add T30 audio-related entries in devices.cStephen Warren
Also, remove "audio" platform device; it won't be used with the ALSA driver. Signed-off-by: Stephen Warren <swarren@nvidia.com> Rebase-Id: Rcbe1845a8d41292dfa82d61ff662d2f233b20af2
2011-11-30ASoC: Tegra: Complete Tegra->Tegra20 renamingStephen Warren
Rename Tegra20-specific Kconfig variables, module filenames, all internal symbol names, clocks, and platform devices, to reflect the fact the DAS and I2S drivers are for a specific HW version. Signed-off-by: Stephen Warren <swarren@nvidia.com> Rebase-Id: Rb2430e3fc84547430d6727fbd6adbf64afd00184
2011-11-30ARM: Tegra: Rename tegra_das platform deviceStephen Warren
... to match upstream name, and upstream ASoC driver. Signed-off-by: Stephen Warren <swarren@nvidia.com> Change-Id: I383aac72853ebc75612a24731f3da4035602a9ed Rebase-Id: Rf6500c09a312b87caaa52ee3e5ed633eaf81100e
2011-11-30ARM: tegra: clock: Change Tegra3 PLLP output frequencyAlex Frid
On Tegra3 fixed PLLP output frequency has been set to 408MHz (instead of 216MHz). Respectively changed: - Tegra3 broads setting for UART, and audio clocks - Tegra3 common clock setting for PLLP output dividers, SDMMC, and system buses - Tegra3 CPU backup configuration to guarantee safe backup at any voltage Bug 829081 Original-Change-Id: Ied0c75204ccb2e4a428f0b8a124f0f3e053aa386 Reviewed-on: http://git-master/r/34813 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: Rb9a445970ed83922394a24a732372c5541d8ef47
2011-11-30arm: tegra: devices: entry for security engineVarun Wadekar
tegra3 has a hardware block which can be used for encryption/decryption and hashing. add an entry in the common location so that all the boards using tegra3 can leverage it. Bug 835859 Original-Change-Id: I5f3b031f5648fb04f85caa7c42b69b7482c96a7b Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/35635 Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: R7cbf0a98df1bc006a575a4e6728008522bc27788
2011-11-30arm: tegra: devices: device entry for uart debug portsLaxman Dewangan
Adding device entry for the uart port as a debug console. The device struture will be used in board files to invoke the debug console driver. bug 832273 Original-Change-Id: I61c1dbdd946d5c371d7a9b23517119048a7487cb Reviewed-on: http://git-master/r/34445 Tested-by: Jay Agarwal <jagarwal@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Rebase-Id: R28de1684d8f7fce67c09d909f7bda51259128c0b
2011-11-30arm: tegra: add tegra_i2s_device0Tom Cherry
Original-Change-Id: I788d41d7c9880e29031d50b3d8829953cbc38f4f Reviewed-on: http://git-master/r/34239 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: Raecd6f7dfd3d2bd398e49100d5c1f8848f9d2f67
2011-11-30arm: tegra: Clean up SOC conditionalsScott Williams
Change SOC conditionals to make them more forward-looking. Original-Change-Id: Ib60db4e690c2f396afdec962616d735548b5a8a9 Reviewed-on: http://git-master/r/32706 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: R77c675a1995116098b58f1f775bc7c3cc8722998
2011-11-30arm: tegra: devices: Adding device details for tegra kbcAlok Chauhan
Adding device details for the tegra based kbc driver. Bug 827020 Original-Change-Id: I47b150fc97f97ce91c1de569aec067ad2e5f0660 Reviewed-on: http://git-master/r/31725 Reviewed-by: Alok Chauhan <alokc@nvidia.com> Tested-by: Alok Chauhan <alokc@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: Ra1a6e6dc6477cf1deae0b84dc3911b8ccfd9bbb8
2011-11-30ARM: tegra: correcting vde resource end fieldSanjay Singh Rawat
Original-Change-Id: I3b71ff1a57093f7e4bba311cb5632c200a80666c Signed-off-by: Sanjay Singh Rawat <srawat@nvidia.com> Reviewed-on: http://git-master/r/28651 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R5987a45cb62bfb22861438539125e71a4788e8a1
2011-11-30arm: tegra: iovmm: Move SMMU window to bottom 1GB for AVPHiro Sugawara
Tegra3 A01 continues to use the high address range. Tegra3 A02 (and after) uses the bottom 1GB. The new AHB register bit access has no effect to Tegra3 A01. Original-Change-Id: I90cedbb22d9aae4307908750ebeb03bef639945c Reviewed-on: http://git-master/r/23379 Tested-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Original-Change-Id: I33253f8ae32c416a9d19694e87380dbae94c2f68 Rebase-Id: Rf2d058998ea09fcbe44fe3c61493a46938505c0b
2011-11-30Update copyrightsScott Williams
Original-Change-Id: I2ffeaf6f8dfeb279b40ca6f69f6c9157401a746a Rebase-Id: Rd8ebde470ad475b826857413018a2da8e1fdea25
2011-11-30arm: tegra: devices: Adding device details for spi slaveLaxman Dewangan
Adding device details for the spi slave driver. Also adding clock details for these drivers. Original-Change-Id: I38a34c289e296152339dd23858dc19bfb95db354 Reviewed-on: http://git-master/r/22411 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com> Original-Change-Id: Id60caffa97965ac424083353388a0e6dfd963779 Rebase-Id: R442b1ac8bacbd15325abf7d8dc96699f75cd5fda
2011-11-30arm: tegra: Merge changes from main branchVinod G
Changes specific to separate the codecs based on board are integrated from rel-2010-11 branch Original-Change-Id: I9fe2e05d5347f02cd3047f453d03437b735e2c4b Reviewed-on: http://git-master/r/21562 Reviewed-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Tested-by: Vinod Gopalakrishnakurup <vinodg@nvidia.com> Reviewed-by: Scott Peterson <speterson@nvidia.com> Tested-by: Scott Peterson <speterson@nvidia.com> Original-Change-Id: I06473d906c1043a8fcc511cd66cfb57e311afdae Rebase-Id: R35499b0a4c1a947e119383b53e9843f23c18cf88
2011-11-30arm: tegra: Update AHCI/SATA driver supportYen Lin
- Added SATA pad pll and plle initialization - Removed usage of driver's platform data - Implemented placeholder for SATA power-gating/ungating Original-Change-Id: I6cd7f5fca95320aa5f429edbd4de5e28fd4c0ac7 Reviewed-on: http://git-master/r/18650 Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Tested-by: Yu-Huan Hsu <yhsu@nvidia.com> Original-Change-Id: I5cea5d8ad38b85a01287e26ded759bb8c3988530 Rebase-Id: Rc29cfb95ee43f09c3ae121356271a2d327f7d5b8
2011-11-30tegra:watchdog: Change timer src to timer10 for watchdog.vdumpa
Fix wdt resource definition issue either. Bug 790458 Original-Change-Id: I7c80d6c243c42a0e632603dfcc255b70995358b2 Reviewed-on: http://git-master/r/20646 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Original-Change-Id: I9897fb6614d75508bd0ffd6e866acf27a24a0cb5 Rebase-Id: Re3da893171091a337f9e6536641bb2374036b013
2011-11-30tegra:watchdog: Use new watchdog controller.vdumpa
Use new watch dog controller for CONFIG_ARCH_TEGRA_3x_SOC. Bug 790458 Original-Change-Id: I43975a2794f44f612a5f16674cd674aeebe4e6be Reviewed-on: http://git-master/r/19715 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com> Original-Change-Id: Ic8c9907998a2ab1777ea2b00f1acceb6d66c10e5 Rebase-Id: Rc7878358e81b0c5cda6acf5bb30b759e26f674a7
generated by cgit v1.2.3 (git 2.0.4) at 2024-04-25 20:51:01 +0000