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Exact copy of AP30 table
Bug 926056
Change-Id: I48730c41605b177d267a569804bbc75a6b94cfba
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/85233
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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Added new tables for T37/T33A (same table as T33) and AP37
Bug 844268
Reviewed-on: http://git-master/r/77662
Change-Id: I51e0939eb2f1f5582215bc409cf2d8eaf9890fba
Signed-off-by: Daniel Solomon <daniels@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78709
Reviewed-by: Automatic_Commit_Validation_User
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Changed 20C to 23C to account for hysteresis effect
Bug 844268
Change-Id: I11fca162db737e8cf81c31bf38575ecc42a730df
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/75049
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Reviewed-on: http://git-master/r/75538
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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Bug 844268
Change-Id: I16327668c5df0ead318753f753be1680980ad9c1
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/75030
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/75537
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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(see bug for Excel with the new spec)
Bug 844268
Change-Id: I7a3bdd674b987c2edd540de7764e01338f66c0ac
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/74094
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/74893
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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System electrical design point (EDP) alarm is generated when system
power source (battery) over-current is detected.
Part of the system EDP management is CPU frequency capping added by
this commit. Maximum CPU clock frequency is pre-determined depending
on number of CPU cores on-line. It is combined with CPU regulator EDP
limit and applied to final CPU rate; CPU voltage is scaled down by
DVFS, respectively. The system EDP limit of CPU rate is removed after
alarm is canceled.
EDP event can be emulated via debugfs entry /d/cpu-tegra/edp_alarm.
(cherry picked from commit fa673d27766ff9513139e94a498e4c24827d7c57)
arm: tegra: power: Removed erroneous ';'
(cherry picked from commit b4b404381b2d1823b7c127858950f853428fe3b5)
Change-Id: I60ec0e87f9442b698a8824895aac0a1f955565b4
Signed-off-by: Alex Frid <afrid@nvidia.com>
Reviewed-on: http://git-master/r/67823
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Bug 844268
Change-Id: Iddffd445401318fb0e64d6739dbf833da7daede9
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/68313
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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(see bug for Excel with the new spec)
Bug 844268
(cherry picked from commit 036969082d6571a26572cfe80f62144be87e732b)
Change-Id: Iacc9081ace5629588b7634d2927d9ea5a7c8c91b
Reviewed-on: http://git-master/r/57095
Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-on: http://git-master/r/68257
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
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bugid 844268
Use correct regulator current value obtained from bootloader
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Change-Id: I9059a5e83c88c6fc0e933acd3c4ab6e6b9c35078
Reviewed-on: http://git-master/r/67025
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Rebase-Id: Rce035e804a189df47a5b5c2a03f418d88cd9147a
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bugid 844268
Reviewed-on: http://git-master/r/65547
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
(cherry picked from commit 72d41cc5200454175d8dc04c761c983405e4d901)
Change-Id: Ica5aaf0bedb02bff3485cdcb76e81da80896a309
Reviewed-on: http://git-master/r/66520
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Rebase-Id: R7ed6a74e13a6900490c83a15f5adc00c5163d663
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bugid 844268
Reviewed-on: http://git-master/r/64185
(cherry picked from commit a27e20a84ce1bab8a1d37f12f7f9260d9d32dbfe)
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Change-Id: I88b108fd44719828e11499606ab7ef754f76ebac
Reviewed-on: http://git-master/r/65290
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Rebase-Id: R557e282e415fd4bed871ea1ed8c056ae79731311
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bug 841336
Reviewed-on: http://git-master/r/62766
(cherry picked from commit c27e091be2ec3899fbb0bdbfe199784063f24be1)
Change-Id: I40277cea7f48cc15e074123ee73287b25389c0e6
Signed-off-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-on: http://git-master/r/64211
Rebase-Id: Reef8906240656bfee07dbf9ba8f581677bad8e5f
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Bug 841336
Reviewed-on: http://git-master/r/60779
(cherry picked from commit 4d3f017e2715f50aaca6c7e8dc61e880947f7550)
Change-Id: Ib1eeb8729a91162d39fc952eeb7494d8863a03c7
Reviewed-on: http://git-master/r/64204
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Tested-by: Diwakar Tundlam <dtundlam@nvidia.com>
Rebase-Id: Rcfa5f6c11e831c4f08e956609ea8f9d98a6111f8
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Earlier value of 75 had unnecessary double guardbanding.
Changed 90C row in EDP table down to 85C to get throttling alert.
Bug 862301
Reviewed-on: http://git-master/r/50544
(cherry picked from commit 9f2693a80274bcd9eb8e7424bca87f34cc190741)
Change-Id: If7204150013e7894fc310a2f7e8fd46baf11d869
Reviewed-on: http://git-master/r/62773
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R6ef35feeaad04bea897d9343d9d3a21a988f3dde
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Reviewed-on: http://git-master/r/53296
(cherry picked from commit 12ed00a4b6024299617f7ff9cd2f0e718f5eb11e)
Change-Id: I5b5cf2d5f53ce83d0c278130db1b534eb8030b85
Reviewed-on: http://git-master/r/61687
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Redd22a72d2dc86d215c100f18eb5f4ad61467fd9
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Change-Id: I04fd814d316adcc65ad7a37d2053157e06982ca9
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Reviewed-on: http://git-master/r/59168
Reviewed-by: Rakesh Iyer <riyer@nvidia.com>
Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R21468d84c03400faf1b3c5cb5eb5f0eb48ff0577
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bug 865842
Original-Change-Id: I54dcf3e2e968692746f1d8b17bdf912305f547a2
(cherry picked from commit 5b9dce25485824036f86db093b28a45a3cd86c76)
Reviewed-on: http://git-master/r/48257
Reviewed-by: Joseph Lehrer <jlehrer@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R1adb1ca832e0f63f1e5b7e405f4c87c4a8a7aabe
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- updated EDP table for AP30 A02 2.5A to match data from Bug 844268
- updated EDP cap for single core on AP30 A02 to 1.3Ghz
- changed EDP table for A01 to match AP30 A02
Original-Change-Id: I1722768f235d63a2f311d082d8126ba071226eb6
Reviewed-on: http://git-master/r/46482
Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: Rc98aaffd4568b9ad642696eef5f559d9c7fd7237
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Added EDP support for Enterprise board via ext temp sensor nct1008
Bug 824621
Original-Change-Id: I476b9ad2cb46620d4775e6ee6e102b45f2b4dc27
Reviewed-on: http://git-master/r/43144
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rd0a03e8e8786fc76dd57149d9df315d084072cae
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- Added table with EDP Capping values for different SKUs/regulator
currents in new file edp.c
- New entry point tegra_init_cpu_edp_limits()
- Added DebugFS entry under debug/edp to list the currently
selected EDP table
- Populated EDP table in edp.c with data from Bug 844268
- edp.c keeps main EDP table; cpu-tegra.c and board-cardhu-power.c
both read from there
Bug 840255
Original-Change-Id: I55c2ee16278be8cd3005218bedebe76846d137d8
Reviewed-on: http://git-master/r/40938
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R9a5f2bcfc1e6e0b5aee37cd700d75f9ef5cea30b
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