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path: root/arch/arm/mach-tegra/fuse.h
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2011-07-27ARM: tegra: power: Add package mask to IO pad controlAlex Frid
Modified dynamic IO pad configuration control to support SoC package dependencies: set into "no-io-power state" IO pads that are not bonded out on the particular package. Updated IO power detect table to account for differences in Tegra2 and Tegra3 architecture. Bug 853132 Change-Id: I5f0aedfa784173cc37251ccf4e1dfb4d919db96e Reviewed-on: http://git-master/r/42785 Tested-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
2011-07-21nvhost: Enable 3D powergatingTerje Bergstrom
Enables 3D power gating on chips that support it. Bug 793861 Change-Id: Iadc40b65ac4897550d3b0d2076cc7efe98c95dfa Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/37821 Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Karan Jhavar <kjhavar@nvidia.com> Tested-by: Karan Jhavar <kjhavar@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-07-11arm: tegra: Use new platform typesYudong Tan
This change is needed to support three different platforms, silicon, fpga and simulation. Change-Id: I407853e1d86accbe3686deb4f34571fe6b10bcce Reviewed-on: http://git-master/r/36351 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2011-06-22nvhost: Make 3D workaround Tegra3 A01 onlyTerje Bergstrom
3D hardware workaround is needed for Tegra3 A01 only. With this patch, we read run-time whether it should be enabled or not. Workaround should be removed once A01's have been phased out. Bug 786316 Change-Id: Icd1b85b30a53c74d2e5c7a6df65a805d1fe5147c Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/32136 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-06-13ARM: tegra: dvfs: Update DVFS tables with data for T30SDiwakar Tundlam
Change-Id: I38b9752adc9e927935fe7ffe5590c41577a45809 Reviewed-on: http://git-master/r/34381 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-06-03arm: tegra: fuse: add function to get chipidLuke Huang
1. Add the function to return chipid. 2. Remove the if-def for A01 for tegra2 and add kernel panic if tegra2-A01 is detected. 3. Clean up errors/warnings reported by checkpatch.pl. Change-Id: I0aa4ed2c4fd77e8e5ae83feceee94372b1506446 Reviewed-on: http://git-master/r/32450 Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com> Tested-by: Chih-Lung Huang <lhuang@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2011-05-31arm: tegra: Clean up SOC conditionalsScott Williams
Change SOC conditionals to make them more forward-looking. Change-Id: Ib60db4e690c2f396afdec962616d735548b5a8a9 Reviewed-on: http://git-master/r/32706 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-23ARM: tegra: clock: Set speedo_id according to actual fused SKUDiwakar Tundlam
- Read SKU_INFO fuse to get A02 SKU info - Update CPU DVFS to use actual SKU info obtained - Enable main table for EDP capping and thermal throttling Change-Id: I7ff3b06476998d77cc3f7a4fc03fb72e26b570db Reviewed-on: http://git-master/r/32084 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com>
2011-05-11ARM: tegra: power: speedo, cpu, core process ids for tegra3Diwakar Tundlam
Change-Id: If206f26e0f10f666fd7839c1ebb839eeb4899e21 Reviewed-on: http://git-master/r/29879 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Diwakar Tundlam <dtundlam@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2011-04-26ARM: tegra: Decode optional chip-private feature string in cmd lineHiro Sugawara
ap20 needs to distinguish between A03 and A03p revisions. Original-Change-Id: I726d45f5ea3c5283ae11057f01c86038eb6c2872 Reviewed-on: http://git-master/r/27777 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: If14b6330ccd8bb6420e0c9118291414cc383b94d
2011-04-26ARM: tegra: chipid: Parse and save Tegra chip ID passed by fastbootHiro Sugawara
Original-Change-Id: Ibb00d64820cc81b6af08c4ac7266d2df94bd6a1e Reviewed-on: http://git-master/r/26631 Tested-by: Hiro Sugawara <hsugawara@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: Idc50a6f9891bc61f19e1f282480519ffccf11ad4
2011-04-26Update copyrightsScott Williams
Change-Id: I2ffeaf6f8dfeb279b40ca6f69f6c9157401a746a
2011-04-26arm: tegra: Add support for T30.A02Scott Williams
Bug 784484 Original-Change-Id: I8aec236c62f01c3f319b1d96c8c13464cb564904 Reviewed-on: http://git-master/r/22886 Tested-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: I8f857fe8422c60b2ec3ccc0961bbd426e3c69c29
2011-04-26arm: tegra: fix ventana build breakJin Qian
Fix build break on ventana due to improper use of kernel config paramters. Original-Change-Id: I7ec13091cf67fa5cb25b39c92eb33756263506c4 Reviewed-on: http://git-master/r/22705 Tested-by: Jin Qian <jqian@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Change-Id: Id942dc5dc79e0edf5dc27d418083f340ae40edb8
2011-04-26Merge remote branch 'git-master/android-tegra-2.6.36' into 0112-1120Dan Willemsen
Conflicts: Makefile arch/arm/configs/tegra_defconfig arch/arm/configs/tegra_whistler_android_defconfig arch/arm/mach-tegra/Kconfig arch/arm/mach-tegra/Makefile arch/arm/mach-tegra/board-ventana-sensors.c arch/arm/mach-tegra/board-ventana.c arch/arm/mach-tegra/board-whistler-panel.c arch/arm/mach-tegra/board-whistler-pinmux.c arch/arm/mach-tegra/board-whistler-power.c arch/arm/mach-tegra/board-whistler-sensors.c arch/arm/mach-tegra/board-whistler.c arch/arm/mach-tegra/board-whistler.h arch/arm/mach-tegra/clock.c arch/arm/mach-tegra/clock.h arch/arm/mach-tegra/common.c arch/arm/mach-tegra/cpu-tegra.c arch/arm/mach-tegra/devices.c arch/arm/mach-tegra/devices.h arch/arm/mach-tegra/dma.c arch/arm/mach-tegra/fuse.c arch/arm/mach-tegra/fuse.h arch/arm/mach-tegra/headsmp.S arch/arm/mach-tegra/include/mach/clk.h arch/arm/mach-tegra/include/mach/iomap.h arch/arm/mach-tegra/include/mach/system.h arch/arm/mach-tegra/irq.c arch/arm/mach-tegra/spi_tegra_slave.c arch/arm/mach-tegra/suspend.c arch/arm/mach-tegra/tegra2_dvfs.c arch/arm/mach-tegra/tegra2_emc.c arch/arm/mach-tegra/tegra2_emc.h arch/arm/tools/mach-types arch/x86/kvm/svm.c drivers/cpufreq/cpufreq_interactive.c drivers/crypto/tegra-aes.c drivers/gpio/cs5535-gpio.c drivers/hwmon/nct1008.c drivers/misc/Makefile drivers/net/wireless/p54/p54usb.c drivers/regulator/max8907c-regulator.c drivers/rtc/rtc-tegra.c drivers/usb/gadget/fsl_udc_core.c drivers/usb/host/ehci-tegra.c drivers/usb/host/xhci-mem.c drivers/usb/otg/tegra-otg.c drivers/usb/serial/ftdi_sio.c drivers/video/tegra/dc/dc.c drivers/video/tegra/dc/hdmi.c drivers/video/tegra/dc/hdmi.h drivers/video/tegra/host/dev.c drivers/video/tegra/host/nvhost_channel.c drivers/video/tegra/host/nvhost_intr.c include/linux/nct1008.h net/econet/af_econet.c sound/soc/tegra/Kconfig sound/soc/tegra/tegra_i2s.c sound/soc/tegra/tegra_pcm.c sound/soc/tegra/tegra_soc.c sound/soc/tegra/tegra_soc.h Original-Change-Id: I5b39fd8ea2284828e9cb3b5ce4330728e20b1662 Reviewed-on: http://git-master/r/15736 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Change-Id: I71ecd7c4426e7e82500f12d57b85a6bcc417065c
2011-01-10merging android-tegra-2.6.36 into git-master/linux-2.6/android-tegra-2.6.36Nitin Kumbhar
Conflicts: arch/arm/mach-tegra/fuse.c drivers/misc/Makefile Change-Id: I300b925d78b31efe00c342190d8dbd50e2e81230
2011-01-06[ARM] tegra: fuse: Add function to get Tegra revisionColin Cross
Change-Id: I11783f5784454fec143393336195db40c9aa3160 Signed-off-by: Colin Cross <ccross@android.com>
2011-01-05[ARM] tegra: use APB DMA for accessing APB devicesJon Mayo
Change-Id: I165411a14342666cbac02fb8cb171580ab0826aa Reviewed-on: http://git-master/r/14464 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-12-16ARM: tegra: Add speedo-based process identificationAlex Frid
Change-Id: If6cd2914551331bd49b128ad3143a0d7adf0f120 Reviewed-on: http://git-master/r/13396 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-12-08[ARM] tegra: add utility function to read spare fuse bitsGary King
spare fuse bits 18 and 19 are used to distinguish A03p Tegra 2 chips from A03 chips. this is needed on some platforms to determine whether or not LP0 suspend should be enabled. Change-Id: I03a964eac3783535357faecee8cd35e65350b356 Reviewed-on: http://git-master/r/12078 Tested-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-11-24ARM: tegra: fuse: Separate fuse dma initializationColin Cross
There is a dependency loop between fuses, clocks, and APBDMA. If dma is enabled, fuse reads must go through APBDMA to avoid corruption due to a hw bug. APBDMA requires a clock to be enabled. Clocks must read a fuse to determine allowable cpu frequencies. Separate out the fuse DMA initialization, and allow the fuse read and write functions to be called without using DMA before the DMA initialization has been completed. Access to the fuses before APBDMA is initialized won't hit the hardware bug because nothing else can be using DMA. Change-Id: Ib5cb0f346488f2869e8314c5f3b24fd86873f4c3 Signed-off-by: Colin Cross <ccross@android.com>
2010-11-23[ARM] tegra: fuse read/write apis for fuse burningVarun Wadekar
expose fuse register read and write apis for fuse burning Change-Id: Id6785f5506fe9293ddb5072240f49470ca5fcd08 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2010-09-29[ARM] tegra: Add support for reading fusesColin Cross
The Tegra SOC contains fuses to identify the CPU type and bin, and a unique id. The CPU info is required to determine the correct voltages for each cpu and core frequency. Signed-off-by: Colin Cross <ccross@android.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-09-26 23:55:46 +0000