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path: root/arch/arm/mach-tegra/fuse.h
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2011-01-10merging android-tegra-2.6.36 into git-master/linux-2.6/android-tegra-2.6.36Nitin Kumbhar
Conflicts: arch/arm/mach-tegra/fuse.c drivers/misc/Makefile Change-Id: I300b925d78b31efe00c342190d8dbd50e2e81230
2011-01-06[ARM] tegra: fuse: Add function to get Tegra revisionColin Cross
Change-Id: I11783f5784454fec143393336195db40c9aa3160 Signed-off-by: Colin Cross <ccross@android.com>
2011-01-05[ARM] tegra: use APB DMA for accessing APB devicesJon Mayo
Change-Id: I165411a14342666cbac02fb8cb171580ab0826aa Reviewed-on: http://git-master/r/14464 Reviewed-by: Jonathan Mayo <jmayo@nvidia.com> Tested-by: Jonathan Mayo <jmayo@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2010-12-16ARM: tegra: Add speedo-based process identificationAlex Frid
Change-Id: If6cd2914551331bd49b128ad3143a0d7adf0f120 Reviewed-on: http://git-master/r/13396 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-12-08[ARM] tegra: add utility function to read spare fuse bitsGary King
spare fuse bits 18 and 19 are used to distinguish A03p Tegra 2 chips from A03 chips. this is needed on some platforms to determine whether or not LP0 suspend should be enabled. Change-Id: I03a964eac3783535357faecee8cd35e65350b356 Reviewed-on: http://git-master/r/12078 Tested-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Narendra Damahe <ndamahe@nvidia.com> Tested-by: Narendra Damahe <ndamahe@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2010-11-24ARM: tegra: fuse: Separate fuse dma initializationColin Cross
There is a dependency loop between fuses, clocks, and APBDMA. If dma is enabled, fuse reads must go through APBDMA to avoid corruption due to a hw bug. APBDMA requires a clock to be enabled. Clocks must read a fuse to determine allowable cpu frequencies. Separate out the fuse DMA initialization, and allow the fuse read and write functions to be called without using DMA before the DMA initialization has been completed. Access to the fuses before APBDMA is initialized won't hit the hardware bug because nothing else can be using DMA. Change-Id: Ib5cb0f346488f2869e8314c5f3b24fd86873f4c3 Signed-off-by: Colin Cross <ccross@android.com>
2010-11-23[ARM] tegra: fuse read/write apis for fuse burningVarun Wadekar
expose fuse register read and write apis for fuse burning Change-Id: Id6785f5506fe9293ddb5072240f49470ca5fcd08 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
2010-09-29[ARM] tegra: Add support for reading fusesColin Cross
The Tegra SOC contains fuses to identify the CPU type and bin, and a unique id. The CPU info is required to determine the correct voltages for each cpu and core frequency. Signed-off-by: Colin Cross <ccross@android.com>