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path: root/arch/arm/mach-tegra/irq.c
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2012-07-17ARM: tegra: wake source interrupts enabledBitan Biswas
Tegra wake source interrupts are only enabled before suspend bug 904746 Change-Id: Ie9722199b4541f2bac77e47d0c8c7e65d5d8b54d Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-on: http://git-master/r/115655 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-07-11ARM: tegra: support multiple wake sources with same irqBitan Biswas
Earlier implementation only allowed single wake source for a particular irq in wake table. Changed implementation to support multiple wake sources ==> single irq mapping. bug 980993 Change-Id: Iacb00487531129ef19c53128824aba802e80350e Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-on: http://git-master/r/103140 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-02-03ARM: tegra: Co-locate all GIC functionsScott Williams
Move Tegra GIC initialization to be with the other GIC functions. Change-Id: I9b23757d135f3a9062f21fccb816c745ce8add43 Signed-off-by: Scott Williams <scwilliams@nvidia.com> Reviewed-on: http://git-master/r/78829 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Mark Stadler <mastadler@nvidia.com> Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2011-11-30ARM tegra: gpio: Correct gpio interrupt init sequenceDaehyoung Ko
It is possible for GPIO interrupt to occur when registering handler since set_irq_chained_handler enables GPIO interrupt. Thus all relevant variables are required to be initialized before calling set_irq_chained_handler. Also add initialization of interrupt status register. Bug 884569 Reviewed-on: http://git-master/r/58218 (cherry picked from commit e03fe4cc1bf06fa6c32c0520e2ba31f009f9301d) Change-Id: Ic76f95215b61d6e091ae1cfa11522f8af9c3eecd Reviewed-on: http://git-master/r/60475 Reviewed-by: Daehyoung Ko <dko@nvidia.com> Tested-by: Daehyoung Ko <dko@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R5340918dccc1a8b1d95c5b629cc985f44d45fb67
2011-11-30media: tegra: avp: Clear interrupt registers when AVP startsKaz Fukuoka
There was no code to clear interrupt registers for AVP. First run of AVP was OK because those registers start from reset value. But because those registers were not cleared, when the second time AVP was started, some interrupts were enabled too early. That caused interrupts coming before handlers were ready. This change also removes the workaroud for the bug. bug 827353 bug 826234 Original-Change-Id: I51546400f0bace67dfcdb23f667c051c060d3983 Reviewed-on: http://git-master/r/33083 Reviewed-by: Niket Sirsi <nsirsi@nvidia.com> Tested-by: Niket Sirsi <nsirsi@nvidia.com> Rebase-Id: Rb45b8d54afeda71d35c011120fc0e748929ad74e
2011-11-30ARM: tegra: power: Use CONFIG_PM_SLEEP instead of CONFIG_PMScott Williams
For Linux 2.6.39, CONFIG_PM_SLEEP is the proper kernel configuration parameter to use on Tegra for power management, and not CONFIG_PM. CONFIG_PM does not have the required dependency on CONFIG_SUSPEND necessary to pull in the CPU suspend/resume functionality used by Tegra. Also fixes compilation errors when CONFIG_PM and by implication CONFIG_PM_SLEEP are not configured. Change-Id: I8bb380ae7c6b22759bfbc223febc28f585111aad Reviewed-on: http://git-master/r/40458 Tested-by: Daniel Willemsen <dwillemsen@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com> Rebase-Id: R61d656cd67439aa9f466c381845d7a4685fc8648
2011-11-30Update copyrightsScott Williams
Original-Change-Id: I2ffeaf6f8dfeb279b40ca6f69f6c9157401a746a Rebase-Id: Rd8ebde470ad475b826857413018a2da8e1fdea25
2011-11-30[ARM/tegra] Add Tegra3 supportScott Williams
Bug 764354 Original-Change-Id: I8a390eb4dae87dceacb97461f23d13554868b046 Reviewed-on: http://git-master/r/12228 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Tested-by: Scott Williams <scwilliams@nvidia.com> Original-Change-Id: I8e6b8303898796419fb5a759cd16edff9aeac081 Rebase-Id: R2866240384c6c24f46bd7ef54bc3dc9140d9e96b
2011-11-30ARM: tegra: irq: Add wake irq handlingColin Cross
Add LP0 wake irq handling in pm-irq.c, called from irq.c and gpio.c. Use IRQCHIP_MASK_ON_SUSPEND for LP1 wake irq handling, when the legacy irq controller stays powered. Determine valid suspend modes based on requested wake sources. Signed-off-by: Colin Cross <ccross@android.com> Change-Id: I547bd8290c0921163054d49f43141379e8f9f493
2011-05-11ARM: tegra: irq: Add tegra_eoiColin Cross
Implement irq_eoi to allow the GIC irq chip flow controller to be changed to fasteoi. Signed-off-by: Colin Cross <ccross@android.com>
2011-05-11ARM: tegra: irq: Move legacy_irq.c into irq.cColin Cross
Now that irq.c is just an interface layer between the gic and legacy_irq.c, move the contents of legacy_irq.c into irq.c. Signed-off-by: Colin Cross <ccross@android.com>
2011-05-11ARM: tegra: irq: Remove PM supportColin Cross
Tegra PM irq support is being improved, remove it for now until the rest of the platform gets PM support. Signed-off-by: Colin Cross <ccross@android.com>
2011-05-11ARM: tegra: irq: convert to gic arch extensionsColin Cross
Replace the ugly hack that inserts legacy irq controller calls into the irq call paths by reading and replacing the gic irq chip with the new gic arch extensions. Signed-off-by: Colin Cross <ccross@android.com>
2011-03-29arm: Fold irq_set_chip/irq_set_handlerThomas Gleixner
Use irq_set_chip_and_handler() instead. Converted with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-03-29arm: Cleanup the irq namespaceThomas Gleixner
Convert to the new function names. Automated with coccinelle. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2011-02-09ARM: tegra: irq: Implement retriggerColin Cross
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-09ARM: tegra: irq: Add support for suspend wake sourcesColin Cross
Signed-off-by: Colin Cross <ccross@android.com>
2011-02-09ARM: tegra: Add prototypes for subsystem suspend functionsColin Cross
Signed-off-by: Colin Cross <ccross@android.com>
2011-01-26ARM: tegra: irq: Rename gic pointers to avoid conflictsColin Cross
A future patch will export gic_mask_irq and gic_unmask_irq. Rename the pointers in arch/arm/mach-tegra/irq.c to avoid a compile error. Signed-off-by: Colin Cross <ccross@android.com>
2011-01-13ARM: tegra: irq_data conversion.Lennert Buytenhek
Signed-off-by: Lennert Buytenhek <buytenh@secretlab.ca>
2010-12-14ARM: GIC: provide a single initialization function for boot CPURussell King
Provide gic_init() which initializes the GIC distributor and current CPU's GIC interface for the boot (or single) CPU. Reviewed-by: Catalin Marinas <catalin.marinas@arm.com> Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-10-21[ARM] tegra: add suspend and mirror irqs to legacy controllerGary King
mirror IRQ enable and disable operations on the legacy PPI system interrupt controller, since the legacy controller is responsible for responding to wakeup interrupts when the CPU is in LP2 idle mode save the irq controller state on suspend and restore on resume Signed-off-by: Gary King <gking@nvidia.com>
2010-08-05[ARM] tegra: Add IRQ supportErik Gilling
v2: fixes from Russell King - include linux/io.h instead of asm/io.h and mach/io.h Signed-off-by: Colin Cross <ccross@android.com> Signed-off-by: Erik Gilling <konkers@android.com>
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