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After toggeling the latchwake_en bit, the status of wake event is latched to
pmc_sw_wake_status, not pmc_wake_status. Adding a new function to read out
from the proper register.
Change-Id: Ib1478504fd16197afe3a2b676833f9ce7f6f7528
Reviewed-on: http://git-master/r/32078
Reviewed-by: Chih-Lung Huang <lhuang@nvidia.com>
Tested-by: Chih-Lung Huang <lhuang@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
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Select LP0/LP1 on runtime using sysfs node /sys/power/suspend/type.
Valid selctions/commands are:
1. lp0
2. lp1
3. lp2
Change-Id: I335a8845dbfed7539ae4bf8aee3ba3b97ecb3db3
Reviewed-on: http://git-master/r/30081
Reviewed-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Tested-by: Karan Jhavar <kjhavar@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: I2ffeaf6f8dfeb279b40ca6f69f6c9157401a746a
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Tegra3 enters LPx states via combination of core WFI and flow
controller power gating mechanism. If any interrupt is pending, or
fired while LPx entry procedure is executed CPU would fall through
WFI, but flow controller may still initiate power down sequence.
This is dangerous as CPU would be taken down while executing code.
To eliminate this scenario, do not propagate legacy IRQs to CPU core
on entry to LPx. Since GIC-to-CPU interrupt path is disabled in the
distributer, WFI is always entered, and flow controller properly shut
down CPU. The wake path: legacy IRQ-to-flow controller is kept
enabled, and provide LPx exit mechanism.
Bug 791458
Bug 791093
Original-Change-Id: I4f34e68335500f096790197c61f1acf83a7fc424
Reviewed-on: http://git-master/r/19971
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Change-Id: I293d5e7569b154f46945e8ea4097e3c5387a504d
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Original-Change-Id: I77cb790db20cc8c8b67069130c0bc8724ba8934e
Reviewed-on: http://git-master/r/15027
Tested-by: Jin Qian <jqian@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I45764ed134dc0be2a21d7641692efb9c847a9b7a
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Original-Change-Id: I96edd2706d959f04e9bc5cd4a841d9a582fbd469
Reviewed-on: http://git-master/r/14575
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I3d49abf93947d09af9bc6faf2b15675303723515
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Bug 764354
Original-Change-Id: I8a390eb4dae87dceacb97461f23d13554868b046
Reviewed-on: http://git-master/r/12228
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Change-Id: I8e6b8303898796419fb5a759cd16edff9aeac081
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Protect irq suspend/resume functions behind #ifdef CONFIG_PM.
This prevents a link error if CONFIG_PM is turned off.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Signed-off-by: Colin Cross <ccross@android.com>
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Change-Id: I66124275869d5f83024937010e14018b7980bb05
Signed-off-by: Colin Cross <ccross@android.com>
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Change-Id: I5be02f60f1b0f35835a8d05abdb2934cdafb1122
Signed-off-by: Colin Cross <ccross@android.com>
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Change-Id: Ic18e0c92462a590b759752662bd7d67aaf8a371a
Signed-off-by: Colin Cross <ccross@android.com>
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Change-Id: I863c6db6deedd6fce52dc1b912cfdbc8d16f8c55
Signed-off-by: Colin Cross <ccross@android.com>
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Change-Id: If14c826e8919f5de11331a5c45994fe7e451330a
Signed-off-by: Colin Cross <ccross@android.com>
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mirror IRQ enable and disable operations on the legacy PPI system
interrupt controller, since the legacy controller is responsible
for responding to wakeup interrupts when the CPU is in LP2 idle mode
save the irq controller state on suspend and restore on resume
Signed-off-by: Gary King <gking@nvidia.com>
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v2: fixes from Russell King
- include linux/io.h instead of asm/io.h and mach/io.h
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Erik Gilling <konkers@android.com>
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