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Using the devm_* for memory region allocation and clock handler
request. As a result, there is no need to explicitly free them and
hence saving some code.
Change-Id: Id69d40bd44622105ea4f8a37426dd83a694adb8d
Signed-off-by: Kunal Agrawal <kunala@nvidia.com>
Reviewed-on: http://git-master/r/121581
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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For PWM parent select, the field locates at
bit[30:28] of the CLK_RST_CONTROLLER_CLK_SOURCE_PWM_0.
For PWM divider, it is 0-based, not 1-based.
Original-Change-Id: Ibbfacafe7651c080b1e535075ab84d04e1830ec7
Reviewed-on: http://git-master/r/14739
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R5ad668d415cf0ae35508405ea102141cb047db62
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add support for the pulse-width-modulation APIs using the tegra 2
internal PWM controllers
Change-Id: If313301aaebab01f08edbe120060537e6917ea4b
Signed-off-by: Gary King <gking@nvidia.com>
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