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path: root/arch/arm/mach-tegra/sleep.S
AgeCommit message (Expand)Author
2011-11-30ARM: tegra: power: use buffered memory for suspend contextJin Qian
2011-11-30ARM: tegra: power: Perform L2 cache sync when flushing L1Scott Williams
2011-11-30ARM: tegra: power: Workaround PMD corruption by cpu_resume_mmuScott Williams
2011-11-30ARM: tegra: power: Save CPU context to non-cacheable stackScott Williams
2011-11-30ARM: tegra: power: Add stack frame debug checksScott Williams
2011-11-30ARM: tegra: power: Define push/pop context register macrosScott Williams
2011-11-30ARM: tegra: power: Use uniform save/restore register setScott Williams
2011-11-30ARM: tegra: power: Use standard definitions for SCTLRScott Williams
2011-11-30ARM: tegra: power: Consolidate CPU context save and SMP exitScott Williams
2011-11-30ARM: tegra: power: Add SMP coherency exit macroScott Williams
2011-11-30ARM: tegra: power: Clean up stack pointer handlingScott Williams
2011-11-30ARM: tegra: power: Split CPU context save and coherency exitScott Williams
2011-11-30ARM: tegra3: power: Add LP2 power mode support for CPU 0Scott Williams
2011-11-30ARM: tegra: power: Align MMU shutdown code to L1 cache lineScott Williams
2011-11-30ARM: tegra: Rename flow control registersScott Williams
2011-11-30ARM: tegra: Always compile sleep.SScott Williams
2011-11-30ARM: tegra: Split sleep.S for Tegra2Scott Williams
2011-11-30ARM: tegra: power: remove unnecessary barriers on LP3 idle loopScott Williams
2011-11-30ARM: tegra: power: Prefer movw/movt for loading addressesScott Williams
2011-11-30ARM: tegra: sleep: flush tlbs when exiting wfiColin Cross
2011-11-30ARM: tegra: Add suspend supportColin Cross