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path: root/arch/arm/mach-tegra/tegra_odm_fuses.c
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2012-12-03ARM: tegra: fuse: fusetime configurationKen Chang
The fuse programming pulse needs to be 10us for T30, and 11us for T114 and later chips. Thus FUSE_FUSETIME_PGM2_0 should be modified based on the OSC frequency used on the specific board. The formula is FUSE_FUSETIME_PGM2_0 = N * OSC in MHz where N = 10 for T30 and 11 for T114. Bug 1157054 Change-Id: I725eb750db19bf4253f3a77fb9518f73b4a3d9c9 Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: http://git-master/r/165303 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2012-12-03ARM: tegra: fuse: correct the offset for OSC_FREQKen Chang
Bug 1157054 Change-Id: Ifd4566af6046fa24b1b753bbaf1668177ae88adf Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: http://git-master/r/165644 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2012-12-03arm: tegra: fuse: Fixed burning fuse through sysfsSumit Sharma
Fixed fuse burning issue by adding 1 ms delay in fuse_program function Bug 1057910 Change-Id: Id0d754a195c2a78ec4bf5a41f3ffb2bbd6c9c5ea Signed-off-by: Sumit Sharma <sumsharma@nvidia.com> Reviewed-on: http://git-master/r/166789 Reviewed-by: Mrutyunjay Sawant <msawant@nvidia.com> Tested-by: Mrutyunjay Sawant <msawant@nvidia.com>
2012-11-29arm: tegra: fuse: keep odm_reserved writableByungkuk Seo
Remove the predicate that disables blowing an odm_reserved fuse when odm_production_mode is already blown. Correct the error message. Bug 1181444 Change-Id: I37ba364932d3902bfd11181fafa3ad9e1d28e9f1 Signed-off-by: Byungkuk Seo <bseo@nvidia.com> Reviewed-on: http://git-master/r/166103 (cherry picked from commit fc198548e0b7d7abbeb306a1f3f7b285c203467e) Reviewed-on: http://git-master/r/167122 Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
2012-11-14ARM: tegra: fuse: moving to clk prepare APIsSivaram Nair
The clk_enable/clk_disable pair of APIs are replaced with clk_prepare_enable and clk_disable_unprepare. This is needed for the migration to common clk framework. Bug 920915 Change-Id: Ib72dc1b94e87fcfc7bc9901991a9f94ac2c64a89 Signed-off-by: Sivaram Nair <sivaramn@nvidia.com> Reviewed-on: http://git-master/r/146783 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-10-05arm: tegra: fuse: Create SOC specific fuse header filesVenu Byravarasu
Pushing SOC specific fuse details into different files, for easy addition/deletion of fuse support on different SOCs. Change-Id: I0660c038b68195247e4aa20cd00cc1a7db806388 Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-on: http://git-master/r/133470 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-09-11ARM: tegra: fuse: Fix coverity issueSri Krishna chowdary
Fix negative array index read Bug 1046331 Change-Id: Ibef31d5e121b6e16f87cef973c10cd4d2647496b Signed-off-by: Sri Krishna chowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/131099 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-09-06ARM: tegra: fuse: rename regulator name as per chip pin nameLaxman Dewangan
The pin name for fuse supply for different chip have different name as follows: - Tegra20 has the name as vdd_fuse. - Tegra30 and later have the name as vpp_fuse. Correcting name of the regulator supply and implementing same in odm driver. Change-Id: Ic7a49f365fa30aa71b198ba588dcc4bfc36dcc98 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/130144 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-08-07Merge commit 'main-jb-2012.08.03-B4' into t114-0806Pradeep Kumar
Conflicts: arch/arm/boot/compressed/Makefile arch/arm/boot/compressed/atags_to_fdt.c arch/arm/boot/compressed/head.S arch/arm/boot/dts/tegra30.dtsi arch/arm/include/asm/bug.h arch/arm/kernel/traps.c arch/arm/mach-tegra/Makefile.boot arch/arm/mach-tegra/board-cardhu-sdhci.c arch/arm/mach-tegra/board-cardhu.c arch/arm/mach-tegra/board-enterprise-sdhci.c arch/arm/mach-tegra/board-enterprise.c arch/arm/mach-tegra/board-harmony.c arch/arm/mach-tegra/board-kai-sdhci.c arch/arm/mach-tegra/board-ventana.c arch/arm/mach-tegra/board-whistler.c arch/arm/mach-tegra/clock.h arch/arm/mach-tegra/fuse.h arch/arm/mach-tegra/tegra2_usb_phy.c arch/arm/mach-tegra/tegra3_clocks.c arch/arm/mach-tegra/tegra3_dvfs.c arch/arm/mach-tegra/tegra3_speedo.c arch/arm/mach-tegra/timer.c arch/arm/mach-tegra/usb_phy.c arch/arm/mach-tegra/wakeups-t3.c drivers/cpufreq/cpufreq_interactive.c drivers/input/touchscreen/atmel_mxt_ts.c drivers/mfd/tps65090.c drivers/mmc/core/mmc.c drivers/mmc/host/sdhci-tegra.c drivers/mmc/host/sdhci.c drivers/net/wireless/bcmdhd/bcmsdh_sdmmc_linux.c drivers/regulator/Kconfig drivers/regulator/core.c drivers/regulator/tps80031-regulator.c drivers/spi/Makefile drivers/staging/nvec/nvec.c drivers/tty/serial/Makefile include/linux/mmc/card.h sound/soc/tegra/tegra_max98095.c sound/usb/card.c Change-Id: I65043bc6ce9e97d0592683462215a39e50f403fd Reviewed-on: http://git-master/r/121392 Reviewed-by: Bo Yan <byan@nvidia.com> Tested-by: Bo Yan <byan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-07-12ARM: tegra: fuse: Fix sysfs outputAnimesh Kishore
Adding extra byte for null character. Without this string concatenation of fuse read will be erratic. Bug 1007619 Change-Id: Idbb5f997840f5ed27418d5b0b8dfbc9516354f4c Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/112974 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-04-11arm: tegra: fuse: let ODM production mode be world readableChris Johnson
Also, fixup some of the bit offsets that were leading to incorrect values being returned from get_fuse() on T20/T30. Bug 912862 Signed-off-by: Chris Johnson <cwj@nvidia.com> Reviewed-on: http://git-master/r/89283 (cherry picked from commit f6323c7f32017b51202d478671cbf366beb0b0f5) Change-Id: Ieb9f92e36760cbc470d63257d26c09388cec7e1e Reviewed-on: http://git-master/r/90762 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Chris Johnson <cwj@nvidia.com> Tested-by: Chris Johnson <cwj@nvidia.com> Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
2012-03-25fixup export.hDan Willemsen
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
2012-03-24ARM: tegra: fuse: expose fuses through sysfs (wakelock)Varun Wadekar
Add wakelocks to the fuse burning process. fuses can be read/written via sysfs entries. fuse sysfs entries will be present under /sys/firmware/fuse Based on work done by Venu Byravarasu <vbyravarasu@nvidia.com> Original-Change-Id: Iadb0a83671c8823c541f6bcc2f5f5583d750c1ed Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/22763 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: Rd61e3b7aca1d1019f581baedf1ec95772936b779
2012-03-22ARM: tegra: fuse: re-arranging fuse offsetsVenu Byravarasu
Removed multiple #ifdefs to check the chip versions and moved them into a single #ifdef. Change-Id: I0fbd20a4dce1fdf813afa8883b473976a89f429e Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Reviewed-on: http://git-master/r/79724 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com> Rebase-Id: Re9ea7e066cb5e77f878f6425ffc3078835bc4f57
2012-03-22arm: tegra: fuse: Keep fuse register visible alwaysVenu Byravarasu
Fuse registers are made visible during init. As they need not be masked and unmasked during every fuse access, removing these functions. bug 933113 Reviewed-on: http://git-master/r/78355 Change-Id: If95c021b9ec377ba9610eedd481ec3c8ff6bf874 Signed-off-by: Venu Byravarasu <vbyravarasu@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/78714 Reviewed-by: Automatic_Commit_Validation_User Rebase-Id: R8f5b08db1d8cd4562ed5cbe08dded39ccbbdb674
2012-03-22arm: tegra: fuse: accept strings starting with 0x/xVarun Wadekar
some users might enter fuse data starting with 0x/x. this will mess up the fuse programming. do not consider 0x/x while programming the fuses. also fix some compilation warnings Reviewed-on: http://git-master/r/#change,38933 Original-Change-Id: I36b525c71b6d5c437affbaf0724667f8e5984aa6 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/41016 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: Rb6a134adfa8049865bb4154353763d43f743e052
2012-03-22arm: tegra: fuse: support to burn fuses on the fieldVarun Wadekar
- follow the new sequence shared by the hardware team - merge Tegra2 and Tegra3.0 odm fuse burning into a single file Bug 796825 Original-Change-Id: Ia06d589eba95254a410016dce244375f27e22be0 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/38404 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R740d7bd47eaa6231954ae98686272a755a4bce14
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-13 12:51:31 +0000