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Add silicon aging for VDD_CPU, this recovers some of millivolts based on
the age of the chip.
BUG 1006420
Change-Id: Idddb5861ab039e7ece262dec3697a69c3534ccf2
Signed-off-by: Anshul Jain <anshulj@nvidia.com>
Reviewed-on: http://git-master/r/116911
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
GVS: Gerrit_Virtual_Submit
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When Tegra3 secondary CPU is entering LP2, read TWD timer state
into context structure, rather than separate local variables.
Reviewed-on: http://git-master/r/77957
Change-Id: I237eafc50a11d535b94f334631d039ba9c4bf44b
Signed-off-by: Alex Frid <afrid@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/78899
Reviewed-by: Automatic_Commit_Validation_User
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Change-Id: I0365550357de813b679f4ca8fdbff3909d151575
Signed-off-by: Colin Patrick McCabe <cmccabe@nvidia.com>
Reviewed-on: http://git-master/r/59756
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: R4ab172dc3d4f284e4c1bc7f5f0f903c4f110d1a6
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- Preserve twd periodic load register across suspend and LP2 on main
CPU. Keep timer disabled on resume, since it will be re-configured
later when timekeeping switches from global system timer.
- Generate "load equal zero" warning in twd suspend/resume code only
when timer is in periodic mode.
Change-Id: If7df8be08c0ef4e355f315e3f0b7e3cf1b358f0f
Reviewed-on: http://git-master/r/55068
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
Rebase-Id: R75f3950a915e0953a098620dea9ea32a7d5e9482
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Change-Id: Ied49d7517574b62ebc54ba8a5ef04d26408f0145
Reviewed-on: http://git-master/r/53347
Tested-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Tested-by: Gaurav Sarode <gsarode@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Rebase-Id: Rd540ebbeb48903eea556508be45580c5d260941e
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Change-Id: I156af0bdd8b37cb23aec214c3e158027252e27e1
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-on: http://git-master/r/51157
Rebase-Id: R795bf03590a76b6c494afd37603ed951dc2cd082
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In tegra_twd_suspend(), save the remaining count rather than the
initial count of the timer.
Also catch invalid TWD configurations during suspend/restore
(e.g., enabled with a zero count).
BUG 862605
Change-Id: I05bf9e37f922a2b0a48cff23f1aa94ec8e8e039e
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R6c7e5ae1220faee4564cd751fa6c94f7404ddc27
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Change-Id: I629f77041ce444dfff32b563795573174afea3a1
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: R7a21e91127b44461d219a8bfd388f99ba7a72b53
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The system timer initialization code for Tegra2 and Tegra3 is
essentially the same except for the actual physical timer used and the
range of possible reference clock frequencies. This change removes the
needless duplication of code and restructures the system timer code into
common and SOC-specific parts.
Change-Id: Icb6e4c0e2b218c67667be9450e10326e1e42945b
Signed-off-by: Scott Williams <scwilliams@nvidia.com>
DW: Split into logical changes
Signed-off-by: Dan Willemsen <dwillemsen@nvidia.com>
Rebase-Id: Rbd3fc10b2a6935dd1ca9272695fd0133e0ca4f15
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Rename timer.c to timer-t2.c for consistency with other
chip-specific implementations.
Bug 790458
Bug 790448
Bug 738259
Original-Change-Id: I7e0fceb716590cd92b64ba00c0bebe659e9beb21
Reviewed-on: http://git-master/r/22885
Tested-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I322324c2177d57657a63e9428f8e49d5df2b828e
Rebase-Id: R7312866cdc8044a71cc2f83ad4bc7aa66b07416d
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Bug 764354
Original-Change-Id: I8a390eb4dae87dceacb97461f23d13554868b046
Reviewed-on: http://git-master/r/12228
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Tested-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I8e6b8303898796419fb5a759cd16edff9aeac081
Rebase-Id: R2866240384c6c24f46bd7ef54bc3dc9140d9e96b
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Change-Id: I4d431037e83742e123ad81e4614354b14e32d453
Signed-off-by: Colin Cross <ccross@android.com>
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Signed-off-by: Colin Cross <ccross@android.com>
Change-Id: I914e2836b3ab36218658afc77751a7b394f62400
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mach/suspend.h is not used yet, and its functions will be replaced
with syscore ops. Delete it.
Change-Id: I7b32d3514e7f4427c7d5faa97c1954a7a2cc286c
Signed-off-by: Colin Cross <ccross@android.com>
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Convert ixp4xx, lpc32xx, mxc, netx, pxa, sa1100, tcc8k, tegra and u300
to use the generic mmio clocksource recently introduced.
Cc: Imre Kaloz <kaloz@openwrt.org>
Cc: Krzysztof Halasa <khc@pm.waw.pl>
Acked-by: Eric Miao <eric.y.miao@gmail.com>
Acked-by: "Hans J. Koch" <hjk@hansjkoch.de>
Acked-by: Colin Cross <ccross@android.com>
Cc: Erik Gilling <konkers@android.com>
Cc: Olof Johansson <olof@lixom.net>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Enable the timer and rtc clocks to prevent them being
turned off by the bootloader clock disabling code.
Signed-off-by: Colin Cross <ccross@android.com>
Acked-by: Olof Johansson <olof@lixom.net>
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Implement read_persistent_clock by reading the Tegra RTC
registers that stay running during suspend.
Save and restore the timer configuration register in
suspend.
Signed-off-by: Colin Cross <ccross@android.com>
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Signed-off-by: Colin Cross <ccross@android.com>
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Convert tegra to use the new sched_clock() infrastructure for extending
32bit counters to full 64-bit nanoseconds.
Tested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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ftrace requires sched_clock() to be notrace. Ensure that all
implementations are so marked. Also make sure that they include
linux/sched.h
Also ensure OMAP clocksource read functions are marked notrace as
they're used for sched_clock() too.
Tested-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Tested-by: Will Deacon <will.deacon@arm.com>
Tested-by: Mikael Pettersson <mikpe@it.uu.se>
Tested-by: Eric Miao <eric.y.miao@gmail.com>
Tested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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tegra_clocksource_read should not use cnt32_to_63, wrapping is
already handled in the clocksource code. Move the cnt32_to_63
into the sched_clock function, and replace the use of clocksource
mult and shift with a multiplication by 1000 to convert us to ns.
Acked-by: John Stultz <johnstul@us.ibm.com>
Acked-by: Linus Walleij <linus.walleij@stericsson.com>
Tested-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Colin Cross <ccross@android.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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Signed-off-by: Zimny Lech <napohybelskurwysynom2010@gmail.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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v2: fixes from Russell King:
- include linux/io.h instead of asm/io.h
fixes from Gary King:
- remove extra (and incorrect) irq definitions
- use timer 3 instead of timer 1 for compatibility with other drivers
- fix typo that disabled oneshot mode
v3:
- Implement sched_clock
- Fix checkpatch issues
fixes from Gary King:
- Fix incorrect cycles calculation
- Fix min_delta_ns assignment
fixes from Linus Walleij:
- use calc_mult_shift() instead of hard coding values
Signed-off-by: Colin Cross <ccross@android.com>
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