Age | Commit message (Collapse) | Author |
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As our hardware only allows triggering an interrupt on over-temperature
shutdown we setup a workqueue to catch leaving it again.
For Tegra 3 NVIDIA relies on the regular Linux thermal subsystem.
As follows some output during a thermal throttling run:
root@colibri-t30:~# cat /sys/bus/i2c/devices/4-004c/temp2_os
45000
RAM 400/980MB (lfb 135x4MB) IRAM 0/255kB(lfb 255kB)
cpu [12%,2%,3%,6%]@475 EMC 533 AVP 81 VDE 400 EDP limit 1300000
Temperatures CPU 42.4 Board 36.4
root@colibri-t30:~# cat /sys/bus/i2c/devices/4-004c/temp2_os
60000
RAM 400/980MB (lfb 135x4MB) IRAM 0/255kB(lfb 255kB)
cpu [14%,5%,4%,4%]@1300 EMC 533 AVP 81 VDE 400 EDP limit 1300000
Temperatures CPU 54.2 Board 47.8
RAM 400/980MB (lfb 135x4MB) IRAM 0/255kB(lfb 255kB)
cpu [100%,100%,100%,100%]@1200 EMC 533 AVP 81 VDE 400 EDP limit 1200000
Temperatures CPU 70.4 Board 56.6
root@colibri-t30:~# cat /sys/bus/i2c/devices/4-004c/temp2_os
75000
RAM 400/980MB (lfb 135x4MB) IRAM 0/255kB(lfb 255kB)
cpu [54%,49%,48%,48%]@1200 EMC 533 AVP 81 VDE 400 EDP limit 1200000
Temperatures CPU 70.9 Board 57.1
RAM 400/980MB (lfb 135x4MB) IRAM 0/255kB(lfb 255kB)
cpu [100%,100%,100%,100%]@1100 EMC 533 AVP 81 VDE 400 EDP limit 1100000
Temperatures CPU 75.3 Board 60.5
root@colibri-t30:~# cat /sys/bus/i2c/devices/4-004c/temp2_os
85000
RAM 401/980MB (lfb 135x4MB) IRAM 0/255kB(lfb 255kB)
cpu [65%,61%,61%,61%]@1100 EMC 533 AVP 81 VDE 400 EDP limit 1100000
Temperatures CPU 75.2 Board 61.0
RAM 401/980MB (lfb 135x4MB) IRAM 0/255kB(lfb 255kB)
cpu [100%,100%,100%,100%]@1000 EMC 533 AVP 81 VDE 400 EDP limit 1100000
Temperatures CPU 85.1 Board 69.8
RAM 401/980MB (lfb 135x4MB) IRAM 0/255kB(lfb 255kB)
cpu [100%,100%,100%,100%]@760 EMC 533 AVP 81 VDE 400 EDP limit 1100000
Temperatures CPU 85.1 Board 69.9
root@colibri-t30:~# cat /sys/class/thermal/cooling_device0/cur_state
0
root@colibri-t30:~# cat /sys/class/thermal/cooling_device0/max_state
10
root@colibri-t30:~# cat /sys/class/thermal/cooling_device0/type
balanced
root@colibri-t30:~# cat /sys/class/thermal/thermal_zone0/cdev0_trip_point
0
root@colibri-t30:~# cat /sys/class/thermal/thermal_zone0/temp
84531
root@colibri-t30:~# cat /sys/class/thermal/thermal_zone0/trip_point_0_temp
85000
root@colibri-t30:~# cat /sys/class/thermal/thermal_zone0/trip_point_0_type
passive
root@colibri-t30:~# cat /sys/class/thermal/thermal_zone0/type
lm95245_remote
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Adjust thermal throttling to latest lm95245 evolution and wait with the
interrupt registration until we get the LM95245 drivers probe callback.
While at it add some clarifying comments and wrap RTC stuff with a
define.
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Our platform data erroneously used the forth (bus number 3) rather than
the first (bus number 0) controller instance.
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Get rid of obsolete NAND aka Colibri T30 v1.0a prototype handling.
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As our hardware only allows triggering an interrupt on over-temperature
shutdown we first use it to catch entering throttle limit and only then
set it up to catch an actual over-temperature shutdown.
While throttling we setup a workqueue to catch leaving it again.
We support the same sysfs interface as on NVIDIA Ventana:
root@colibri-t20:~# cat /sys/kernel/debug/thermal/shutdown
115000
root@colibri-t20:~# cat /sys/kernel/debug/thermal/throttle
90000
As follows some output of before and during a throttling run:
root@colibri-t20:~# tegrastats
RAM 159/345MB (lfb 36x4MB) Carveout 11/128MB (lfb 116MB) GART 0/32MB
(lfb 32MB) IRAM 4/255kB(lfb 248kB) cpu [51%,23%]@216 EMC 666 AVP 72 VDE
240 EDP limit -1 Temperatures CPU 48.7 Board 43.2
root@colibri-t20:~# cat /sys/devices/system/cpu/cpu0/cpufreq/throttle
0
root@colibri-t20:~# cat /sys/bus/i2c/devices/4-004c/temp2_os
90000
root@colibri-t20:~# cat /sys/kernel/debug/thermal/shutdown
115000
root@colibri-t20:~# cat /sys/kernel/debug/thermal/throttle
90000
root@colibri-t20:~# tegrastats
RAM 66/345MB (lfb 5x32kB) Carveout 75/128MB (lfb 53MB) GART 8/32MB
(lfb 24MB) IRAM 20/255kB(lfb 232kB) cpu [85%,83%]@912 EMC 666 AVP 216
VDE 240 EDP limit -1 Temperatures CPU 90.1 Board 77.9
root@colibri-t20:~# cat /sys/devices/system/cpu/cpu0/cpufreq/throttle
1
root@colibri-t20:~# cat /sys/bus/i2c/devices/4-004c/temp2_os
115000
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Integrate remote over-temperature shutdown ROS pin handling.
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Clean-up I2C platform data and bring it more in line with Colibri T30.
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Avoid the following issue on both /dev/ttyHS1 as well as /dev/ttyHS3:
[ 4419.708332] tegra_uart tegra_uart.1: Setting clk_src pll_m
[ 4419.714361] Failed to set parent pll_m for uartb (violates clock
limit 600000000)
[ 4427.469124] tegra_uart tegra_uart.3: Setting clk_src pll_m
[ 4427.476177] Failed to set parent pll_m for uartd (violates clock
limit 600000000)
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Integrate spidev support straight from Colibri T20.
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Instead of copying the boot loader frame buffer which currently neither
displays anything worth preserving nor even what it has in the right
resolution make sure both LVDS as well as HDMI frame buffers get
cleared during initialisation to avoid displaying random garbled stuff.
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Add the following tested (e.g. framebuffer console and X) video modes:
- 1280x1024@60
- 1600x1200@60
- 1680x1050@60
- 1920x1080p
- 1920x1200
And the following portrait modes:
- 480x640
- 540x960
- 720x1280
The define TEGRA_FB_VGA in board-colibri_t20.h can be used to switch
between VGA and 800x480.
While at it clean-up some defines and includes.
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Clean-up I2C platform data.
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Validate pin-muxing for latest Colibri T30 v1.1a and v1.1b module
hardware.
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Add the following tested (e.g. framebuffer console and X) video modes:
- 1280x1024@60
- 1600x1200@60
- 1680x1050@60
- 1920x1080p
- 1920x1200
And the following portrait modes:
- 480x640
- 540x960
- 720x1280
The define TEGRA_FB_VGA in board-colibri_t20.h can be used to switch
between VGA and 800x480.
While at it fix rename of CAMERA_INTERFACE to COLIBRI_T20_VI as well.
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As the new Colibri Evaluation carrier board v3.1a uses SODIMM pin 45 as
IrDA transceiver SD with a 100 K pull-down we revert to using the power
key as high active.
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GPIO keys configured as active-low either require pull-ups on the
carrier board or via pin-muxing. We enable the later for now.
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Use GPIO inputs for function tri-stating rather than pin group
tri-stating to avoid influencing neighbouring pins.
While at it get rid of most pull-up/downs and a lot of commented out
stuff.
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Rename CAMERA_INTERFACE to COLIBRI_T20_VI which stands for video input
to be more in-line with Colibri T30.
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Get rid of optional CAM/GEN3_I2C on SODIMM pin 127/133.
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Verify standard GPIO usage for latest v1.2a modules.
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The Iris carrier board by default uses SODIMM pin 73 as DAC power save.
Note: This conflicts with the CAN interrupt on the new EvalBoard v3.1a.
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VESA VGA mode defines hsync/vsync to be of polarity low rather than
high.
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The HDMI power rail configuration used to be done within the LVDS aka
TFTLCD panel enable function. Now moving it to the platform power
initialisation where it really belongs. This avoids any
duplicate/spurious regulator configuration.
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As the deep-sleep LP0 suspend mode is currently anyway not supported
default to the LP1 suspend mode for now.
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The full PMIC power off decreases power consumption but doing a
subsequent reset won't force a re-boot any more.
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Clean-up the following unused regulator supplies in the platform power
stuff:
p_cam_avdd, avdd_lvds, vddio_sys (panjit_touch), vmmc (sdhci-tegra.3)
and avdd_2v85.
While at it add some more comments concerning specific consumers/rails.
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Instead of copying the boot loader frame buffer which currently neither
displays anything worth preserving nor even what it has in the right
resolution make sure both LVDS as well as HDMI frame buffers get
cleared during initialisation to avoid displaying random garbled stuff.
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The boot logo and framebuffer console where displayed with a wrong
stride caused by a colour depth mismatch. Fix this by initially
configuring the display controllers to 16 bpp.
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Fix two issues concerning SDMMC4B pinmux (e.g. using a regular SD card
as the boot device instead of the on-module eMMC). First according to
the TRM it is illegal to mux a certain function to two sets of balls
(e.g. the regular SDMMC4 as well as the SDMMC4B muxing). Second make
absolutely sure all unused balls are not only tri-stating their outputs
but also disable their inputs to prevent any illegal internal states.
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Make sure NC balls are not only tri-stating their outputs but also do
not drive their inputs but rather have them pulled down in order to
prevent any unstable internal values.
While at it fix alphabetical order of the pinmuxes.
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This fixes the following build issue:
arch/arm/mach-tegra/board-colibri_t30.c:276:41: error:
'colibri_t30_emmc_platform_data' defined but not used
[-Werror=unused-variable]
cc1: all warnings being treated as errors
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Verify standard GPIO usage for latest v1.1a samples.
While at it get rid of some commented out obsolete stuff.
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Integrate proper Ethernet initialisation analogous to how it is done
for the Colibri T20.
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Add a commented out define for v1.0a modules with optional NAND
variants which are auto detected.
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As we don't want to exclusively reserve the detection GPIO temporarily
enabling it is still required.
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Integrate USB OTG functionality similar to Colibri T20.
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Clean up various comments, indentation and white space issues.
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Get rid of duplicate USB EHCI ULPI VIEWPORT stuff in Kconfig.
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Several file names and paths showed copy/paste or otherwise issues.
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Looks like this DPD stuff whatever it is fails eMMC detection on our
current Colibri T30 prototypes.
See f4cd0d4448d65a42b65c338f85a3ab8064923c61.
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Android R14 userspace seems to have issues with timestamp support:
[ 14.764337] host1x host1x: SurfaceFlinger: syncpoint id 8 (disp0_a) stuck waiting 3, timeout=2147483447
[ 14.773845] host1x host1x: id 8 (disp0_a) min 2 max 4
[ 14.779163] host1x host1x: id 9 (disp1_a) min 2 max 4
[ 14.784316] host1x host1x: id 18 (2d_0) min 21 max 25
[ 14.789586] host1x host1x: id 20 (disp0_b) min 2 max 4
[ 14.794889] host1x host1x: id 21 (disp1_b) min 2 max 4
[ 14.800241] host1x host1x: id 22 (3d) min 77 max 95
[ 14.805217] host1x host1x: id 24 (disp0_c) min 2 max 4
[ 14.810573] host1x host1x: id 25 (disp1_c) min 2 max 4
[ 14.815873] host1x host1x: id 26 (vblank0) min 800 max 0
[ 14.821264] host1x host1x: id 27 (vblank1) min 684 max 0
[ 14.826810] host1x host1x: waitbase id 3 val 77
Therefore conditionally revert it in that case for now.
See e4e2e776a3d4bf1adf37fc061cfdfb92281f3ace.
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Use the existing boardfile for everything, just match using DT.
See df80522dd557e2759552b6c6b0f1f1c8ad1c5614.
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Add configurability support for i2s parameters.
See 907bac80691c7df5b5b57cbf27f91e8bb1dcf434.
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This is a WAR solution that allows for the turning on SD DPD feature.
The original issue is that enabling SD DPD immediately after device
comes out of LP0 causes ULPI disconnect. The root cause of that is not
known.
The WAR is to delay the enabling of SD DPD for 100ms after
device comes out of LP0.
While at it remove commented out tegra_reserve stuff.
See 5e07056dc8b922b8b43a01b60a949c1dda75d9a9.
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Enable device tree support for Colibri T20 by adding board compatible
table.
See 293b009a282e1508a4947d84463fdfe820445a50.
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Since there is no PMC available in tegra2 we will not be able to get
any remote wakeup events. Hence do not power of the phy during usb
suspend.
See c4a5c51e493a8d4154c15c95d2bd93b348090892.
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SODIMM pin 135 is really GPIO K6 multiplexed with ACC1_DETECT. Unfortunately the later can't be tri-stated but since it is anyway always an input it should not interfere. Please note however that this SODIMM pin is rather low resistance.
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Conflicts:
arch/arm/mach-tegra/tegra3_usb_phy.c
arch/arm/mach-tegra/usb_phy.c
drivers/usb/gadget/tegra_udc.c
drivers/usb/otg/Makefile
drivers/video/tegra/fb.c
sound/soc/tegra/tegra_pcm.c
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Add emc table for 256 MB module version. Assume less than 256 MB of
kernel memory (e.g. physical memory minus carveout and framebuffers)
means we are running on a 256 MB module.
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Implement the following GPIO keys:
- find (SODIMM pin 77)
- home (SODIMM pin 127)
- back (SODIMM pin 133, Iris X16-14)
- volume up (SODIMM pin 22)
- volume down (SODIMM pin 24)
- power (SODIMM pin 45, Iris X16-20)
- menu (SODIMM pin 135)
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