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path: root/arch/arm/mm/pageattr.c
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2012-08-15mm: Avoid freeing init and initrd memory when CPA is enabled.Krishna Reddy
Align memblock reserve for text area to PMD size. Reserve the memory hole between DRAM start and Page table start. Add Sanity check to avoid section split in text area. Bug 1028787 Change-Id: I586e4ad6e3a94aa0c79b302e51156dbe089e481f Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/121883 (cherry picked from commit 65d02640b4b0b38263687c7f3e664c873237dc43) Reviewed-on: http://git-master/r/123431 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-08-15mm: Fix incorrect cache attribute restoration.Krishna Reddy
armv7 uses cache policy as WRITEALLOC. CPA is restoring the cache attributes to WRITEBACK during set_pages_array_wb(). Fixed issues in pmd to pte prot translation and vice versa. Change-Id: I8406b784f62d559f657ef7bc08e77c83ac6e5690 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/122472 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-06-07mm: Ensure pte and pmd stores ordering.Krishna Reddy
Bug 974153 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Change-Id: I294a93eca0b395c8c2639a7d6a2d29c54447ae37 Reviewed-on: http://git-master/r/105215 Tested-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com> Reviewed-by: Vinod Rex <vrex@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
2012-03-12ARM: mm: Use CONFIG_CPAKrishna Reddy
Use CONFIG_CPA flag to allow disabling CPA code. Change-Id: Ic6a4993dbabbef8d9847295f698887d73d81269a Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/88464 Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2012-01-19arm: mm: Optimze cache flush in CPA.Krishna Reddy
Optimze cache flush time and enable cache flush for high mem pages in CPA. Bug 865816 Change-Id: I15736010bd26c18ea0d3350c15769675f07ac055 Reviewed-on: http://git-master/r/71725 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/75880 Reviewed-by: Automatic_Commit_Validation_User
2011-12-15arm: mm: convert cpa_lock to mutex.Krishna Reddy
convert cpa lock to mutex from spin lock. This is needed as page allocs, which can sleep, are happening inside the spinlock. Bug 913652 Change-Id: I8a31e31c2ca8f7631ec626a82a74509494f47219 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/69517 Reviewed-by: Automatic_Commit_Validation_User
2011-11-30arm: mm: change_page_attr supportVinod Rex
bug 865816 Adapted from x86 change_page_attr() implementation Change-Id: I398c9d460b841484de4fcfcac10ffffdf49a4a5a Reviewed-on: http://git-master/r/56769 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Tested-by: Krishna Reddy <vdumpa@nvidia.com> Rebase-Id: Rddeccf358c948ba84af52316f084814ae53dca5e