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deprieved from boundary msi support patch
add the following modifications
* use the RC's line address 0x01FF8000 instead of one
actual physical memory as the msi start address.
The physical memory address is not mandatory required by the
msi start address.
* set PCI_MSI_FLAGS_ENABLE in RC's msi capability
structure when the msi int is enabled.
* the data of msg is only 16bit, set the upper 8bit
cputype, and the msi int num to the lower 8bit.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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1. work for multiple ipu instance
2. add mxc_dispdrv support
A display device driver could call mxc_dispdrv_register(drv) in its
dev_probe() function.
- Move all dev_probe() things into mxc_dispdrv_driver->init(), init()
function should init and feedback setting;
- Move all dev_remove() things into mxc_dispdrv_driver->deinit();
- Move all dev_suspend() things into fb_notifier for SUSPEND, if there is;
- Move all dev_resume() things into fb_notifier for RESUME, if there is;
ipuv3 fb driver would call mxc_dispdrv_init(drv_name, setting) before a
fb need be added, with fbi param passing by setting, after mxc_dispdrv_init()
return, FB driver should get the basic setting about fbi info and ipuv3-hw
(ipu_id and disp_id).
there are many display interfaces on imx5x or imx6x platform, all of them
are connected with ipuv3-DI, mxc_dispdrv can register display device as:
"lcd" -- display extend port for lcdif
"ldb" -- lvds bridge on chip (imx5x or imx6x)
"tve" -- tve for tveout on chip (imx5x)
"vga" -- vga through tve on chip (imx5x)
"hdmi" -- hdmi on platform with ddc support
(sii902x on imx53 - not enable yet)
hdmi on chip with ddc support
(imx6x - not enable yet)
"dvi" -- dvi port with ddc support (not enable yet)
take tvout as example, a dispdrv structure and register flow could like below:
static struct mxc_dispdrv_driver tve_drv = {
.name = "tve",
.init = tvout_init,
.deinit = tvout_deinit,
};
mxc_dispdrv_register(&tve_drv);
in ipuv3 fb driver could init tve driver like below:
setting.if_fmt = interface_pix_fmt;
setting.dft_mode_str = mode_str;
setting.default_bpp = default_bpp;
setting.fbi = fbi;
mxc_dispdrv_init("tve", &setting);
based on mxc_dispdrv framework, display cmdline option will become
as below (take mx53 loco board as example -- fb0 for wvga lcd, fb1 for
XGA vga):
video=mxcfb0:dev=lcd,800x480M@55,if=RGB565
video=mxcfb1:dev=vga,VGA-XGA,if=GBR24
"mxcfb0" means setting for fb0 device, ipuv3 fb driver will request setting
from registered dispdrv, these setting include what's the ipu and what's the
DI number this dev used. Normally, if one IPU is first used, ipuv3 fb driver
will create one overlay fb right after current fb driver create.
Take above cmdline as an example,
/dev/fb0 will be first fb device on 800x480 lcd.
/dev/fb1 will be overlay fb device on 800x480 lcd.
/dev/fb2 will be second fb device on VGA-XGA vga.
"dev=" means which display device(lcd,ldb,vga etc) you want choose for this fb.
"800x480M@55 or VGA-XGA" means the mode_str of video mode you want.
"if=" means the display device hw interface format.
such setting could be passed by platform data as a default value, cmdline
option will replace these values if there are.
3. modify ldb/tve driver and add mxc_lcdif driver.
For ldb driver, there are below modes could be set by cmdline options:
"ldb=spl0/1" -- split mode on DI0/1
"ldb=dul0/1" -- dual mode on DI0/1
"ldb=sin0/1" -- single mode on DI0/1
"ldb=sep" -- separate mode
there are two LVDS channels(LVDS0 and LVDS1) which can transfer video datas,
there two channels can be used as split/dual/single/separate mode.
split mode means display data from DI0 or DI1 will send to both channels
LVDS0+LVDS1.
dual mode means display data from DI0 or DI1 will be duplicated on LVDS0 and
LVDS1, it said, LVDS0 and LVDS1 has the same content.
single mode means only work for DI0->LVDS0 or DI1->LVDS1.
separate mode means you can make DI0->LVDS0 and DI1->LVDS1 work at the same
time.
Signed-off-by: Jason Chen <jason.chen@freescale.com>
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MSL code for bring up MX6 sabreauto board with Single core.
Merged from testbuild:imx6_bringup branch.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Singed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Sammy He <r62914@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Merged-by: Zeng Zhaoming <b32542@freescale.com>
Reviewed-by: Jason Liu <r64343@freescale.com>
Reviewed-by: Frank Li <Frank.Li@freescale.com>
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Since support for mxc91231 was introduced 2009 it only saw patches that
were part of (mxc or arm) global cleanups. The only supported machine
only had 4 devices (2x UART, sdhc, watchdog).
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
LAKML-Reference: 1302211482-17926-1-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move to SOC_SOC_IMX5X. Leave only places which prevent multi-soc
using ARCH_MX5X.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jikos/trivial: (43 commits)
Documentation/trace/events.txt: Remove obsolete sched_signal_send.
writeback: fix global_dirty_limits comment runtime -> real-time
ppc: fix comment typo singal -> signal
drivers: fix comment typo diable -> disable.
m68k: fix comment typo diable -> disable.
wireless: comment typo fix diable -> disable.
media: comment typo fix diable -> disable.
remove doc for obsolete dynamic-printk kernel-parameter
remove extraneous 'is' from Documentation/iostats.txt
Fix spelling milisec -> ms in snd_ps3 module parameter description
Fix spelling mistakes in comments
Revert conflicting V4L changes
i7core_edac: fix typos in comments
mm/rmap.c: fix comment
sound, ca0106: Fix assignment to 'channel'.
hrtimer: fix a typo in comment
init/Kconfig: fix typo
anon_inodes: fix wrong function name in comment
fix comment typos concerning "consistent"
poll: fix a typo in comment
...
Fix up trivial conflicts in:
- drivers/net/wireless/iwlwifi/iwl-core.c (moved to iwl-legacy.c)
- fs/ext4/ext4.h
Also fix missed 'diabled' typo in drivers/net/bnx2x/bnx2x.h while at it.
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1. Add entries to Kconfig
2. Add machine definition
3. Add Uart platform data, pad setting and base address
4. Adjust GPIO irq number
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add core definitions and memory map, gpio, irq, iomux, uart device
support.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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mx5 SoCs have different GPIO port count.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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"gadget", "through", "command", "maintain", "maintain", "controller", "address",
"between", "initiali[zs]e", "instead", "function", "select", "already",
"equal", "access", "management", "hierarchy", "registration", "interest",
"relative", "memory", "offset", "already",
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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imx/master
Removed selection of COMMON_CLKDEV by CONFIG_ARCH_MX5. This is handled
in 03e09cd8902717b66f940357257d8ad76114d9f2.
arch/arm/plat-mxc/iomux-mx1-mx2.c was moved to
arch/arm/plat-mxc/iomux-v1.c in 5e2e95f520538e095d10456acd28d9107317aa32
and got bug fixed in 5c17ef878fa25e04b1e8f1d8f5fa8b267753472c. The bug
in arch/arm/plat-mxc/iomux-v1.c isn't present any more since
bac3fcfad565c9bbceeed8b607f140c29df97355, so
arch/arm/plat-mxc/iomux-mx1-mx2.c is simply deleted.
Conflicts:
arch/arm/plat-mxc/Kconfig
arch/arm/plat-mxc/Makefile
arch/arm/plat-mxc/iomux-mx1-mx2.c
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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This is important for kernels supporting more than one SoC.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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Prepare for i.MX5 SoC code by adding the relevant macros to common plat-mxc
code.
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
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Freescale i.MX51 processor uses a new interrupt controller. Add
driver for TrustZone Interrupt Controller
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
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The WM8350 core won't actually use the range yet, but it will in
future and the platform data to configure it is there now.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Dmitriy Taychenachev <dimichxp@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move ifdef under function brackets. This fixes compile crach when IRQ priorities
are disabled.
Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
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i.MX3x SoCs contain an Image Processing Unit, consisting of a Control
Module (CM), Display Interface (DI), Synchronous Display Controller (SDC),
Asynchronous Display Controller (ADC), Image Converter (IC), Post-Filter
(PF), Camera Sensor Interface (CSI), and an Image DMA Controller (IDMAC).
CM contains, among other blocks, an Interrupt Generator (IG) and a Clock
and Reset Control Unit (CRCU). This driver serves IDMAC and IG. They are
supported over dmaengine and irq-chip APIs respectively.
IDMAC is a specialised DMA controller, its DMA channels cannot be used for
general-purpose operations, even though it might be possible to configure
a memory-to-memory channel for memcpy operation. This driver will not work
with generic dmaengine clients, clients, wishing to use it must use
respective wrapper structures, they also must specify which channels they
require, as channels are hard-wired to specific IPU functions.
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Guennadi Liakhovetski <lg@denx.de>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
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This patch removes the inclusion of mach/hardware.h from mach/irqs.h and
switches to more meaningful names for the irq related macros.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Drivers which are going to use it will have to select it and use
mxc_set_irq_fiq() to set FIQ mode for this interrupt.
Signed-off-by: Paulius Zaleckas <paulius.zaleckas@teltonika.lt>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Darius Augulis <augulis.darius@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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