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System could run into STOP and LPRun modes. When system was working in STOP mode,
pressing SW1 button or inserting or removing SD card could wake up it.
Signed-off-by: Alison Wang <b18965@freescale.com>
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Add MSL support for MVF platform.
Signed-off-by: Jason Jin <Jason.jin@freescale.com>
Signed-off-by: Alison Wang <b18965@freescale.com>
Signed-off-by: Jingchang Lu <b35083@freescale.com>
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In order to support one image for i.mx6q and i.mx6dl, we introduce
the below functions by diff the value reading from ANATOP ID register.
cpu_is_mx6q() and cpu_is_mx6dl()
The layout for the register defines:
Major Minor
i.MX6Q1.1: 6300 01
i.MX6Q1.0: 6300 00
i.MX6DL1.0: 6100 00
For the common bits shared across all i.mx6 ports, we can use:
cpu_is_mx6() for it.
Signed-off-by: Jason Liu <r64343@freescale.com>
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fix build error on mx5 platforms
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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the common API is needed by drivers to distinguish TO version
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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Add file board-mx6q_sabreauto.c. The only real difference from
board-mx6q_arm2.c is SD pin configuration is changed.
Signed-off-by: Eric Sun <jian.sun@freescale.com>
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Updated the IOMUX Pad settings. Updated the UART
settings for Sabre-lite. Added Board define incase
we need to identify different board revisions
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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1.add new board level file related to new pmic driver
2.support for new board id for RevB of LOCO,so it can support
both RevA and RevB boards
Signed-off-by: Robin Gong <B38343@freescale.com>
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Enable CPUFREQ on 2.6.38
Remove the dependency between CPUFREQ and bus_freq driver.
Allow for CPUFREQ and DVFS-CORE to co-exist.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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1. Enable dormant mode in suspend, which means arm
core will be powered off when enter wfi, the latest
command for stop mode and dormant mode are as below:
echo standby > /sys/power/state
-> stop mode with arm core power on
echo mem > /sys/power/state
-> stop mode with arm core power off
2. Remove all iram related code in suspend.
Signed-off-by: Anson Huang <b20788@freescale.com>
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After merge mx6 MSL code, MX5 default configure build failed,
This is caused by mx6 macro definition, and wrongly removed sdma
common code.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
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MSL code for bring up MX6 sabreauto board with Single core.
Merged from testbuild:imx6_bringup branch.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
Singed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Anish Trivedi <anish@freescale.com>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Lily Zhang <r58066@freescale.com>
Signed-off-by: Sammy He <r62914@freescale.com>
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Merged-by: Zeng Zhaoming <b32542@freescale.com>
Reviewed-by: Jason Liu <r64343@freescale.com>
Reviewed-by: Frank Li <Frank.Li@freescale.com>
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imx51_babbage:
imx53_smd: add i2c device
imx53_smd: add i2c board device info
imx53_smd: add esdhc device support
imx53_smd: Add SRTC devices
imx53_smd: enable the AHCI SATA
imx53_smd: Add GPIO Keypad support
imx53_ard: enable ARD board bootup
imx53_ard: add ethernet pin mux
imx53_ard: add smsc911x device
imx53_loco: add i2c device
imx53_loco: change sii902x i2c device
imx53_loco: register v4l2 output device
imx53_loco: add srtc device
imx53_loco: enable the AHCI SATA
imx53_loco: Add GPIO Keypad support
imx53_evk: add evk and arm2 boards io setting and set up display
imx5: add ipu\vpu
imx5: clock.c: remove RATE_PROPAGATES
imx5: Add clock, dvfs, busfreq, sdram_autogating support.
imx5: fix warnings on boot
imx5: add v4l2 device
imx5: add board_is_rev support
imx5: Add sdma support for i.Mx53 and i.Mx51
imx5: add p1003
imx5: add ipuv3
imx5: add sata
imx5: add pmic board files
imx5: add pm function
imx5: add iram config
imx5: add gpu
imx5: fix clock debug enable_count error
imx53: add gpio irq support for mx53
imx53: change PWM backlight device register method to dynamic
imx53: change v4l2 device register method to dynamic
imx53: add vpu devices support
imx53: add dvfs-core and busfreq devices register method
imx53: Add usb devices
imx53: add i2c pad settings
imx53: add ssi support
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Jason Chen <b02280@freescale.com>
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
Signed-off-by: Zhang Yan <b34916@freescale.com>
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LAKML-Reference: 1302464943-20721-6-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Since support for mxc91231 was introduced 2009 it only saw patches that
were part of (mxc or arm) global cleanups. The only supported machine
only had 4 devices (2x UART, sdhc, watchdog).
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
LAKML-Reference: 1302211482-17926-1-git-send-email-u.kleine-koenig@pengutronix.de
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Implement code for MX51 that allows the SoC to enter WFI when
arch_idle is called.
This patch is also necessary for correctly suspending the system.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Having the silicon revision to appear on the boot log is a useful information.
MX31 and MX35 already show the silicon revision on boot.
Add support for displaying such information for MX51 as well.
Tested on a MX51EVK, where it shows:
CPU identified as i.MX51, silicon rev 3.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move to SOC_SOC_IMX3X.
Leave ARCH_MX31/35 definitions there, in case some place prevent multi-soc
single image.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Move to SOC_SOC_IMX5X. Leave only places which prevent multi-soc
using ARCH_MX5X.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add core definitions and memory map, gpio, irq, iomux, uart device
support.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Instead of reading the silicon version from ROM, we should
read the SREV register from the IIM.
Freescale has dropped all support for MX51 REV1.0, only MX51
REV 2.0 and 3.0 are valid.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add iomux, clocks, and memory map for Freescale's MX53 SoC.
Add cpu_is_mx53 function to common.h.
Add 3 more banks of gpio's to mxc_gpio_ports.
Add MX53 phys offset address.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Currently, only two operating points: 160Mhz and 800Mhz.
the operating points are tested on babbage 3.0
Signed-off-by: Yong Shen <yong.shen@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Prepare for i.MX5 SoC code by adding the relevant macros to common plat-mxc
code.
Signed-off-by: Amit Kucheria <amit.kucheria@canonical.com>
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This has the addional effect that the macros CSCR_U, CSCR_L and CSCR_A
are not used anymore in mach-pcm038.c and mach-qong.c. These still use
the deprecated IO_ADDRESS macro and shouldn't be used in new code.
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
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don't use
IO_ADDRESS($base) + $offset
but
IO_ADDRESS($base + $offset)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Holger Schurig <hs4233@mail.mn-solutions.de>
Cc: Rabin Vincent <rabin@rab.in>
Cc: "Agustín Ferrín Pozuelo" <gatoguan-os@yahoo.com>
Cc: Javier Martin <javier.martin@vista-silicon.com>
Cc: Valentin Longchamp <valentin.longchamp@epfl.ch>
Cc: Daniel Mack <daniel@caiaq.de>
Cc: Dmitriy Taychenachev <dimichxp@gmail.com>
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Signed-off-by: Dmitriy Taychenachev <dimichxp@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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We had hardcoded cpu_is_ macros for mxc architectures till now. As we
want to run the same kernel on i.MX31 and i.MX35 this patch adds cpu_is_
macros which expand to 0 or 1 if only one architecture is compiled in and
only check for the cpu type if more than one architecture is compiled
in.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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* define new CONFIG_ARCH_MX21 (this one is currently mutually exclusive to
CONFIG_ARCH_MX27, but this might change)
* splits one header file. Memory definitions, interrupt sources,
DMA channels are split into common part, i.MX27 specific and i.MX21
specific.
* guard access to UART5/UART6, which don't exist on i.MX21
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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* adds Kconfig variables
* specifies different physical address for i.MX21 because of the
different memory layouts
* disables support for UART5/UART6 in the i.MX serial driver
(the i.MX21 doesn't have those modules)
Based on code from "Martin Fuzzey" <mfuzzey@gmail.com>
Signed-off-by: Holger Schurig <hs4233@mail.mn-solutions.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This adds macros to get CSCR upper, lower and additional registers.
These registers are needed to configure a chip select line. The offset
layouts of these Registers are identical on mx27 and mx31, hence we can
use the macros in generic way
Signed-off-by: Luotao Fu <l.fu@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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This just leaves include/asm-arm/plat-* to deal with.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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