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path: root/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi
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2022-07-08LF-6447 arm64: dts: imx8: add default clock rate for usdhcShenwei Wang
Add default clock rate for usdhc nodes. Reviewed-by: Frank Li <frank.li@nxp.com> Signed-off-by: Shenwei Wang <shenwei.wang@nxp.com>
2021-11-02arm64: dts: imx: back to use bit-offset for LPCGDong Aisheng
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2021-11-02arm64: dts: freescale: Switch from clock-indices to bit-offsetsAbel Vesa
This is a temporary fix after rebasing the linux-nxp/dts/imx8 on top of next-20210514. The reason we're doing the switch is to keep the dts working. The upstream version of the dts files already use clock-indices. The NXP's tree needs to become ready to do so too. Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
2021-11-02LF-2594-1 ARM64: dts: remove all mlb support for imx8qm/qxpClark Wang
Remove all MLB related nodes and dts file. Reviewed-by: Fugang Duan <fugang.duan@nxp.com> Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
2021-11-02MLK-24374-2 arm64: dts: imx8qm: Move USBH1 to imx8qm-ss-connFabio Estevam
Commit ee96e9f815d6 ("MLK-24368-1 arm64: dts: imx8qm: Add support for USBH1") caused i.MX8DXL USB PHYs to not go into low power mode via runtime suspend. Fix it by moving the usbh1, usbmisc2 and usbphynop2 to the specific imx8qm-ss-conn.dtsi file. While at it, change the usbphynop2 status as disabled. Reviewed-by: Jun Li <jun.li@nxp.com> Tested-by: Sebastien Haezebrouck <sebastien.haezebrouck@nxp.com> Reported-by: Sebastien Haezebrouck <sebastien.haezebrouck@nxp.com> Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2021-11-02MLK-24368-1 arm64: dts: imx8qm: Add support for USBH1Alifer Moraes
Add support for USBH1 on imx8qm, USBH1 is a HSIC controller Reviewed-by: Jun Li <jun.li@nxp.com> CC: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Alifer Moraes <alifer.moraes@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2021-11-02arm64: dts: imx8-ss-conn: apply changes for upstream Cadence USB3 driverPeter Chen
Change board dts as well to avoid bisect break, the main changes are as belows: - Add iommus phandle for core device - delete core device node for xen dts - Support mek board by adding Type-C support Reviewed-by: Jun Li <jun.li@nxp.com> Signed-off-by: Peter Chen <peter.chen@nxp.com>
2021-11-02MLK-23000-3 ARM64: dts: imx8qxp: add mlb dtsClark Wang
Add mlb dts file for imx8qxp-lpddr4-val platform. Signed-off-by: Clark Wang <xiaoning.wang@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com>
2021-11-02arm64: dts: add imx8qxp gpmi-nand dtsHan Xu
add gpmi-nand dts for nand support on imx8qxp val Signed-off-by: Han Xu <han.xu@nxp.com>
2021-11-02MLK-22445-2 ARM64: dts: imx8-ss-conn: add Cadence USB3 supportPeter Chen
Add Cadence USB3 support Signed-off-by: Peter Chen <peter.chen@nxp.com>
2021-11-02arm64: dts: imx8: conn: fully switched to new clk bindingDong Aisheng
fully switched to new clk binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2021-11-02ARM64: dts: imx8-ss-conn: add NXP USB2 nodePeter Chen
Add NXP USB2 controller and PHY node Signed-off-by: Peter Chen <peter.chen@nxp.com>
2021-11-02ARM64: dts: imx8qxp/imx8qm: add SD3.0 supportHaibo Chen
Add SD3.0 support, and make usdhc support eMMC V5.1 Signed-off-by: Haibo Chen <haibo.chen@nxp.com> [ Aisheng: fix minior conflicts due to 3944b454f7fa ("arm64: dts: imx8qxp: Move usdhc clocks assignment to board DT") ] Sign-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2021-06-12arm64: dts: imx8: conn: fix enet clock settingDong Aisheng
enet_clk_ref actually is sourced from internal gpr clocks which needs a default rate. Also update enet lpcg clock output names to be more straightforward. Cc: Abel Vesa <abel.vesa@nxp.com> Cc: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8: switch to new lpcg clock bindingDong Aisheng
switch to new lpcg clock binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8: switch to two cell scu clock bindingDong Aisheng
switch to two cell scu clock binding Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8: add conn lpcg clocksDong Aisheng
Add conn lpcg clocks Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29arm64: dts: imx8qxp: orginize dts in subsystemsDong Aisheng
MX8 SoC is comprised of a few HW subsystems while some of them can be reused in the different SoCs. So let's re-orginize them into subsystems in device tree as well for the possible reuse of the common part. Note, as there's still no devices of hsio subsys, so removed it first instead of creating a subsys headfile with no devices. They will be added back when new devices added. Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: Sascha Hauer <kernel@pengutronix.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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