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The A53 900MHz opp is actually 896MHz when reading back from SCFW, so
use the 896MHz instead of 900MHz to make it accurate enough.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
(cherry picked from commit 58be8bf3e6e8f51ed3a3b8f992baaa9eeaf3516d)
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Add lpuart4 node for i.MX8QM.
Reviewed-by: Robin Gong <yibin.gong@nxp.com>
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Signed-off-by: Franck LENORMAND <franck.lenormand@nxp.com>
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After change e00f0e9f115b604 ("ASoC: fsl_dsp: Rename reserved-region
with memory-region") reserved memory area for DSP is now grabbed
from DSP node property named memory-region instead of reserved-region.
We've done this change in order to align with upstream implementation.
Usually we should support the old property name but because
imx-audio-framework is is obsolete and planned for removal in the future
we won't do that.
Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
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Mark ocotp as read only, if you need to program fuse in linux,
remove this property.
Acked-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Add dts file for mipi dsi nodes and the corresponding endpoints.
Signed-off-by: Robert Chiras <robert.chiras@nxp.com>
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Add USB2 and USB3 wakeup support
Acked-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Peter Chen <peter.chen@nxp.com>
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Add alias for ethernet nodes.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Update thermal zone number to 6 to support PMIC thermal zone.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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There is no LPCG clock defined for DSP in imx8qm, so disable
dsp lpcg clock.
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Add A72 cluster OPP table to support cpufreq.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add A72 cluster thermal zone support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add smmu node, enable smmu for usdhc/fec/usb/sata
Signed-off-by: Peng Fan <peng.fan@nxp.com>
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Security subsystem includes:
-caam crypto engine
-secure memory
Notes:
1. caam has 4 job rings, however only last 2 rings are accessible
from the kernel.
2. Controller DT node is added in the same power domain as the JR2
(1st jr showing in DT).
This is needed since controller driver (ctrl.c) needs first jr
(JR2 in this case) "powered", so it can access its register page
(which has some aliases for registers located in controller page,
page that is not accesible from the kernel).
Adding controller DT node to the power domain leads to SCU f/w
being instructed to "power up" JR2.
What actually happens is that:
-XRDC2 is programmed to provide access to JR2 register page
-SECO f/w is instructed to update JR2DID_LS and possibly
JR2DID_MS[USE_OUT].
USE_OUT details from Security RM:
"JRaDID_MS contains a USE_OUT field that enables a second set of ICID
and DID values.
When USE_OUT=1, this Job Ring's *data* write transactions will assert
TrustZone Non-SecureWorld, along with the OUT_DID and OUT_ICID values
from JRSDID_LS.
All other bus transactions, including all reads, descriptor write-backs
and job completion status writes will assert the PRIM_ICID, PRIM_ICID and
not PRIM_TZ values from JRaDID_MS.
When USE_OUT=0, all bus transactions performed on behalf of this Job Ring
will use the PRIM_ICID, PRIM_ICID and not PRIM_TZ values from JRSDID_MS."
Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
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Enable enet wakeup irqs into scu-pd wakeup irq list.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Add gpu in device tree:
arm64/boot/dts/freescale/imx8-ss-gpu0.dtsi
arm64/boot/dts/freescale/imx8-ss-gpu1.dtsi
arm64/boot/dts/freescale/imx8qm-mek.dts
arm64/boot/dts/freescale/imx8qm-ss-gpu.dtsi
arm64/boot/dts/freescale/imx8qm.dtsi
arm64/boot/dts/freescale/imx8qxp-ss-gpu.dtsi
arm64/boot/dts/freescale/imx8qxp.dtsi
Signed-off-by: Minjie Zhuang <minjie.zhuang@nxp.com>
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Enable dsp basic function in imx8qm and imx8qxp
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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enable vpu decoder and encoder
Signed-off-by: Zhou Peng <eagle.zhou@nxp.com>
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enable audio sound card (dsp, amix, asrc, esai, sai, cs42888, wm8960)
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Move hdmi tx function out of imx8qm-mek.dts.
Disable lvds devices in imx8qm-mek-hdmi.dts,
then hdmi tx function should not depend on LVDS connector plugged.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
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Add partition reset function for i.MX8QM/QXP.
Signed-off-by: Clark Wang <xiaoning.wang@nxp.com>
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Add m4_1 rpmsg support on i.mx8qm-mek board.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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Image subsystem of imx8qm, qxp have some common part and some different
part. For qm, img ss include ISI, CSI0 and CSI1. For qxp, img ss include
ISI, CSI0 and PI0. So split two dtsi file to disable the unrelated modules
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
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Add imx_sc_pwr_key driver for i.mx8qm/qxp.
Signed-off-by: Robin Gong <yibin.gong@nxp.com>
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Add another ddr perf monitor device node.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
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This patch adds LVDS0/1 subsystems support for i.MX8qm.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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This patch adds DC0/1 subsystem support for i.MX8qm.
Signed-off-by: Liu Ying <victor.liu@nxp.com>
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Add scu watchdog support for i.MX8QM.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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General MU IRQ is added but with no name specified in mbox-names
node, add it.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Pass wakeup source's hardware irq number for CAN.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
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Add CAN alias on i.MX8QM.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
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Add a "wakeup-irq" property in scu pd's node to pass wakeup
source's hardware irq number for irqsteer wakeup support in
kernel.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add lpi2c and intmux for CM41 subsystem.
Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
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Add i.MX8QM serial alias for lpuart ports.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Can't access this LPCG on QM, not sure if it's doc incorrectness issue.
Anyway it seems the driver actually is not using it currently, so it's
safe to disable.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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move pciea into qm hsio ss
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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Include the required second level SoC dtsi.
Also move PD node before scu clk node.
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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convert to new clock binding
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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fix lpuart alias name
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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Add the reserved memory and enable RPMSG.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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Add general MU interrupt support, now suspend/resume waked
up by RTC alarm is working.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add A53 OPP table to support cpu-freq.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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This patch adds i.MX8QM thermal zones support.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add SCU RTC node to support SC RTC driver.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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Add ocotp fuse support and enable enet MAC fuse.
Signed-off-by: Fugang Duan <fugang.duan@nxp.com>
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Add image sensor subsystem support for imx8qm platform
Signed-off-by: Guoniu.zhou <guoniu.zhou@nxp.com>
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enable audio modules
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
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Add the hsio pcie support for imx8qm/qxp.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
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The i.MX8QuadMax is a Dual (2x) Cortex-A72 and Quad (4x) Cortex-A53
proccessor with powerful graphic and multimedia features.
This patch adds i.MX8QuadMax SoC dtsi file.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: devicetree@vger.kernel.org
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <kernel@pengutronix.de>
Cc: Fabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
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