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2022-04-15arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-fireflyRob Herring
[ Upstream commit 37cbd3c522869247ed4525b5042ff4c6a276c813 ] A label reference without brackets is a path string, not a phandle as intended. Add the missing brackets. Fixes: a5002c41c383 ("arm64: dts: rockchip: add WiFi module support for Firefly-RK3399") Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20220304202559.317749-1-robh@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-03-19arm64: dts: rockchip: reorder rk3399 hdmi clocksSascha Hauer
[ Upstream commit 2e8a8b5955a000cc655f7e368670518cbb77fe58 ] The binding specifies the clock order to "cec", "grf", "vpll". Reorder the clocks accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220126145549.617165-19-s.hauer@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-03-19arm64: dts: rockchip: fix rk3399-puma eMMC HS400 signal integrityJakob Unterwurzacher
[ Upstream commit 62966cbdda8a92f82d966a45aa671e788b2006f7 ] There are signal integrity issues running the eMMC at 200MHz on Puma RK3399-Q7. Similar to the work-around found for RK3399 Gru boards, lowering the frequency to 100MHz made the eMMC much more stable, so let's lower the frequency to 100MHz. It might be possible to run at 150MHz as on RK3399 Gru boards but only 100MHz was extensively tested. Cc: Quentin Schulz <foss+kernel@0leil.net> Signed-off-by: Jakob Unterwurzacher <jakob.unterwurzacher@theobroma-systems.com> Signed-off-by: Quentin Schulz <quentin.schulz@theobroma-systems.com> Link: https://lore.kernel.org/r/20220119134948.1444965-1-quentin.schulz@theobroma-systems.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-03-08arm64: dts: rockchip: Switch RK3399-Gru DP to SPDIF outputBrian Norris
commit b5fbaf7d779f5f02b7f75b080e7707222573be2a upstream. Commit b18c6c3c7768 ("ASoC: rockchip: cdn-dp sound output use spdif") switched the platform to SPDIF, but we didn't fix up the device tree. Drop the pinctrl settings, because the 'spdif_bus' pins are either: * unused (on kevin, bob), so the settings is ~harmless * used by a different function (on scarlet), which causes probe failures (!!) Fixes: b18c6c3c7768 ("ASoC: rockchip: cdn-dp sound output use spdif") Signed-off-by: Brian Norris <briannorris@chromium.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20220114150129.v2.1.I46f64b00508d9dff34abe1c3e8d2defdab4ea1e5@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-12-22arm64: dts: rockchip: fix audio-supply for Rock Pi 4Alex Bee
[ Upstream commit 8240e87f16d17a9592c9d67857a3dcdbcb98f10d ] As stated in the schematics [1] and [2] P5 the APIO5 domain is supplied by RK808-D Buck4, which in our case vcc1v8_codec - i.e. a 1.8 V regulator. Currently only white noise comes from the ES8316's output, which - for whatever reason - came up only after the the correct switch from i2s0_8ch_bus to i2s0_2ch_bus for i2s0's pinctrl was done. Fix this by setting the correct regulator for audio-supply. [1] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi4_v13_sch_20181112.pdf [2] https://dl.radxa.com/rockpi4/docs/hw/rockpi4/rockpi_4c_v12_sch_20200620.pdf Fixes: 1b5715c602fd ("arm64: dts: rockchip: add ROCK Pi 4 DTS support") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20211027143726.165809-1-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-12-22arm64: dts: rockchip: fix rk3399-leez-p710 vcc3v3-lan supplyJohn Keeping
[ Upstream commit 2b454a90e2ccdd6e03f88f930036da4df577be76 ] Correct a typo in the vin-supply property. The input supply is always-on, so this mistake doesn't affect whether the supply is actually enabled correctly. Fixes: fc702ed49a86 ("arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBC") Signed-off-by: John Keeping <john@metanate.com> Link: https://lore.kernel.org/r/20211102182908.3409670-3-john@metanate.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-12-22arm64: dts: rockchip: remove mmc-hs400-enhanced-strobe from rk3399-khadas-edgeArtem Lapkin
[ Upstream commit 6dd0053683804427529ef3523f7872f473440a19 ] Remove mmc-hs400-enhanced-strobe from the rk3399-khadas-edge dts to improve compatibility with a wider range of eMMC chips. Before (BJTD4R 29.1 GiB): [ 7.001493] mmc2: CQHCI version 5.10 [ 7.027971] mmc2: SDHCI controller on fe330000.mmc [fe330000.mmc] using ADMA ....... [ 7.207086] mmc2: mmc_select_hs400es failed, error -110 [ 7.207129] mmc2: error -110 whilst initialising MMC card [ 7.308893] mmc2: mmc_select_hs400es failed, error -110 [ 7.308921] mmc2: error -110 whilst initialising MMC card [ 7.427524] mmc2: mmc_select_hs400es failed, error -110 [ 7.427546] mmc2: error -110 whilst initialising MMC card [ 7.590993] mmc2: mmc_select_hs400es failed, error -110 [ 7.591012] mmc2: error -110 whilst initialising MMC card After: [ 6.960785] mmc2: CQHCI version 5.10 [ 6.984672] mmc2: SDHCI controller on fe330000.mmc [fe330000.mmc] using ADMA [ 7.175021] mmc2: Command Queue Engine enabled [ 7.175053] mmc2: new HS400 MMC card at address 0001 [ 7.175808] mmcblk2: mmc2:0001 BJTD4R 29.1 GiB [ 7.176033] mmcblk2boot0: mmc2:0001 BJTD4R 4.00 MiB [ 7.176245] mmcblk2boot1: mmc2:0001 BJTD4R 4.00 MiB [ 7.176495] mmcblk2rpmb: mmc2:0001 BJTD4R 4.00 MiB, chardev (242:0) Fixes: c2aacceedc86 ("arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boards") Signed-off-by: Artem Lapkin <art@khadas.com> Link: https://lore.kernel.org/r/20211115083321.2627461-1-art@khadas.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-11-17arm64: dts: rockchip: Fix GPU register width for RK3328Alex Bee
[ Upstream commit 932b4610f55b49f3a158b0db451137bab7ed0e1f ] As can be seen in RK3328's TRM the register range for the GPU is 0xff300000 to 0xff330000. It would (and does in vendor kernel) overlap with the registers of the HEVC encoder (node/driver do not exist yet in upstream kernel). See already existing h265e_mmu node. Fixes: 752fbc0c8da7 ("arm64: dts: rockchip: add rk3328 mali gpu node") Signed-off-by: Alex Bee <knaerzche@gmail.com> Link: https://lore.kernel.org/r/20210623115926.164861-1-knaerzche@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-07-25arm64: dts: rockchip: Fix power-controller node names for rk3328Elaine Zhang
[ Upstream commit 6e6a282b49c6db408d27231e3c709fbdf25e3c1b ] Use more generic names (as recommended in the device tree specification or the binding documentation) Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210417112952.8516-7-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-07-25arm64: dts: rockchip: Fix power-controller node names for px30Elaine Zhang
[ Upstream commit d5de0d688ac6e0202674577b05d0726b8a6af401 ] Use more generic names (as recommended in the device tree specification or the binding documentation) Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com> Reviewed-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210417112952.8516-6-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-07-25arm64: dts: rockchip: fix pinctrl sleep nodename for rk3399.dtsiJohan Jonker
[ Upstream commit a7ecfad495f8af63a5cb332c91f60ab2018897f5 ] A test with the command below aimed at powerpc generates notifications in the Rockchip arm64 tree. Fix pinctrl "sleep" nodename by renaming it to "suspend" for rk3399.dtsi make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/powerpc/sleep.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20210126110221.10815-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-02-17arm64: dts: rockchip: Fix PCIe DT properties on rk3399Marc Zyngier
[ Upstream commit 43f20b1c6140896916f4e91aacc166830a7ba849 ] It recently became apparent that the lack of a 'device_type = "pci"' in the PCIe root complex node for rk3399 is a violation of the PCI binding, as documented in IEEE Std 1275-1994. Changes to the kernel's parsing of the DT made such violation fatal, as drivers cannot probe the controller anymore. Add the missing property makes the PCIe node compliant. While we are at it, drop the pointless linux,pci-domain property, which only makes sense when there are multiple host bridges. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200815125112.462652-3-maz@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2021-02-10arm64: dts: rockchip: fix vopl iommu irq on px30Sandy Huang
[ Upstream commit 656c648354e1561fa4f445b0b3252ec1d24e3951 ] The vop-mmu shares the irq with its matched vop but not the vpu. Fixes: 7053e06b1422 ("arm64: dts: rockchip: add core dtsi file for PX30 SoCs") Signed-off-by: Sandy Huang <hjc@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Ezequiel Garcia <ezequiel@collabora.com> Reviewed-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Tested-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com> Link: https://lore.kernel.org/r/20210108110627.3231226-1-heiko@sntech.de Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-12-30arm64: dts: rockchip: Fix UART pull-ups on rk3328Chen-Yu Tsai
[ Upstream commit 94dad6bed3c86c00050bf7c2b2ad6b630facae31 ] For UARTs, the local pull-ups should be on the RX pin, not the TX pin. UARTs transmit active-low, so a disconnected RX pin should be pulled high instead of left floating to prevent noise being interpreted as transmissions. This gets rid of bogus sysrq events when the UART console is not connected. Fixes: 52e02d377a72 ("arm64: dts: rockchip: add core dtsi file for RK3328 SoCs") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20201204064805.6480-1-wens@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-12-30arm64: dts: rockchip: Set dr_mode to "host" for OTG on rk3328-roc-ccChen-Yu Tsai
[ Upstream commit 4076a007bd0f6171434bdb119a0b8797749b0502 ] The board has a standard USB A female port connected to the USB OTG controller's data pins. Set dr_mode in the OTG controller node to indicate this usage, instead of having the implementation guess. Fixes: 2171f4fdac06 ("arm64: dts: rockchip: add roc-rk3328-cc board") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20201126073336.30794-2-wens@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-12-16arm64: dts: rockchip: Assign a fixed index to mmc devices on rk3399 boards.Markus Reichl
[ Upstream commit 0011c6d182774fc781fb9e115ebe8baa356029ae ] Recently introduced async probe on mmc devices can shuffle block IDs. Pin them to fixed values to ease booting in environments where UUIDs are not practical. Use newly introduced aliases for mmcblk devices from [1]. [1] https://patchwork.kernel.org/patch/11747669/ Signed-off-by: Markus Reichl <m.reichl@fivetechno.de> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20201104162356.1251-1-m.reichl@fivetechno.de Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19arm64: dts: rockchip: fix rk3399-puma gmac reset gpioHeiko Stuebner
[ Upstream commit 8a445086f8af0b7b9bd8d1901d6f306bb154f70d ] The puma gmac node currently uses opposite active-values for the gmac phy reset pin. The gpio-declaration uses active-high while the separate snps,reset-active-low property marks the pin as active low. While on the kernel side this works ok, other DT users may get confused - as seen with uboot right now. So bring this in line and make both properties match, similar to the other Rockchip board. Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20200603132836.362519-1-heiko@sntech.de Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19arm64: dts: rockchip: fix rk3399-puma vcc5v0-host gpioHeiko Stuebner
[ Upstream commit 7a7184f6cfa9279f1a1c10a1845d247d7fad54ff ] The puma vcc5v0_host regulator node currently uses opposite active-values for the enable pin. The gpio-declaration uses active-high while the separate enable-active-low property marks the pin as active low. While on the kernel side this works ok, other DT users may get confused - as seen with uboot right now. So bring this in line and make both properties match, similar to the gmac fix. Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20200604091239.424318-1-heiko@sntech.de Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-08-19arm64: dts: rockchip: fix rk3368-lion gmac reset gpioHeiko Stuebner
[ Upstream commit 2300e6dab473e93181cf76e4fe6671aa3d24c57b ] The lion gmac node currently uses opposite active-values for the gmac phy reset pin. The gpio-declaration uses active-high while the separate snps,reset-active-low property marks the pin as active low. While on the kernel side this works ok, other DT users may get confused - as seen with uboot right now. So bring this in line and make both properties match, similar to the other Rockchip board. Fixes: d99a02bcfa81 ("arm64: dts: rockchip: add RK3368-uQ7 (Lion) SoM") Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Link: https://lore.kernel.org/r/20200607212909.920575-1-heiko@sntech.de Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-03arm64: dts: rockchip: swap interrupts interrupt-names rk3399 gpu nodeJohan Jonker
[ Upstream commit c604fd810bda667bdc20b2c041917baa7803e0fb ] Dts files with Rockchip rk3399 'gpu' nodes were manually verified. In order to automate this process arm,mali-midgard.txt has been converted to yaml. In the new setup dtbs_check with arm,mali-midgard.yaml expects interrupts and interrupt-names values in the same order. Fix this for rk3399. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/gpu/ arm,mali-midgard.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200425143837.18706-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-06-03arm64: dts: rockchip: fix status for &gmac2phy in rk3328-evb.dtsJohan Jonker
[ Upstream commit c617ed88502d0b05149e7f32f3b3fd8a0663f7e2 ] The status was removed of the '&gmac2phy' node with the apply of a patch long time ago, so fix status for '&gmac2phy' in 'rk3328-evb.dts'. Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200425122345.12902-2-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-05-20arm64: dts: rockchip: Rename dwc3 device nodes on rk3399 to make dtc happyChen-Yu Tsai
commit 190c7f6fd43a776d4a6da1dac44408104649e9b7 upstream. The device tree compiler complains that the dwc3 nodes have regs properties but no matching unit addresses. Add the unit addresses to the device node name. While at it, also rename the nodes from "dwc3" to "usb", as guidelines require device nodes have generic names. Fixes: 7144224f2c2b ("arm64: dts: rockchip: support dwc3 USB for rk3399") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20200327030414.5903-7-wens@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-05-20arm64: dts: rockchip: Replace RK805 PMIC node name with "pmic" on rk3328 boardsChen-Yu Tsai
commit 83b994129fb4c18a8460fd395864a28740e5e7fb upstream. In some board device tree files, "rk805" was used for the RK805 PMIC's node name. However the policy for device trees is that generic names should be used. Replace the "rk805" node name with the generic "pmic" name. Fixes: 1e28037ec88e ("arm64: dts: rockchip: add rk805 node for rk3328-evb") Fixes: 955bebde057e ("arm64: dts: rockchip: add rk3328-rock64 board") Signed-off-by: Chen-Yu Tsai <wens@csie.org> Link: https://lore.kernel.org/r/20200327030414.5903-3-wens@kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-02-24arm64: dts: rockchip: add reg property to brcmf sub-nodesJohan Jonker
[ Upstream commit 96ff264bccb22175bbe2185a1eb5204ca3c5f03f ] An experimental test with the command below gives this error: rk3399-firefly.dt.yaml: dwmmc@fe310000: wifi@1: 'reg' is a required property rk3399-orangepi.dt.yaml: dwmmc@fe310000: wifi@1: 'reg' is a required property rk3399-khadas-edge.dt.yaml: dwmmc@fe310000: wifi@1: 'reg' is a required property rk3399-khadas-edge-captain.dt.yaml: dwmmc@fe310000: wifi@1: 'reg' is a required property rk3399-khadas-edge-v.dt.yaml: dwmmc@fe310000: wifi@1: 'reg' is a required property So fix this by adding a reg property to the brcmf sub node. Also add #address-cells and #size-cells to prevent more warnings. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200110142128.13522-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-24arm64: dts: rockchip: fix dwmmc clock name for px30Johan Jonker
[ Upstream commit 7f2147350291569acd1df5a26dcdfc573916016f ] An experimental test with the command below gives this error: px30-evb.dt.yaml: dwmmc@ff390000: clock-names:2: 'ciu-drive' was expected 'ciu-drv' is not a valid dwmmc clock name, so fix this by changing it to 'ciu-drive'. make ARCH=arm64 dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/rockchip-dw-mshc.yaml Signed-off-by: Johan Jonker <jbx6244@gmail.com> Link: https://lore.kernel.org/r/20200110161200.22755-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-24arm64: dts: rockchip: Fix NanoPC-T4 cooling mapsRobin Murphy
[ Upstream commit a793e19c15f25a126138ac4ae9facf9204754af3 ] Although it appeared to follow logically from the bindings, apparently the thermal framework can't properly cope with a single cooling device being shared between multiple maps. The CPU zone is probably easier to overheat, so remove the references to the (optional) fan from the GPU cooling zone to avoid things getting confused. Hopefully GPU-intensive tasks will leak enough heat across to the CPU zone to still hit the fan trips before reaching critical GPU temperatures. Signed-off-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/5bb39f3115df1a487d717d3ae87e523b03749379.1573908197.git.robin.murphy@arm.com Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-10-10arm64: dts: rockchip: Fix override mode for rk3399-kevin panelDouglas Anderson
When I re-posted Sean's original commit to add the override mode for the kevin panel, for some reason I didn't notice that the pixel clock wasn't quite right. Looking at /sys/kernel/debug/clk/clk_summary on downstream kernels it can be seen that the VOP clock is supposed to be 266,666,667 Hz achieved by dividing the 800 MHz PLL by 3. Looking at history, it seems that even Sean's first patch [1] had this funny clock rate. I'm not sure where it came from since the commit message specifically mentioned 26666 kHz and the Chrome OS tree [2] can be seen to request 266667 kHz. In any case, let's fix it up. This together with my patch [3] to do the proper rounding when setting the clock rate makes the VOP clock more proper as seen in /sys/kernel/debug/clk/clk_summary. [1] https://lore.kernel.org/r/20180206165626.37692-4-seanpaul@chromium.org [2] https://chromium.googlesource.com/chromiumos/third_party/kernel/+/chromeos-4.4/drivers/gpu/drm/panel/panel-simple.c#1172 [3] https://lkml.kernel.org/r/20191003114726.v2.1.Ib233b3e706cf6317858384264d5b0ed35657456e@changeid Fixes: 84ebd2da6d04 ("arm64: dts: rockchip: Specify override mode for kevin panel") Cc: Sean Paul <seanpaul@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/20191008124949.1.I674acd441997dd0690c86c9003743aacda1cf5dd@changeid Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-10-10arm64: dts: rockchip: Fix usb-c on Hugsun X99 TV BoxVivek Unune
Fix usb-c on X99 TV Box. Tested with armbian w/ kernel 5.3 Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Link: https://lore.kernel.org/r/20190929032230.24628-1-npcomplete13@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-10-10arm64: dts: rockchip: fix RockPro64 sdmmc settingsSoeren Moch
According to the RockPro64 schematic [1] the rk3399 sdmmc controller is connected to a microSD (TF card) slot. Remove the cap-mmc-highspeed property of the sdmmc controller, since no mmc card can be connected here. [1] http://files.pine64.org/doc/rockpro64/rockpro64_v21-SCH.pdf Fixes: e4f3fb490967 ("arm64: dts: rockchip: add initial dts support for Rockpro64") Signed-off-by: Soeren Moch <smoch@web.de> Link: https://lore.kernel.org/r/20191004203213.4995-1-smoch@web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-10-04arm64: dts: rockchip: fix RockPro64 sdhci settingsSoeren Moch
The RockPro64 schematics [1], [2] show that the rk3399 EMMC_STRB pin is connected to the RESET pin instead of the DATA_STROBE pin of the eMMC module. So the data strobe cannot be used for its intended purpose on this board, and so the HS400 eMMC mode is not functional. Limit the controller to HS200. [1] http://files.pine64.org/doc/rockpro64/rockpro64_v21-SCH.pdf [2] http://files.pine64.org/doc/rock64/PINE64_eMMC_Module_20170719.pdf Fixes: e4f3fb490967 ("arm64: dts: rockchip: add initial dts support for Rockpro64") Signed-off-by: Soeren Moch <smoch@web.de> Link: https://lore.kernel.org/r/20191003215036.15023-2-smoch@web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-10-04arm64: dts: rockchip: fix RockPro64 vdd-log regulator settingsSoeren Moch
The RockPro64 schematic [1] page 18 states a min voltage of 0.8V and a max voltage of 1.4V for the VDD_LOG pwm regulator. However, there is an additional note that the pwm parameter needs to be modified. From the schematics a voltage range of 0.8V to 1.7V can be calculated. Additional voltage measurements on the board show that this fix indeed leads to the correct voltage, while without this fix the voltage was set too high. [1] http://files.pine64.org/doc/rockpro64/rockpro64_v21-SCH.pdf Fixes: e4f3fb490967 ("arm64: dts: rockchip: add initial dts support for Rockpro64") Signed-off-by: Soeren Moch <smoch@web.de> Link: https://lore.kernel.org/r/20191003215036.15023-1-smoch@web.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-10-04arm64: dts: rockchip: fix Rockpro64 RK808 interrupt lineHugh Cole-Baker
Fix the pinctrl and interrupt specifier for RK808 to use GPIO3_B2. On the Rockpro64 schematic [1] page 16, it shows GPIO3_B2 used for the interrupt line PMIC_INT_L from the RK808, and there's a note which translates as: "PMU termination GPIO1_C5 changed to this". Tested by setting an RTC wakealarm and checking /proc/interrupts counters. Without this patch, neither the rockchip_gpio_irq counter for the RK808, nor the RTC alarm counter increment when the alarm time is reached. With this patch, both interrupt counters increment by 1 as expected. [1] http://files.pine64.org/doc/rockpro64/rockpro64_v21-SCH.pdf Fixes: e4f3fb490967 ("arm64: dts: rockchip: add initial dts support for Rockpro64") Signed-off-by: Hugh Cole-Baker <sigmaris@gmail.com> Link: https://lore.kernel.org/r/20190921131457.36258-1-sigmaris@gmail.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-09-01arm64: dts: rockchip: limit clock rate of MMC controllers for RK3328Shawn Lin
150MHz is a fundamental limitation of RK3328 Soc, w/o this limitation, eMMC, for instance, will run into 200MHz clock rate in HS200 mode, which makes the RK3328 boards not always boot properly. By adding it in rk3328.dtsi would also obviate the worry of missing it when adding new boards. Fixes: 52e02d377a72 ("arm64: dts: rockchip: add core dtsi file for RK3328 SoCs") Cc: stable@vger.kernel.org Cc: Robin Murphy <robin.murphy@arm.com> Cc: Liang Chen <cl@rock-chips.com> Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-22arm64: dts: rockchip: add rk3328 VPU nodeJonas Karlman
This patch add a VPU device node for rk3328. Signed-off-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-19arm64: dts: rockchip: fix vcc_host_5v regulator for usb3 hostKever Yang
According to rock64 schemetic V2 and V3, the VCC_HOST_5V output is controlled by USB_20_HOST_DRV, which is the same as VCC_HOST1_5V. V1 hardware was never sold and only V2/V3 is with customers, so there is no need to keep a seaprate v1 version around. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-16arm64: dts: rockchip: Add dts for Leez RK3399 P710 SBCAndy Yan
P710 is a RK3399 based SBC, designed by Leez [0]. Specification - Rockchip RK3399 - 4/2GB LPDDR4 - TF sd scard slot - eMMC - M.2 B-Key for 4G LTE - AP6256 for WiFi + BT - Gigabit ethernet - HDMI out - 40 pin header - USB 2.0 x 2 - USB 3.0 x 1 - USB 3.0 Type-C x 1 - TYPE-C Power supply [0]https://leez.lenovo.com Signed-off-by: Andy Yan <andyshrk@gmail.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-08-16arm64: dts: rockchip: enable internal SPI flash for RockPro64.Andrius Štikonas
The rockpro64 contains a nor-flash chip connected to spi1. Signed-off-by: Andrius Štikonas <andrius@stikonas.eu> [a number of cleanups] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-07-25arm64: dts: rockchip: Add PWM fan for RockPro64Andrius Štikonas
RockPro64 has a dedicated circuit for driving a 12V fan from PWM1. At the moment this makes fan spin at full speed. fancontrol can be used to control fan speed. E.g. the following config file works well: INTERVAL=10 DEVPATH=hwmon0=devices/platform/pwm-fan DEVNAME=hwmon0=pwmfan FCTEMPS=hwmon0/device/pwm1=../thermal/thermal_zone0/temp MINTEMP=hwmon0/device/pwm1=40 MAXTEMP=hwmon0/device/pwm1=60 MINSTART=hwmon0/device/pwm1=100 MINSTOP=hwmon0/device/pwm1=70 In the future it would be nice to define trip points in dts file, so that kernel could adjust fan speed itself. Signed-off-by: Andrius Štikonas <andrius@stikonas.eu> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-07-22arm64: dts: rockchip: Specify override mode for kevin panelSean Paul
This patch adds an override mode for kevin devices. The mode increases both back porches to allow a pixel clock of 26666kHz as opposed to the 'typical' value of 252750kHz. This is needed to avoid interference with the touch digitizer on these laptops. Cc: Doug Anderson <dianders@chromium.org> Cc: Eric Anholt <eric@anholt.net> Cc: Heiko Stuebner <heiko@sntech.de> Cc: Jeffy Chen <jeffy.chen@rock-chips.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Stéphane Marchesin <marcheu@chromium.org> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: devicetree@vger.kernel.org Cc: dri-devel@lists.freedesktop.org Cc: linux-rockchip@lists.infradead.org Signed-off-by: Sean Paul <seanpaul@chromium.org> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Fix USB3 Type-C on rk3399-sapphireVicente Bergas
Before this patch, the Type-C port on the Sapphire board is dead. If setting the 'regulator-always-on' property to 'vcc5v0_typec0' then the port works for about 4 seconds at start-up. This is a sample trace with a memory stick plugged in: 1.- The memory stick LED lights on and kernel reports: [ 4.782999] scsi 0:0:0:0: Direct-Access USB DISK PMAP PQ: 0 ANSI: 4 [ 5.904580] sd 0:0:0:0: [sdb] 3913344 512-byte logical blocks: (2.00 GB/1.87 GiB) [ 5.906860] sd 0:0:0:0: [sdb] Write Protect is off [ 5.908973] sd 0:0:0:0: [sdb] Mode Sense: 23 00 00 00 [ 5.909122] sd 0:0:0:0: [sdb] No Caching mode page found [ 5.911214] sd 0:0:0:0: [sdb] Assuming drive cache: write through [ 5.951585] sdb: sdb1 [ 5.954816] sd 0:0:0:0: [sdb] Attached SCSI removable disk 2.- 4 seconds later the memory stick LED lights off and kernel reports: [ 9.082822] phy phy-ff770000.syscon:usb2-phy@e450.2: charger = USB_DCP_CHARGER 3.- After a minute the kernel reports: [ 71.666761] usb 5-1: USB disconnect, device number 2 It has been checked that, although the LED is off, VBUS is present. If, instead, the dr_mode is changed to host and the phy-supply changed accordingly, then it works. It has only been tested in host mode. Signed-off-by: Vicente Bergas <vicencb@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCsEnric Balletbo i Serra
As per binding documentation [1], the DWC3 core should have the "ref", "bus_early" and "suspend" clocks. As explained in the binding, those clocks are required for new platforms but not for existing platforms before commit fe8abf332b8f ("usb: dwc3: support clocks and resets for DWC3 core"). However, as those clocks are really treated as required, this ends with having some annoying messages when the "rockchip,rk3399-dwc3" is used: [ 1.724107] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2 [ 1.731893] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2 [ 2.495937] dwc3 fe800000.dwc3: Failed to get clk 'ref': -2 [ 2.647239] dwc3 fe900000.dwc3: Failed to get clk 'ref': -2 In order to remove those annoying messages, update the DWC3 hardware module node and add all the required clocks. With this change, both, the glue node and the DWC3 core node, have the clocks defined, but that's not really a problem and there isn't a side effect on do this. So, we can get rid of the annoying get clk error messages. [1] Documentation/devicetree/bindings/usb/dwc3.txt Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: enable rk3328 watchdog clockLeonidas P. Papadakos
Add the missing clock property for the watchdog on rk3328. Signed-off-by: Leonidas P. Papadakos <papadakospan@gmail.com> [set wdt node to always enabled, as it is not board-specific] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Add support for Hugsun X99 TV BoxVivek Unune
Add devicetree support for Hugsun X99 TV Box based on RK3399 SoC Tested with LibreElec running kernel v5.1.2. Following peripherals tested and work: Peripheral works: - UART2 debug - eMMC - USB 3.0 port - USB 2.0 port - sdio, sd-card - HDMI - Ethernet - WiFi/BT Not tested: - Type-C port - OPTICAL - IR Signed-off-by: Vivek Unune <npcomplete13@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Define values for the IPA governor for rock960Daniel Lezcano
Currently the default thermal values for the rk3399-rock960 board is inherited from the generic definition in rk3399.dtsi. In order to ensure the rock960 has more room for througput before being capped by the thermal framework and is correctly supported by the IPA governor, let's define the power values and the right trip points for better performances: - sustainable power is tested to be 1550mW - increase the first mitigation point to 75°C in order to get better performances - the first trip point is 65°C in order to let the IPA to collect enough data for the PID regulation when it reaches 75°C - restrict the cooling device to the big CPUs as the little CPUs contribution to the heating effect can be considered negligible The intelligent power allocator PID coefficient to be set in sysfs are: k_d: 0 k_po: 79 k_i: 10 k_pu: 50 Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: Fix multiple thermal zones conflict in rk3399.dtsiDaniel Lezcano
Currently the common thermal zones definitions for the rk3399 assumes multiple thermal zones are supported by the governors. This is not the case and each thermal zone has its own governor instance acting individually without collaboration with other governors. As the cooling device for the CPU and the GPU thermal zones is the same, each governors take different decisions for the same cooling device leading to conflicting instructions and an erratic behavior. As the cooling-maps is about to become an optional property, let's remove the cpu cooling device map from the GPU thermal zone. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: add core dtsi file for RK3399Pro SoCsJianqun Xu
This patch adds core dtsi file for Rockchip RK3399Pro SoCs, include rk3399.dtsi. Also enable pciei0/pcie_phy for AP to talk to NPU part inside SoC. Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-27arm64: dts: rockchip: improve rk3328-roc-cc rgmii performance.Peter Geis
Currently the rk3328-roc-cc ethernet is enabled using "snps,force_thresh_dma_mode". While this works, the performance leaves a lot to be desired. A previous attempt to improve performance used "snps,txpbl = <0x4>". This also allowed networking to function, but performance varied between boards. This patch takes that one step further. Set txpbl and rxpbl to 0x4. This can also be accomplished with "snps,pbl =<0x4>" which affects both. Also set "snps,aal" which forces address aligned DMA mode. Fixes: 4bc4d6013b7f (arm64: dts: rockchip: fix rk3328-roc-cc gmac2io stability issues) Signed-off-by: Peter Geis <pgwipeout@gmail.com> Tested-by: Leonidas P. Papadakos <papadakospan@gmail.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-14arm64: dts: rockchip: Add support for Khadas Edge/Edge-V/Captain boardsNick Xie
Add devicetree support for Khadas Edge/Edge-V/Captain boards. Khadas Edge is an expandable Rockchip RK3399 board with goldfinger. Khadas Captain is the carrier board for Khadas Edge. Khadas Edge-V is a Khadas VIM form factor Rockchip RK3399 board. Signed-off-by: Nick Xie <nick@khadas.com> [edge-captain and edge-v contain different components that are supposed to get added in future patches, so should stay separate while looking somewhat similar right now] Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-14arm64: dts: rockchip: Enable HDMI audio on Rock PiEzequiel Garcia
This commit enables the hdmi-sound device needed to have audio over HDMI on the Rock Pi board. Fixes: 1b5715c602fda ("arm64: dts: rockchip: add ROCK Pi 4 DTS support") Signed-off-by: Ezequiel Garcia <ezequiel@collabora.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2019-06-04arm64: dts: rockchip: add WiFi+BT support on ROCK Pi4 boardAkash Gajjar
Rock Pi 4 has a on board AP6256 WiFi/BT Module. enable wifi and bluetooth support on Rock Pi 4 board. Signed-off-by: Akash Gajjar <akash@openedev.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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