Age | Commit message (Collapse) | Author |
|
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
Uncomment UART4 device tree node and enable support in machfile
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
arch/arm/mach-tegra/board-ardbeg.c: In function 'ardbeg_touch_init':
arch/arm/mach-tegra/board-ardbeg.c:1159:6: error: this 'else' clause
does not guard... [-Werror=misleading-indentation]
} else
^~~~
arch/arm/mach-tegra/board-ardbeg.c:1161:5: note: ...this statement, but
the latter is misleadingly indented as if it is guarded by the 'else'
rm31080a_ardbeg_spi_board[0].irq =
^~~~~~~~~~~~~~~~~~~~~~~~~
arch/arm/mach-tegra/board-ardbeg.c: In function 'tegra_ardbeg_late_init':
arch/arm/mach-tegra/board-ardbeg.c:1470:2: error: this 'else' clause
does not guard... [-Werror=misleading-indentation]
else
^~~~
arch/arm/mach-tegra/board-ardbeg.c:1474:3: note: ...this statement, but
the latter is misleadingly indented as if it is guarded by the 'else'
tegra_io_dpd_enable(&pexbias_io);
^~~~~~~~~~~~~~~~~~~
At top level:
arch/arm/mach-tegra/board-ardbeg.c:1608:27: error:
'loki_dt_board_compat' defined but not used
[-Werror=unused-const-variable=]
static const char * const loki_dt_board_compat[] = {
^~~~~~~~~~~~~~~~~~~~
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Max Krummenacher <max.krummenacher@toradex.com>
|
|
Optimized DVFS table for Apalis TK1 boards.
Signed-off-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
This patch adds support for the Toradex Apalis TK1 acomputer on module
which can be used on different carrier boards.
The module consists of a Tegra TK1 SoC, a PMIC solution, 2 GB of DDR3L
RAM, a bunch of level shifters, an eMMC, a TMP451 temperature sensor
chip, an I210 gigabit Ethernet controller and a SGTL5000 audio codec.
Furthermore, there is a Kinetis MK20DN512 companion micro controller for
analogue, CAN and resistive touch functionality which is not yet
supported.
This is known to boot into either a basic Angstrom/OpenEmbedded/Yocto
or L4T/JetPack Ubuntu based image.
The following things are known to work to a certain extend:
- analogue/digital audio
- debug UART1
- DVFS power management incl. low power core migration
- eMMC
- gigabit Ethernet
- GPIOs
- HDMI (incl. HDA audio)
- I2C
- LVDS
- PCIe
- SATA
- SD/MMC cards
- temperature sensor
- USB host ports
The rest is untested.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
Fix the backlight PWM instance used and add 800x600 and 1024x600 LVDS
panel timings.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
This fixes the following GCC 5.2 built time error:
arch/arm/mach-tegra/tegra_cl_dvfs.c: In function 'monitor_get':
arch/arm/mach-tegra/tegra_cl_dvfs.c:372:8: error: 'v' may be used uninitialized in this function [-Werror=maybe-uninitialized]
*data &= CL_DVFS_MONITOR_DATA_MASK;
^
arch/arm/mach-tegra/tegra_cl_dvfs.c:2949:6: note: 'v' was declared here
u32 v, s;
^
arch/arm/mach-tegra/tegra_cl_dvfs.c: In function 'cl_dvfs_calibrate':
arch/arm/mach-tegra/tegra_cl_dvfs.c:372:8: error: 'data' may be used uninitialized in this function [-Werror=maybe-uninitialized]
*data &= CL_DVFS_MONITOR_DATA_MASK;
^
arch/arm/mach-tegra/tegra_cl_dvfs.c:902:11: note: 'data' was declared here
u32 val, data;
^
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
|
|
newer compilers throw the following error:
arch/arm/mach-tegra/tegra12_clocks.c: In function 'tegra12_cpu_clk_init':
arch/arm/mach-tegra/tegra12_clocks.c:1334:31: error: logical not is only applied to the left hand side of comparison [-Werror=logical-not-parentheses]
c->state = (!is_lp_cluster() == (c->u.cpu.mode == MODE_G))? ON : OFF;
Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
|
|
While working on the 32-bit ARM port of UEFI, I noticed a strange
corruption in the kernel log. The following snprintf() statement
(in drivers/firmware/efi/efi.c:efi_md_typeattr_format())
snprintf(pos, size, "|%3s|%2s|%2s|%2s|%3s|%2s|%2s|%2s|%2s]",
was producing the following output in the log:
| | | | | |WB|WT|WC|UC]
| | | | | |WB|WT|WC|UC]
| | | | | |WB|WT|WC|UC]
|RUN| | | | |WB|WT|WC|UC]*
|RUN| | | | |WB|WT|WC|UC]*
| | | | | |WB|WT|WC|UC]
|RUN| | | | |WB|WT|WC|UC]*
| | | | | |WB|WT|WC|UC]
|RUN| | | | | | | |UC]
|RUN| | | | | | | |UC]
As it turns out, this is caused by incorrect code being emitted for
the string() function in lib/vsprintf.c. The following code
if (!(spec.flags & LEFT)) {
while (len < spec.field_width--) {
if (buf < end)
*buf = ' ';
++buf;
}
}
for (i = 0; i < len; ++i) {
if (buf < end)
*buf = *s;
++buf; ++s;
}
while (len < spec.field_width--) {
if (buf < end)
*buf = ' ';
++buf;
}
when called with len == 0, triggers an issue in the GCC SRA optimization
pass (Scalar Replacement of Aggregates), which handles promotion of signed
struct members incorrectly. This is a known but as yet unresolved issue.
(https://gcc.gnu.org/bugzilla/show_bug.cgi?id=65932). In this particular
case, it is causing the second while loop to be executed erroneously a
single time, causing the additional space characters to be printed.
So disable the optimization by passing -fno-ipa-sra.
Cc: <stable@vger.kernel.org>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit a077224fd35b2f7fbc93f14cf67074fc792fbac2)
|
|
With compilers which follow the C99 standard (like modern versions of gcc and
clang), "extern inline" does the wrong thing (emits code for an externally
linkable version of the inline function). In this case using static inline
and removing the NULL version of return_address in return_address.c does
the right thing.
Signed-off-by: Behan Webster <behanw@converseincode.com>
Reviewed-by: Mark Charlebois <charlebm@gmail.com>
Acked-by: Steven Rostedt <rostedt@goodmis.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
(cherry picked from commit aeea3592a13bf12861943e44fc48f1f270941f8d)
|
|
Following support added
DVFS for Gauranteed freq considering aging
CPU freq limit at higher temperature
EDP max current limits for each SKU
Bug 200195229
Change-Id: If00f3fd6b891cf366047dda331bd7ab1c15b40f7
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1146577
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
select emc evfs table based on DDR present
using RAMCODE
Bug 200195279
Change-Id: I7fbc693383c9e231b2c2119020eebc7bba544c6e
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/1144528
Reviewed-by: Jimmy Zhang <jimmzhang@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
Added kernel configurations to support
systemd functionality
boot.img size is increased by 69632 bytes
Bug 1731796
Change-Id: I4209fee15843ac645600500ed8c9fc37b7ff0c04
Signed-off-by: Ninad Malwade <nmalwade@nvidia.com>
Reviewed-on: http://git-master/r/1134828
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
enable TEGRA_WATCHDOG_ENABLE_ON_PROBE to set "timeout" in probe call
Bug 200160105
Change-Id: Ifcef77b3229acee821c5cdd2f31e449e010b9d2f
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/927464
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
change regulator-init-microvolt for ams-as3722.
Bug 1634862
Change-Id: Ie4b9d1976fca9f8bdebfb039ef2c0337e1b55dfd
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/794739
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: R Raj Kumar <rrajk@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venu Byravarasu <vbyravarasu@nvidia.com>
|
|
In case tegra_dc_sync_windows is interrupted by signal,
return the error to caller application
Bug 200090492
Change-Id: Id69fbe38d0abe0b3e71eb5a413db241ebcf0a0ae
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/784754
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
Bug 1643556
Change-Id: I7330bd3ec33e2309577c75bac79e120167b0f81e
Signed-off-by: Arun Kannan <akannan@nvidia.com>
Reviewed-on: http://git-master/r/748395
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
|
|
drop support for USB_NET_RAW_IP as its unused
Bug 200092344
Change-Id: I085330c2ed8a83f83c027d91a03d13d1ce23e4f0
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/780277
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
dap2_sclk direction should be input to
take care of the bidirectional nature of the clk
for codec as master and interface as master
Bug 1643925
Change-Id: Iab4f1a30edd3542fbfc0e1f53dd6ea9f604ed42f
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/778298
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
There are places during the CPU resume path where we access this variable
with MMU off. In such scenarios we should use the physical address for this
variable.
This fixes the virtualisation team's issue, since they were the ones who
reported it in the first place. Fix a case where the code running from
iRAM was accessing the variable from DRAM instead of the one cached in
iRAM.
Bug 1411345
Change-Id: I9005c30329d38bae305a4a7b31ae7e2ca83e8a5d
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/412540
(cherry picked from commit a0553bb8f3fa7c76c2c0a6528d0c106ee22c7a59)
Reviewed-on: http://git-master/r/771679
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Tested-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
psci status node should also be checked along with
compatible node to enable secure fimrware
Bug 200124907
Change-Id: Ieb336bc7d1cc2c68d94157222770a6da6a8dcfd1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/772755
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Initialize uninitialized variables to get the
build through
Bug 1640594
Change-Id: Ia0788c5852bb8d68a79004e3f2fa1b3d2b9ca2fe
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/772239
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
CONFIG_UID_STAT is buggy and not needed
Bug 200115637
Change-Id: I105a46e91cba63508115be6fdd1c2e49962d25e8
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/764550
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
This reverts commit 28c9354b7cbade8813e0e5dbe9937300219fbeb9.
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Change-Id: I4a809d75523513c939fa17a6dbeebee292aec77b
Reviewed-on: http://git-master/r/759472
GVS: Gerrit_Virtual_Submit
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
Using Tegra WDT to trigger FIQ when system is in soft lockup.
Bug 1581432
Change-Id: I853a88a3f6e9402c978db18c5a63e903c582040a
Signed-off-by: Renn Wu <rewu@nvidia.com>
Reviewed-on: http://git-master/r/265871
(cherry picked from commit f115f435d471af22ddec5e9d969662f79193f846)
Reviewed-on: http://git-master/r/680353
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
if vpr memory is carved out, then only call dma_alloc
for secure memory.
Bug 200057068
Change-Id: I12557cfaa48f7db729ccab17d3151916d35ce0f1
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/746153
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Added AR0261 sensor support
Bug 200089114
Signed-off-by: Tushar Khinvasara <tkhinvasara@nvidia.com>
Change-Id: I8f6d6c6ea4905d9087fd6281bc8b215ec0a73fdb
Reviewed-on: http://git-master/r/741716
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Ming Wong <miwong@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Enable CONFIG_DNOTIFY for L4T kernel config
Bug 1627091
Bug 200097847
Change-Id: I30d53089df825a776f03e1f0f08f1d6d8b1c9bb0
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/741517
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
This allows perform L1 cache clean alone.
Bug 200077334
Change-Id: I7a6106ed53755df33e09e3fa32a9e2524eb98649
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/742252
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
|
|
enable cpu-balanced cooling device on jetson-tk1
Bug 1640651
Change-Id: Ice4c50044f4ac2bfb2bc61114e6264135a92b847
Signed-off-by: Neil Chen <neilc@nvidia.com>
Reviewed-on: http://git-master/r/742125
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
bug 200007291
Change-Id: Ia1d8d4c8ea67a30c61e4178863e2f6f1bcb13753
Signed-off-by: Seshagir.H <sholi@nvidia.com>
Reviewed-on: http://git-master/r/413049
(cherry picked from commit 7564df85908c98b8fd6e5835cb02262091057d4e)
Reviewed-on: http://git-master/r/725517
GVS: Gerrit_Virtual_Submit
Reviewed-by: Jeetesh Burman <jburman@nvidia.com>
Tested-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Set Mac freq for cpu_lp to 804Mhz for 24x7 cd575mi
personality
Bug 1563635
Change-Id: I72f4ffdcdcf7ce93b940f5b7c36726d63e5b3e87
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/732544
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Bug 200044433
Change-Id: I792062649c247229270678a44d10323d2744b569
Signed-off-by: Kassey Li <kasseyl@nvidia.com>
Reviewed-on: http://git-master/r/721561
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Fix config conflict for watchdog.
Tegra watchdog is disabled by default.
Users can access /dev/watchdog0 to operate it.
Bug 1557390
Change-Id: Ia1bb6c91dfbea85375d84bef10a10209b2fcef9f
Signed-off-by: Renn Wu <rewu@nvidia.com>
Reviewed-on: http://git-master/r/712938
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
|
|
This patch adds MIPI CSI/DSIB pad control mux register
from the APB misc block to tegra pinctrl.
Without writing to this register, the dsib pads are
muxed as csi, and cannot be used.
The register is not yet documented in the TRM, here is
the description:
70000820: APB_MISC_GP_MIPI_PAD_CTRL_0
[31:02] RESERVED
[01:01] DSIB_MODE [CSI=0,DSIB=1]
[00:00] RESERVED
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
BUG=chrome-os-partner:30799
TEST=Tested on ryu
(cherry picked from commit 489c8251776de8838547207acce199f50846ded1)
Change-Id: I424f488131e51ac793814d98d018162f0644509e
Reviewed-on: https://chromium-review.googlesource.com/219832
Reviewed-on: http://git-master/r/668725
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/723409
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Updates based on v11 of Jetson_TK1_customer_pinmux.xlsm
configure pee2 as gpio
Added CSI_CD/DSI_B Muxing Option
Disable open drain for pwr_i2c
Bug 1551864
Change-Id: I708505e8664cbb56b7b4ac32e14e2e20618a3114
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/707204
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Some of PTSA regsiters are restored to wrong value that affects
other clients under memory controller. Correct it to fix audio
noise issue after LP0 resume.
Bug 1612520
Change-Id: I92f03cace5dcc81a33a71cdd4628c2112f7015ed
Signed-off-by: Roger Hsieh <rhsieh@nvidia.com>
Reviewed-on: http://git-master/r/712540
(cherry picked from commit 478e8e144acd8218421ddbf69e8dd2676a68ab8e)
Reviewed-on: http://git-master/r/713592
GVS: Gerrit_Virtual_Submit
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
For 70degC trip due to edp, increase the max limit further
to 76 as the driver applies a tolerance of 5 degC.
Also increase the shutdown limit to 105degC
Bug 1610806
Change-Id: Id6d7ed12c801e850e8147045fff03e5dbcf5d5ef
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/722316
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Non negative value of cp_rev should be treated as
a newer properly fused chip
Bug 1610806
Change-Id: I7da1bec91996bbd5a522e2f043147b48272e0500
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/721053
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Currently Android sync framework is used only in Android side,
however, it provides a generic synchronization framework that
can be used also in Linux.
This patch enables Android Sync framework on T124, T132 and T210
on Linux.
Bug 1601262
Change-Id: I46530a9b1b2245c0ddf8f7bc52b28af247350e14
Signed-off-by: Arto Merilainen <amerilainen@nvidia.com>
Signed-off-by: Naveen Kumar S <nkumars@nvidia.com>
Reviewed-on: http://git-master/r/677655
(cherry picked from commit 5998cc1d0d861986e34a74787650a79f3b1cd999)
Reviewed-on: http://git-master/r/714740
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
|
|
CD575MI:
Max GPU freq is set to 852Mhz for 4/4/16
cpu_g powered by pllx is set to 1.5 and 1.8Ghz below 0 degC
Enable SOC dvfs for default personality
CD575M:
Lower CPU freq to 1912Mhz @ Max 1.12V
Lower GPU freq to 804Mhz @ Max 1.90V
Bug 1563635
Change-Id: Ib33f34fe2c0580d0f750de40f68560031f7266b0
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/711627
GVS: Gerrit_Virtual_Submit
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
sigreturn path""
Reverting because this change causes __memcpy_neon() to corrupt if
interrupted by signal handler.
Bug 200046014
This reverts commit e700ffc891047182e16f53fc0238c8fd9bf72007.
Change-Id: I53d7214259fcff94e01bed141a4b9e6a7b29890e
Reviewed-on: http://git-master/r/710306
Signed-off-by: Yogish Kulkarni <yogishk@nvidia.com>
(cherry picked from commit d0ef94fa57264e047bf3873a60d01709a617887b)
Reviewed-on: http://git-master/r/710309
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Bug 1598204
Change-Id: I453d18ce570e57c0feab8dc3b24cc2c957b95301
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/672147
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Check max clock supported by DC before programming it with that mode.
If the requested pixel clock is greater than the maximum supported,
fall back to default mode.
Bug 200031813
Change-Id: I9c5d4373ff0ee8de039af42f46323909b0bec272
Signed-off-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-on: http://git-master/r/676941
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
Bug 1600299
Change-Id: I63f4d597bcc8b960407a7291fde6aa2ddb5bec25
Signed-off-by: Ming Wong <miwong@nvidia.com>
Reviewed-on: http://git-master/r/674099
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
GVS: Gerrit_Virtual_Submit
|
|
Tegra watchdog is disabled by default.
Users can access /dev/watchdog0 to operate it.
Bug 1557390
Change-Id: I0ee4f787336fc566900ffeb5c26c6fde6530b904
Signed-off-by: Ximing Chen <ximingc@nvidia.com>
Reviewed-on: http://git-master/r/674635
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Implement Tegra WDT FIQ debug function.
Default is disabled.
Bug 1581432
Change-Id: Ic81ab4cd3285080016b37191e6e0fab18e330a30
Signed-off-by: Renn Wu <rewu@nvidia.com>
Reviewed-on: http://git-master/r/#/c/271988
Reviewed-on: http://git-master/r/662550
Reviewed-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Enabling PSTORE configrations for L4T
Bug 1581073
Change-Id: Ic54616379a5a279117ae85cb0e3465ef5c2c70b8
Signed-off-by: Ximing Chen <ximingc@nvidia.com>
Reviewed-on: http://git-master/r/661347
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Reviewed-by: Rui Zhuo <rzhuo@nvidia.com>
Reviewed-by: Renn Wu <rewu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
|
|
Set Sata Enable to output High to get sata working
Bug 1551864
Bug 200070681
Change-Id: Ifb01377df3f597304b303487f91a26053e2f1fb6
Signed-off-by: Bibek Basu <bbasu@nvidia.com>
Reviewed-on: http://git-master/r/670552
GVS: Gerrit_Virtual_Submit
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|