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2011-07-26atomic: cleanup asm-generic atomic*.h inclusionArun Sharma
After changing all consumers of atomics to include <linux/atomic.h>, we ran into some compile time errors due to this dependency chain: linux/atomic.h -> asm/atomic.h -> asm-generic/atomic-long.h where atomic-long.h could use funcs defined later in linux/atomic.h without a prototype. This patches moves the code that includes asm-generic/atomic*.h to linux/atomic.h. Archs that need <asm-generic/atomic64.h> need to select CONFIG_GENERIC_ATOMIC64 from now on (some of them used to include it unconditionally). Compile tested on i386 and x86_64 with allnoconfig. Signed-off-by: Arun Sharma <asharma@fb.com> Cc: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-07-26atomic: move atomic_add_unless to generic codeArun Sharma
This is in preparation for more generic atomic primitives based on __atomic_add_unless. Signed-off-by: Arun Sharma <asharma@fb.com> Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-07-26atomic: use <linux/atomic.h>Arun Sharma
This allows us to move duplicated code in <asm/atomic.h> (atomic_inc_not_zero() for now) to <linux/atomic.h> Signed-off-by: Arun Sharma <asharma@fb.com> Reviewed-by: Eric Dumazet <eric.dumazet@gmail.com> Cc: Ingo Molnar <mingo@elte.hu> Cc: David Miller <davem@davemloft.net> Cc: Eric Dumazet <eric.dumazet@gmail.com> Acked-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-07-26ptrace: unify show_regs() prototypeMike Frysinger
[ poleg@redhat.com: no need to declare show_regs() in ptrace.h, sched.h does this ] Signed-off-by: Mike Frysinger <vapier@gentoo.org> Cc: Tejun Heo <tj@kernel.org> Signed-off-by: Oleg Nesterov <oleg@redhat.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-07-23Blackfin: SMP: punt unused atomic_test_mask helperMike Frysinger
No one uses this func, so just punt it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: irqs: do not trace arch_local_{*,irq_*} functionsSteven Rostedt
Do not trace arch_local_save_flags(), arch_local_irq_*() and friends. Although they are marked inline, gcc may still make a function out of them and add it to the pool of functions that are traced by the function tracer. This can cause undesirable results (kernel panic, triple faults, etc). Add the notrace notation to prevent them from ever being traced. Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: bf538: pull gpio/port logic out of core hibernate pathsMike Frysinger
Re-architect how we save/restore the gpio/port logic that only pertains to bf538/bf539 parts by pulling it out of the core code paths and pushing it out to bf538-specific locations. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: dpmc: optimize hibernate/resume pathMike Frysinger
The current save logic used in hibernation is to do a MMR load (base + offset) into a register, and then push that onto the stack. Then when restoring, pop off the stack into a register followed by a MMR store (base + offset). These use plenty of 32bit insns rather than 16bit, are pretty long winded, and full of pipeline bubbles. So, by taking advantage of MMRs that are contiguous, the multi-register push/pop insn, and register abuse, we can shrink this code considerably. When saving, the new logic does a lot of loads into the data and pointer registers before executing a single multi-register push insn. Then when restoring, we do a single multi-register pop insn followed by a lot of stores. Overall, this allows us to cut the insn count by ~30%, the code size by ~45%, and drastically reduce the register hazards that trigger bubbles in the pipeline. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: dpmc: relocate hibernate helper macrosMike Frysinger
This defines only get used in the hibernate code, so remove them from the global dpmc header as no one else cares. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: gpio/ints: generalize pint logicMike Frysinger
Have the logic that uses peripheral interrupt blocks key off of pint defines rather than CPU names so that things are generalized across families. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: gpio: punt unused GPIO_# definesMike Frysinger
These defines don't accomplish much as GPIO_# is the same thing as #. Each CPU already provides helpful symbolic defines like GPIO_<PIN> which everyone uses, so just punt these # ones. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: convert unicode space gremlinsMike Frysinger
Not sure how these guys slipped in, but they're annoying me. So bring these unicode space gremlins down to earth to normal ascii spaces. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: gptimers: add enable/disable by timer idMike Frysinger
The API is geared around timer ids, except for the act of enabling and disabling timers. So add a small helper to fill out the gap. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: gptimers: add group structure for hardware register layoutMike Frysinger
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: convert to asm-generic/mutex-dec.h for all systemsMike Frysinger
The Blackfin mutex.h is merely a copy of an older asm-generic/mutex-dec.h, so punt it and just use the common one directly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: optimize double fault boot checkingMike Frysinger
This moves the double fault data used at boot time into a single struct which can then easily be addressed with indexed loads rather than having to explicitly load multiple addresses. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-07-23Blackfin: convert to kbuild asm-generic supportMike Frysinger
No need for one line header stubs. Just declare it in Kbuild. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-28Blackfin: gptimers: add structure for hardware register layoutMike Frysinger
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-28Blackfin: wire up new sendmmsg syscallMike Frysinger
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-28Blackfin: bfin_serial.h: turn default port wrappers into stubsMike Frysinger
Any consumer that needs to access the MMRs has to provide these helpers, so make the default into useless stubs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-28Merge branch 'setns'Linus Torvalds
* setns: ns: Wire up the setns system call Done as a merge to make it easier to fix up conflicts in arm due to addition of sendmmsg system call
2011-05-28ns: Wire up the setns system callEric W. Biederman
32bit and 64bit on x86 are tested and working. The rest I have looked at closely and I can't find any problems. setns is an easy system call to wire up. It just takes two ints so I don't expect any weird architecture porting problems. While doing this I have noticed that we have some architectures that are very slow to get new system calls. cris seems to be the slowest where the last system calls wired up were preadv and pwritev. avr32 is weird in that recvmmsg was wired up but never declared in unistd.h. frv is behind with perf_event_open being the last syscall wired up. On h8300 the last system call wired up was epoll_wait. On m32r the last system call wired up was fallocate. mn10300 has recvmmsg as the last system call wired up. The rest seem to at least have syncfs wired up which was new in the 2.6.39. v2: Most of the architecture support added by Daniel Lezcano <dlezcano@fr.ibm.com> v3: ported to v2.6.36-rc4 by: Eric W. Biederman <ebiederm@xmission.com> v4: Moved wiring up of the system call to another patch v5: ported to v2.6.39-rc6 v6: rebased onto parisc-next and net-next to avoid syscall conflicts. v7: ported to Linus's latest post 2.6.39 tree. >  arch/blackfin/include/asm/unistd.h     |    3 ++- >  arch/blackfin/mach-common/entry.S      |    1 + Acked-by: Mike Frysinger <vapier@gentoo.org> Oh - ia64 wiring looks good. Acked-by: Tony Luck <tony.luck@intel.com> Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-05-26kgdbts: unify/generalize gdb breakpoint adjustmentMike Frysinger
The Blackfin arch, like the x86 arch, needs to adjust the PC manually after a breakpoint is hit as normally this is handled by the remote gdb. However, rather than starting another arch ifdef mess, create a common GDB_ADJUSTS_BREAK_OFFSET define for any arch to opt-in via their kgdb.h. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Dongdong Deng <dongdong.deng@windriver.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-05-26Blackfin: convert to asm-generic ptrace.hMike Frysinger
Signed-off-by: Mike Frysinger <vapier@gentoo.org> Cc: Oleg Nesterov <oleg@redhat.com> Cc: Jason Wessel <jason.wessel@windriver.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Ingo Molnar <mingo@redhat.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-05-25Blackfin: boards: update ASoC resources after machine driver overhaulScott Jiang
Now that the Blackfin machine drivers have been updated to the multicomponent support, update the resources to match. The pin settings are now a board issue and removed from the driver. Signed-off-by: Scott Jiang <scott.jiang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: fix addr type with bfin_write_{or,and} helpersMike Frysinger
Since the bfin_write() func needs proper type information in order to expand into the right bfin_writeX() variant, preserve the addr's type when setting up the local __addr. Otherwise the helpers will detect the variant based upon sizeof(void) which is almost never right. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: fix indentation with bfin_read() helperMike Frysinger
Use tabs instead of spaces to indent. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: initial perf_event supportMike Frysinger
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: bf537: demux port H mask A and emac rx intsMike Frysinger
The BF537 SIC combines the gpio port H mask A interrupts with the emac rx interrupt, so we need to demux this in software. It also combines the gpio port H mask B and the emac tx interrupts, and the watchdog and port F mask B interrupts, but since we don't support mask B yet, just add the defines for now. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: move bf537-specific irq code out of common codeMike Frysinger
The SIC interrupt line muxing that the bf537 does is specific to this CPU (thankfully), so rip it out of the common code and move it to a bf537-specific file. This tidies up the common code significantly. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: move internal irq prototypes out of global namespaceMike Frysinger
These are only used in a few internal Blackfin places, so move the irq prototypes out of the global header and into the internal irq one. No functional changes other than shuffling locales. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: delete duplicated user single step prototypesMike Frysinger
These are in linux/ptrace.h, so no need for us to duplicate them. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: kgdb: cache flushing is not safe in SMP modeSonic Zhang
Make sure we mark cache flushing as unsafe to kgdb in SMP mode so that kgdb doesn't flush things incorrectly on us. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: SMP: drop unused blackfin_cpudata.idle pointerMike Frysinger
Not sure when we stopped using this field, but nothing in the tree uses this now, so punt it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: unify core IRQ definitionsMike Frysinger
Start a new common IRQ header and move all of the CEC pieces there. This lets the individual part headers worry just about its SIC defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25Blackfin: don't attempt to flush on-chip L1 SRAM regionsSonic Zhang
Since the on-chip L1 regions are not cacheable, there is no point in trying to flush/invalidate them. Plus, older Blackfin parts like to trigger an exception (like BF533-0.3). Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-04-13Blackfin: SMP: make all barriers handle cache issuesGraf Yang
When suspending/resuming, the common task freezing code will run in parallel and freeze processes on each core. This is because the code uses the non-smp version of memory barriers (as well it should). The Blackfin smp barrier logic at the moment contains the cache sync logic, but the non-smp barriers do not. This is incorrect as Rafel summarized: > ... > The existing memory barriers are SMP barriers too, but they are more > than _just_ SMP barriers. At least that's how it is _supposed_ to be > (eg. rmb() is supposed to be stronger than smp_rmb()). > ... > However, looking at the blackfin's definitions of SMP barriers I see > that it uses extra stuff that should _also_ be used in the definitions > of the mandatory barriers. > ... URL: http://lkml.org/lkml/2011/4/13/11 LKML-Reference: <BANLkTi=F-C-vwX4PGGfbkdTBw3OWL-twfg@mail.gmail.com> Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-31Fix common misspellingsLucas De Marchi
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-25Blackfin: bitops: fix include order after little endian inclusionMike Frysinger
The le.h header requires things like test_bit to be declared, so we need to move its inclusion to after the point where that happens. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-24Merge branch 'for-linus' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/vapier/blackfin: Blackfin: bf54x: re-enable anomaly 05000353 for all revs Blackfin: enable atomic64_t support Blackfin: wire up new syncfs syscall Blackfin: SMP: flush CoreB cache when shutting down
2011-03-23bitops: remove minix bitops from asm/bitops.hAkinobu Mita
minix bit operations are only used by minix filesystem and useless by other modules. Because byte order of inode and block bitmaps is different on each architecture like below: m68k: big-endian 16bit indexed bitmaps h8300, microblaze, s390, sparc, m68knommu: big-endian 32 or 64bit indexed bitmaps m32r, mips, sh, xtensa: big-endian 32 or 64bit indexed bitmaps for big-endian mode little-endian bitmaps for little-endian mode Others: little-endian bitmaps In order to move minix bit operations from asm/bitops.h to architecture independent code in minix filesystem, this provides two config options. CONFIG_MINIX_FS_BIG_ENDIAN_16BIT_INDEXED is only selected by m68k. CONFIG_MINIX_FS_NATIVE_ENDIAN is selected by the architectures which use native byte order bitmaps (h8300, microblaze, s390, sparc, m68knommu, m32r, mips, sh, xtensa). The architectures which always use little-endian bitmaps do not select these options. Finally, we can remove minix bit operations from asm/bitops.h for all architectures. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Greg Ungerer <gerg@uclinux.org> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Roman Zippel <zippel@linux-m68k.org> Cc: Andreas Schwab <schwab@linux-m68k.org> Cc: Martin Schwidefsky <schwidefsky@de.ibm.com> Cc: Heiko Carstens <heiko.carstens@de.ibm.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: Michal Simek <monstr@monstr.eu> Cc: "David S. Miller" <davem@davemloft.net> Cc: Hirokazu Takata <takata@linux-m32r.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Cc: Chris Zankel <chris@zankel.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-23bitops: remove ext2 non-atomic bitops from asm/bitops.hAkinobu Mita
As the result of conversions, there are no users of ext2 non-atomic bit operations except for ext2 filesystem itself. Now we can put them into architecture independent code in ext2 filesystem, and remove from asm/bitops.h for all architectures. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Jan Kara <jack@suse.cz> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-23bitops: introduce little-endian bitops for most architecturesAkinobu Mita
Introduce little-endian bit operations to the big-endian architectures which do not have native little-endian bit operations and the little-endian architectures. (alpha, avr32, blackfin, cris, frv, h8300, ia64, m32r, mips, mn10300, parisc, sh, sparc, tile, x86, xtensa) These architectures can just include generic implementation (asm-generic/bitops/le.h). Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Richard Henderson <rth@twiddle.net> Cc: Ivan Kokshaysky <ink@jurassic.park.msu.ru> Cc: Mikael Starvik <starvik@axis.com> Cc: David Howells <dhowells@redhat.com> Cc: Yoshinori Sato <ysato@users.sourceforge.jp> Cc: "Luck, Tony" <tony.luck@intel.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Kyle McMartin <kyle@mcmartin.ca> Cc: Matthew Wilcox <willy@debian.org> Cc: Grant Grundler <grundler@parisc-linux.org> Cc: Paul Mundt <lethal@linux-sh.org> Cc: Kazumoto Kojima <kkojima@rr.iij4u.or.jp> Cc: Hirokazu Takata <takata@linux-m32r.org> Cc: "David S. Miller" <davem@davemloft.net> Cc: Chris Zankel <chris@zankel.net> Cc: Ingo Molnar <mingo@elte.hu> Cc: Thomas Gleixner <tglx@linutronix.de> Acked-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Acked-by: "H. Peter Anvin" <hpa@zytor.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2011-03-22Blackfin: enable atomic64_t supportMike Frysinger
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-22Blackfin: wire up new syncfs syscallMike Frysinger
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: wire up new syscallsMike Frysinger
Hook up name_to_handle_at, open_by_handle_at, and clock_adjtime. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin/ipipe: restore pipeline bits in irqflagsPhilippe Gerum
This patch fixes the Blackfin irqflags to make them I-pipe aware anew, after the introduction of the hard_local_irq_*() API. Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin/ipipe: upgrade to I-pipe mainlinePhilippe Gerum
This patch introduces Blackfin-specific bits to support the current tip of the interrupt pipeline development, mainly: - 2/3-level interrupt maps (sparse IRQs) - generic virq handling - sysinfo v2 format for ipipe_get_sysinfo() Signed-off-by: Philippe Gerum <rpm@xenomai.org> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: SMP: work around anomaly 05000491Sonic Zhang
In order to safely work around anomaly 05000491, we have to execute IFLUSH from L1 instruction sram. The trouble with multi-core systems is that all L1 sram is visible only to the active core. So we can't just place the functions into L1 and call it directly. We need to setup a jump table and place the entry point in external memory. This will call the right func based on the active core. In the process, convert from the manual relocation of a small bit of code into Core B's L1 to the more general framework we already have in place for loading arbitrary pieces of code into L1. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-03-18Blackfin: SMP: implement cpu_freq supportGraf Yang
Re-use some of the existing cpu hotplugging code in the process. Signed-off-by: Graf Yang <graf.yang@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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