| Age | Commit message (Collapse) | Author |
|---|
|
MC13892 LED workaround can only be applied when a battery is connected.
But we can not detect if a battery is connected since the ADIN5
pin has been tied to look like a battery is attached on MX5x
boards. So disable battery driver firstly.
Signed-off-by: Lily Zhang <r58066@freescale.com>
|
|
FB_SYNC_EXT was used to represent ext clk, but actually, it represent ext sync.
Some applications do not recognize it, during fb_set_var ioctl may miss it,
which will cause fb display fail, for example X window startup.
Remove FB_SYNC_EXT flag, and choose ext clk support by ipu driver.
Signed-off-by: Jason Chen <b02280@freescale.com>
|
|
change uart default parent to pll2 and clk rate to 66.5MHz
Signed-off-by: Jason Chen <b02280@freescale.com>
|
|
Fix tve clock tree and adding TVE-VGA support.
Signed-off-by: Jason Chen <b02280@freescale.com>
(cherry picked from commit 0222a76d7798f9a52f7156173e9c66d49384cda6)
|
|
When apply rt patch or turn on hardirq threaded in kernel,
play audio by application with realtime schedule policy hangs the system.
It is caused by:
Requesting SDMA channel, a specific channel is used to load script
and context from memory.
This load phase also uses sdma to transfer, then poll
a complete flag within a while(1) loop.
When application with realtime schedule policy request sdma channel,
it will preempt threaded irqs and prevent complete flag to be set.
So a deadlock appears.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
(cherry picked from commit 1d485b5d74d9585677152c3519c8d3308167de54)
|
|
This patch sets TVin pwr gpio to be output in io_init.
Signed-off-by: Liu Ying <b17645@freescale.com>
(cherry picked from commit 342ab3082b255dc2c0fd386509e308c3ce5abf6a)
|
|
PMIC: Configure battery driver as a loadable module.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
|
|
1588 clock need to set divider in HW_CLKCTRL_ENET register,
and these bits should be cleaned before set them.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
|
|
fix issue: system would enter suspend twice instead
of resume when press pwr key twice
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
|
|
- Added new entry for 6.0" V220 E-Ink panel
- Updated timing info for other panels
Signed-off-by: Danny Nold <dannynold@freescale.com>
|
|
Fix bug that low speed device doesn't be supported at otg port
Signed-off-by: Peter Chen <peter.chen@freescale.com>
|
|
MSL Part
move the usb clk_enable from irq context to a kernel thread context, so
that the voltage can be changed in clk_enable function.
Signed-off-by: Hu Hui <b29976@freescale.com>
|
|
The spin_lock is enough for each DMA channel, so
remove the mutex lock.
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
The ONFI nand need the PLL1 clock, so add the two function
to change the bypass clock.
add some comments for GPMI clocks too.
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
This is required for using i2c tools.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
|
|
MX51 DVFS_PER: Set high setpoint and low setpoint of LP voltage
from 1.2 V to 1.25 V.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
|
|
The original defined i2c device address has been shifted 1 to left
because i2c bus driver's limitation.
This doesn't make much sense.
After driver fix, we define its real address now.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
|
|
Support mDDR in DVFS driver,using config menu
system type->Freescale i.MXS implementtations->
Memory type is mDDR to select mDDR as memory
Signed-off-by: Frank Li <frank.li@freescale.com>
|
|
This patch sets CLAA WVGA LCD panel's PWM backlight frequency
to be 19.9KHz, which meets the LCD data sheet's requirement.
The change can get rid of high frequency howling on some
LCD panels.
Signed-off-by: Liu Ying <b17645@freescale.com>
|
|
1) Add PWM and PWM backlight platform data.
2) Change PWM1 pin's mux mode to be PWMO.
Signed-off-by: Liu Ying <b17645@freescale.com>
|
|
The 2.6.35 kernel early_param tag no longer needs an "="
in the first parameter.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
|
|
Use gpio_6_15 to shutdown external speaker amp when not in use.
Signed-off-by: Alan Tull <alan.tull@freescale.com>
|
|
Use both dev_id and con_id to get enable the CAN clock.
Only use the con_id can't get the can_clk2, which is the
root cause for CAN2 hang.
Signed-off-by: William Lai<b04597@freescale.com>
|
|
This patch uses gpio to set pwm signal to keep low when
the control signal is inverted, i.e., the pwm control
signal may be inverted by a MOSFET chip.
Signed-off-by: Liu Ying <b17645@freescale.com>
|
|
This patch adds pwm enable/disable pad functions to pwm platform
data.
Signed-off-by: Liu Ying <b17645@freescale.com>
|
|
The old implementation will clk_get/clk_put for each clk on/off operation.
As some clk on/off operation would be IRQ context.
So, it will ocurr the error like "schedule at atomic context".
The new implementation will only call clk_get at usb initialization,
and clk_put at usb de-initialization.
The driver's clock on/off will only call clk_enable/clk_disable.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
|
|
The i.Mx50EVK (rdp) board has a fixed dc-dc converter. Show it as
a fixed regulator so the audio driver will be able to get its voltage.
Signed-off-by: Alan Tull <alan.tull@freescale.com>
|
|
EIM IOMUX settings that improve the power numbers break keypad. Move the EIM
IOMUX settings to platform specific functions called during suspend/resume.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
Since VSD voltage is not always on, we need to pass the correct
regulator to esdhc driver to dynamically enable it.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
|
|
Add REGULATOR_CHANGE_STATUS ops mask for mc13892 regulators
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
|
|
Previous patch is not stable enough, reverted.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
|
|
Vcc voltage needs to be increased before increasing the frequency when exiting
from LPAPM mode. Some drivers are initiating the frequency/voltage change
request (via clk_enable/clk_disable) in an ISR or tasklet context. Since the
regulator API code uses SPI that can sleep during its transactions, the
system will crash when sleep is called in an ISR/tasklet context.
Hence the current solution is to remove the voltage change code.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
Upgrade SDMA script to support SSIs dual fifo breaks mx50 ssi, because
mx50 new script not available yet.
Fix it by according to cpu model to set correct sdma script address.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
|
|
In the MX5x clock code, it's incorrect to
use the existence of the macro to determin the
uart is DMA enabled or not.
Fix this bug by checking the macro value.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
|
|
Enable MAX173135 and LTC3589 drivers in MX5 MFG
defconfig.
Signed-off-by: Lily Zhang <r58066@freescale.com>
|
|
As uboot changes the PLL1, this causes the UART1 clock
PRE/PODF divider settings are not correct.
Fix this by set uart's parent to PLL3 as uboot did.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
|
|
Upgrade sdma mx51 script to v1.1
http://compass.freescale.net/go/220269616
Upgrade sdma mx53 script to v1.1
http://compass.freescale.net/go/211002731
These new scripts support ssi dual fifo.
Pan Qihong-B30266 provide the usage:
-----------
mcu_2_ssiapp and ssiapp_2_mcu are supporting
SSI tx/rx residing on peripheral DMA region.
mcu_2_ssish and ssish_2_mcu are supporting
SSI tx/rx residing on shared peripheral DMA region.
With all these 4 scripts, will support all the 3 SSIs.
----------
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
|
|
MX53 ARD: Add Linear PMIC support.
Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com>
|
|
Update the DDR frequency change code to latest the DDR settings for both
24Mhz and 266Mhz.
266MHz latest script version 04 from compass site:
http://compass.freescale.net/doc/220496654/Codex_LPDDR2_266MHz.inc
24MHz latest script version 03 from compass site:
http://compass.freescale.net/doc/219884330/Codex_LPDDR2_24MHz.inc
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
- Support added for MAX17135 temperature sensor driver for both
MX50 ARM2 and RDP platforms.
- MAX17135 driver re-architected with init() callback function
in MSL layer which registers regulators.
Signed-off-by: Danny Nold <dannynold@freescale.com>
|
|
Turn off audio clock when possible. Empirical data says that we
need to leave the clocks on for 300 mSec after all codec writes
are done so schedule work to do that.
This feature supported for i.Mx51 Babbage and i.Mx50 EVK (rdp) boards.
Signed-off-by: Alan Tull <alan.tull@freescale.com>
|
|
Improve STOP mode power consumption in MX50 by doing the following:
1. Disable regulators that are not being used.
2. Set as many regulators as possible into STANDBY mode.
3. Set EIM, FEC IOMUX settings for minimum power leakage.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
|
|
Add MFG tool support for MX53 ARD.
Remove MLB driver in updater defconfig because it
is not needed by MFG tool
Signed-off-by: Lily Zhang <r58066@freescale.com>
|
|
MSL Part
define a new platform data struct, and Put the pmic callback register
into platform data structure, then we can cover all pmic
Signed-off-by: Hu Hui <b29976@freescale.com>
|
|
Add IEEE1588 device's resource definition, and set default clock input
for ptp RTC.
Signed-off-by: Xie Xiaobo <X.Xie@freescale.com>
|
|
This is another work-around for esdhc crc error issue when AHB is
down to 24Mhz in low power mode.
But an expensive one since AHB will go back to 133Mhz and it will switch
the entire LP domain frequencies whenever the SDHC is accessed
With the workaround of switching esdhc clock to 20Mhz when AHB is 24Mhz,
we do not need to have this flag set anymore.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
|
|
Need E-Book ADD On Board.
Boot Config (SW5) uses EIM_DA0~7, which are multiplexed with Keypad module.
Set SW5 to 'on' to avoid the interference (it appears that some keys are
always pressed) after system boot.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
|
|
Not allowed in the spec, but the hardware guy said it was ok.
Needed because clock is shared between audio and camera.
Signed-off-by: Alan Tull <alan.tull@freescale.com>
|
|
Add ssi3 support for MX5.
According to manual, ssi3 clock should be same to ssi1 or ssi2.
Signed-off-by: Zeng Zhaoming <b32542@freescale.com>
|
|
MSL Part
enable the powerkey as suspend/resume key on mx53evk and mx50 rdp
Signed-off-by: Hu Hui <b29976@freescale.com>
|
