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LP0 vector is allocated by BL and address is shared to kernel.
For platform with memory less than 1GB it was allocated in
the overlapping region of carveout memory. Because of it
during AVP operation it gets corrupted, which prevents resume.
Relocate AVP vector to some other location where overlapping will
not occur.
Bug 827199
Change-Id: I8ec066d8c38c34b0bd9314abe20b2e01b4a3a293
Reviewed-on: http://git-master/r/42113
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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This reverts commit 2b96783fd25eb2153cab2fb6ff92b2bacc809bed.
Recovery process is hanging because of this change.
Bug 848403
Bug 800107
Change-Id: I1b7d3f6c08d6db40eda077e5f128c4bf3be681ac
Reviewed-on: http://git-master/r/41818
Reviewed-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Kaushik Sen <ksen@nvidia.com>
Reviewed-by: Joseph Lehrer <jlehrer@nvidia.com>
Tested-by: Joseph Lehrer <jlehrer@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
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CTS File permission test expects there shouldn't be any writable
permission for Group and Others for any file in kernel.
Bug 840409
Change-Id: Ia31aa02e9e49840823ec080ab7d42c2c197f0602
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/41540
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Manoj Gangwal <mgangwal@nvidia.com>
Tested-by: Manoj Gangwal <mgangwal@nvidia.com>
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Required to pass android.net.cts tests.
Bug 789868
Change-Id: Ie43c02b4c4b03d929744678c399bbad980658ed3
Reviewed-on: http://git-master/r/41234
Reviewed-by: Rahul Bansal <rbansal@nvidia.com>
Tested-by: Rahul Bansal <rbansal@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Change-Id: I115ab2464378df094dae67268c919980bd72b843
Reviewed-on: http://git-master/r/39785
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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fb_mmap maps current window so that content of screen is
accessible through mmap sys call to user space components.
BUG 832288
Change-Id: I10ccb0b70c951f6d43dbd8a7a1e59e86c0ee75e9
Reviewed-on: http://git-master/r/39204
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>
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bug: 842809
Change-Id: I68f8a4c358c490c0b66ee55f49de460aced50139
Reviewed-on: http://git-master/r/40096
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>
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some users might enter fuse data starting
with 0x/x. this will mess up the fuse programming.
do not consider 0x/x while programming the fuses.
also fix some compilation warnings
Reviewed-on: http://git-master/r/#change,38933
(cherry picked from commit fc8e1e492ac362a44ea6254759431d8f1fb1695c)
Bug 836963
Change-Id: If0503d4e22479e2ce230d53f538eea16d39817df
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/39614
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
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- vdd_core needs to be 1.14V min before fuse
write/read
- add wait_for_idle before accessing fuses
- add proper programming of PRIV2INTFS field
Bug 841766
Reviewed-on: http://git-master/r/#change,37618
(cherry picked from 8430b859578af1c0a25954d7b018430941943892)
Bug 836963
Change-Id: I9ec96f54c39834d42043f440b087c7498b1ecd73
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/39613
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
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Providing the uart platform data to select the clock source
from given parent list of clocks. The driver will select
the clock source with minimum error between calculated and
requested baudrate.
bug 825530
Change-Id: If6b882b2fb507cee2553136a3b7f98f0571964ed
Reviewed-on: http://git-master/r/39011
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Adding clk_limit to platform data used at sdhci host driver
to limit clock. whistler only supports up to 24MHz.
bug 845180
Change-Id: Ifb872359095d0f2276d417ab1edc3cec4d79a52f
Reviewed-on: http://git-master/r/39524
Tested-by: Harry Hong <hhong@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Bug 841766
Reviewed-on: http://git-master/r/#change,37617
(cherry picked from commit b0d7c345cca68450cd433f626947054d42403d52)
Bug 836963
Change-Id: I37fa7a0e65f42d17c06f69917f81392094022a25
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/39612
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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keep fuse clock always enabled to allow fuse
read writes from multiple clients
Bug 841766
Reviewed-on: http://git-master/r/#change,38402
(cherry picked from commit e507984a9a8b5d1e012d5157f3259ed54e354ad1)
Bug 836963
Change-Id: Ia6b554c861e292af9c9d1a9ebd47b17a2ce170d7
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/39611
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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The key-matrix is updated for the case scroll-wheel is not enabled.
Bug 847651
Change-Id: I904fd16b284dde95836601378dcb049a97766393
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-on: http://git-master/r/39553
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Scrollwheel driver is not needed on phone platforms since we already
have touch-screen on it.
Hence the scrollwheel driver on Whistler is disabled; it was also
causing problems in suspend-resume use-cases.
Bug 841686
Change-Id: I730ba3fb126619ed81caad6f801b1d8876d90d39
Reviewed-on: http://git-master/r/39517
Reviewed-by: Puneet Saxena <puneets@nvidia.com>
Tested-by: Puneet Saxena <puneets@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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1. The usb UTMIP controllers are set to reset mode when there is no usb cable.
2. Power down the reciever circuitory.
3. Set the OTG_PD for instances which do not use OTG.
4. Turn off the pad power when hotplug support is not supported.
Bug 829628
Change-Id: Icbf82da7d3f35ea882d8a212a01d04c4d536fd0d
Reviewed-on: http://git-master/r/39352
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
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Using proper variable name for uart related api and variables.
Change-Id: I1f431357c3cfacba9d5eea5b9e9da872b498df20
Reviewed-on: http://git-master/r/39012
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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pll_m initialized to 0 so that it stays at the frequency configured
by BCT.
For AP25 pll_m runs at 760MHz. Peripherals connected to pll_m and
running at frequency not multiple of 760MHz switched to pll_c.
Bug 821534
Change-Id: I390b16a31194ad3efe79e68dfbcf371e225cfc70
Reviewed-on: http://git-master/r/36050
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>
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Relaxed bus set rate success condition: instead of exact rate require
closest rate below the request (makes bus clocks configurable from
sources/PLLs with variable frequencies).
Bug 821534
Change-Id: I491f8841cf2ca206a54beb1c24c84f470d08eb4b
Reviewed-on: http://git-master/r/38868
Reviewed-by: Manish Tuteja <mtuteja@nvidia.com>
Tested-by: Manish Tuteja <mtuteja@nvidia.com>
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EMC DVFS table added for AP25 with 380/190 ladder.
Bug 821534
Change-Id: Ic5f936924b4d6b2f3ce52b412e4bb5f2a57ac661
Reviewed-on: http://git-master/r/36051
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 842809
Change-Id: Idb3fde5c3287143e4e67a2083fddd1a07f1d630f
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/38960
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Adding the uart initialization as separate function and handling the
clock and device registration.
It also provides all possible clock source and their handle to
driver so that driver can use this clock information to select baud
rate dynamically.
bug 842665
Change-Id: Ib5ec368b8ceb2df47f48f72aefee4af1b113b913
Reviewed-on: http://git-master/r/38428
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Adding the clock detail entry for the driver serial8250.
bug 842665
Change-Id: I38c4195a3b6522978b60f9212053589c2eafce53
Reviewed-on: http://git-master/r/38427
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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To improve the power consumption situation for MP3 playback
the scaling governor is set to conservative when display
is turned off and the default governor is saved. The governor
is restored when display is turned on.
Bug 817727
(cherry picked from commit 4c0e831af450f0e5af65e8d09c8d347d23073b65)
(cherry picked from http://git-master/r/35000)
Change-Id: I73fc9e2851eae36c488e17cb97423c44101e1ba5
Reviewed-on: http://git-master/r/37187
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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disable_irq() will do schedule() if threaded IRQ handler is running. But
suspend_cpu_complex() is called from IRQ disabled.
disable_irq_nosync() should be used here because it will not sleep.
BUG 841808
Change-Id: Ib13e31adc7a8591c668dd729995e50e0db885641
Reviewed-on: http://git-master/r/37505
Reviewed-on: http://git-master/r/38191
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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bug 837571
Change-Id: Ib35167cf9d6e0fd2c81304201802157ee81c44d0
Reviewed-on: http://git-master/r/37908
Reviewed-by: Joseph Lehrer <jlehrer@nvidia.com>
Tested-by: Joseph Lehrer <jlehrer@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Yu-Huan Hsu <yhsu@nvidia.com>
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Change the permission to 644 for 'enable' and 'quantum'
TEGRA_MC_ATTRIBUTES to disable the write permission as
CTS test "android.permission.cts.FileSystemPermissionTes
t#testAllFilesInSysAreNotWritable" requires it as non-writable.
Bug 840411
Change-Id: I2ae26cd707b0b1c6bc7c8507a67b1c9411b22709
Reviewed-on: http://git-master/r/36878
Tested-by: Manoj Gangwal <mgangwal@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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MMC_BLOCK_DEFERRED_RESUME causes race conditions in the SD/MMC driver,
i.e. mmc_sd_detect() will be called from different threads causing
inconsistent state. Disabling feature for Tegra.
Bug 833034
http://git-master/r/#change,36254
(cherry picked from commit a8b6bb5de9b9645ecdabc3e954f04898e45e9038)
Change-Id: Ie28fa42e28ab98d8bffef7e48591cbec98af5fe2
Reviewed-on: http://git-master/r/36430
Reviewed-by: Yuhao Ding <yding@nvidia.com>
Tested-by: Yuhao Ding <yding@nvidia.com>
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Bug 820602
Reviewed-on: http://git-master/r/35954
(cherry picked from commit 2d6cac283c1121b9a90b742b5dcf80141422eac6)
Change-Id: I6149c878061bace0c191a0d45ddd7e5b8ffce4cd
Reviewed-on: http://git-master/r/36683
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 814896, 820602
Reviewed-on: http://git-master/r/35948
(cherry picked from commit 4b9158b73bd5b5ae9b1059d31e062362d4732064)
Change-Id: I2ac442aa45eb11b47a97320524f7b82d9f2296d7
Reviewed-on: http://git-master/r/36675
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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H/W statistics monitor for AVP controls sclk depending on load.
Instead of overriding avp.sclk rate, separate sclk client added
for statmon so that busy hints from AVP can be handled.
Bug 831892
Change-Id: Ieaa43525d7582810095a2200486019ae9b4a7553
Reviewed-on: http://git-master/r/36057
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Bug 831892
Change-Id: I861df5881bb7f861aeb3986b70df2f6268bab98c
Reviewed-on: http://git-master/r/36107
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Tegra series of chips has a hardware statistic counter for CPU/AVP/VDE/SYS
modules. This commit adds the support for AVP statistics gathering and
controlling avp clock during video playback.
Bug 831892
Change-Id: Ia1797307a5cd2f5f7d2eec7133a8a058070d5aff
Reviewed-on: http://git-master/r/35647
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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There was no code to clear interrupt registers for AVP. First run
of AVP was OK because those registers start from reset value.
But because those registers were not cleared, when the second
time AVP was started, some interrupts were enabled too early.
That caused interrupts coming before handlers were ready.
This change also removes the workaroud for the bug.
bug 827353
bug 826234
Change-Id: Ia45efe1d5f2c48d8d372a2442a614d52f1a766c0
Reviewed-on: http://git-master/r/33083
Reviewed-on: http://git-master/r/35357
Reviewed-by: Kaz Fukuoka <kfukuoka@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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use FB_BLANK_POWERDOWN on hdmi device in earlysuspend to cause
tegra_dc_disable.
Fixes bug 835171
Change-Id: Idd0f92e86f4f38e97f93e5806631bc4995c92d1c
Reviewed-on: http://git-master/r/35662
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Passing card detect gpio polarity through platform data.
This is used in sd cards insertion/removal detection.
Bug 831409
Change-Id: I29c99696daf094d4f04789121ddfb681dccca12a
Reviewed-on: http://git-master/r/33123
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Joseph Lehrer <jlehrer@nvidia.com>
Tested-by: Joseph Lehrer <jlehrer@nvidia.com>
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Hotplug does not work if the regulator is disabled, so keep it enabled
until the device wants to enter lowpower mode.
Change-Id: I5a53a0fb0a7f26ba9f2674bbc65f4650948f6143
Reviewed-on: http://git-master/r/33117
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Change-Id: I6ec62abdaf3a8ec2e59e2a533b36b280d69538e1
Signed-off-by: Ari Hirvonen <ahirvonen@nvidia.com>
Reviewed-on: http://git-master/r/33037
Reviewed-by: Michael I Gold <gold@nvidia.com>
Tested-by: Michael I Gold <gold@nvidia.com>
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Enabling AHB prefetch on USB1, USB2, USB3 controllers,
to improve the USB transfer throughput.
Bug 820602
Change-Id: I4e9e9fa37624cc11f83effd268cdbf31c01f1df7
Reviewed-on: http://git-master/r/30475
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Tested-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: I2dcdfadb44a981cccf583a156be0be093ca5feec
Reviewed-on: http://git-master/r/34229
Reviewed-by: Maria Gutowski <mgutowski@nvidia.com>
Tested-by: Maria Gutowski <mgutowski@nvidia.com>
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this is done so that it's easy to get the emc stats without having to
enable this explicitly when one wants to get the emc stats.
Change-Id: Id6039e8cb4510740182981245453128f406ee00d
Reviewed-on: http://git-master/r/32171
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
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Assignment moved inside if statement, where it belongs.
bug 828756
Change-Id: I2ee63bed168feade897ba15b364de1ee714f1381
Reviewed-on: http://git-master/r/31955
Reviewed-by: David Schalig <dschalig@nvidia.com>
Tested-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
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tegra_dc_hdmi_equal doesn't check pixclock. some devices doesn't
support 14.85Mhz pixclock so 1080p@60 cannot be used. However,
1080p@30 is supported. Therefore, adding a max pixclock prevents
1080p@60 mode is falsely used for those devices
Bug: 815409
Change-Id: Ia2d8dcf360afa51e160d0e997986fe1714254a6b
Reviewed-on: http://git-master/r/31663
Reviewed-by: Donghan Ryu <dryu@nvidia.com>
Tested-by: Donghan Ryu <dryu@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Add support for usb hotplug, this change will add the following:
vbus is left enabled.
Bug 796158
Change-Id: I3c3cfa0bf8858b3be2351fe753ceb2a0229ed15d
Reviewed-on: http://git-master/r/30686
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Hanumanth Venkateswa Moganty <vmoganty@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
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added code to support digital mic on wm8903 for ventana. By default
analog mic is enabled. To enable digital mic write 1 and to disable
write 0 to
/sys/devices/platform/soc-audio/enable_digital_mic
Change-Id: I36e239d10404a9bc8446e275e5c59e9829409608
Reviewed-on: http://git-master/r/29615
Reviewed-by: Niket Sirsi <nsirsi@nvidia.com>
Tested-by: Niket Sirsi <nsirsi@nvidia.com>
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sclk max rate for AP25 is 300MHz and pclk is set as 1:2 to sclk.
pclk max rate changed to 150MHz for AP25.
Bug 821534
Change-Id: I6c6b30f0c9b2dd568e6171e9b6d88c8eef212ab7
Reviewed-on: http://git-master/r/31311
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
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The kernel now receives wait tracking data (similar to gathers and
relocs) and compares the current syncpt with the threshold value.
If it's old, it gets a kernel mapping and rewrites the method data
to use a kernel reserved syncpt that is always 0 (so trivially pops
when seen by the HW).
Bug 519650
Bug 785525
Bug 803452
Note: reset the author in this commit to fix a email addr problem
and since from the latest/last cherry pick there was a reworking
of the code to be compatible with different user space versions
it also seemed reasonable.
(cherry picked from commit 4069d8e67665624ad3dceb628e572980dd57acd0)
(cherry picked from commit 6e4336408588e348804a62e53386acc9abc06823)
(cherry picked from commit 87a9efe751716ca741caac72b9061fdfdcec540a)
Change-Id: I9c6076da2384f373d5f402bee4406b09b4ebc4ff
Reviewed-on: http://git-master/r/23159
Reviewed-on: http://git-master/r/30281
Tested-by: Chris Johnson <cwj@nvidia.com>
Reviewed-by: Ken Adams <kadams@nvidia.com>
Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
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Merge updates from tegra_defconfig
Change-Id: I45a488f27c516a0f892eb394771302c68cd2aa6c
Reviewed-on: http://git-master/r/31257
Tested-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Andrei Denissov <adenissov@nvidia.com>
Reviewed-by: Jonathan B White (Engrg-Mobile) <jwhite@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
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Set the platform data for the USB1 host mode to NULL during the unregister.
After freeing up the platform data pointer.
Bug 820333
Change-Id: I6fb3edf58d854c0d8f648572f40cebe6811e2069
Reviewed-on: http://git-master/r/30696
Reviewed-by: Suresh Mangipudi <smangipudi@nvidia.com>
Tested-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Change-Id: Ic3eb5d136be746b55bea4efe302e0f417dfc1eb6
Reviewed-on: http://git-master/r/30512
Tested-by: Manjula Gupta <magupta@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Scott Peterson <speterson@nvidia.com>
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