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IOMUX v3 missed the pullup pad setting for SD2_CD which is required
for SD2 card detect.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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The eSDHC iomux is not updated properly when iomux v3 is upgraded.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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The eSDHC iomux is not updated properly when iomux v3 is upgraded.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add DDR support for eMMC 4.4 cards.
Currently the clock is set to 40Mhz to get good compatibility.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Due the ROM code bug, we need to let clock of mx35 esdhc always on
or the HW reset may not work.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Add a control flag for clock always on function in plat_data.
By default ,esdhc clock will be automatically gate off by HW
if there's no CMD/DATA transferring.
This inferface allows user to easily disable clock auto gate off
according specicial using cases such as SDIO card that needs
clock to send SDIO interrupt signal to host.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Add dll override mode enable and the number of delay cells flag
in platform_data.
This allows user to regulate clock delay line in platform specific code
according to different board and cards.
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Leaving EPDC AXI enabled is bad for power management. EPDC/Display
clks must be enabled before clock rate can be set. We must then disable
these clocks before completing init.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Add missing "break;" for exiting while timeout happens.
Signed-off-by: Robby Cai <R63905@freescale.com>
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Changed display_axi clock parent to PFD
Changed apbh_dma_clk parent to ahb_clk according to h/w design.
Signed-off-by: Robby Cai <R63905@freescale.com>
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The vvideo power supply drives the gpio bank, from gpio_12 to
gpio14. Turn on the power in case other modules need these gpio.
Signed-off-by: William Lai <b04597@freescale.com>
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MX50 has no 3D interrupt, 3D register space, and gmem
Signed-off-by: Jie Zhou <b30303@freescale.com>
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Set gpo regulator to be VVIDEO to camera platform data. This
regulator setting may enable the power domain of TVDAC_1 so that
GPIO_10 can be driven as CAM_RESET_B.
Signed-off-by: Liu Ying <b17645@freescale.com>
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Updated the copyright and cleaned up formatting in mx50_suspend.S.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Add support for disabling MX13892 regulators when the system is in
suspend. Lowered VDDA voltage to 0.95V in suspend state. Disabled NEON
SRPG.
Signed-off-by: Ranjani <ra5478@freescale.com>
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Add offset to pllctrl pfd mask bits and check lock bit.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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Use WAIT for wait loop.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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Change defconfig for VIIM driver
Signed-off-by: Robby Cai <R63905@freescale.com>
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Add VIIM driver support -- MSL part
Signed-off-by: Robby Cai <R63905@freescale.com>
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EPDC AXI clock configuration had to be moved to ensure that it
takes place after all parent clocks have been enabled.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Platform related codes' modifications when enable the
eMMC44 cards' ddr mode on MX28 EVK board.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add mx50 manufacture tool support at mx5_updater_defconfig
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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As MX5x one image kernel, the v4l2 driver is also configured in MX508.
This causes v4l2 capture module insert or bootup with builtin crash.
Now move all the v4l2 output, capture devices structure and registeration
into MSL code. The SoC who does not have CSI, will not have v4l2 device
registered anymore.
Rename the device name to mxc_v4l2_output and mxc_v4l2_capture.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
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Change mx53 EVK and Armadillo2 iomux to use iomux-v3.
- Creates iomux-mx53.h to defines IOMUX pins for MX53 HW
- Moves pin structure and functions that were in
mx53_evk_gpio.c into mx53_evk.c and delete
mx53_evk_gpio.c.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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Change mx51 babbage iomux to use iomux-v3.
- Creates iomux-mx51.h to defines IOMUX pins for MX51 Babbage
HW
- Moves pin structure and functions that were in
mx51_babbage_gpio.c into mx51_babbage.c and delete
mx51_babbage_gpio.c.
We're keeping mx51_pins.h because the MX51-3DS support will
not get converted to iomux-v3.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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To better align Freescale's BSP to kernel.org, it is
better to use iomux-v3 instead of mxc_iomux.
Change mx50 iomux to use iomux-v3.
- Creates iomux-mx50.h to defines IOMUX pins for MX50 HW
- Moves pin structure and functions that were in
mx50_arm2_gpio.c into mx50_arm2.c and deletes
mx50_arm2_gpio.c.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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Make LDB related video mode names be common names because the
video names may be used by other devices besides LVDS panels.
Signed-off-by: Liu Ying <b17645@freescale.com>
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mx23/mx28 otg port host mode will not enable internal
phy clock (portsc1 PHCD1), in that case, if the user loads
the gadget firstly, then, unloads the gadget module.
The host will not work due to gadget disable internal
phy clock after its unload process, but host doesn't enable it
at its initialization.
This fix will add enable internal phy clock at otg initialization process,
and disable it at de-initialization process.
Signed-off-by: Peter Chen <peter.chen@freescale.com>
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Add support for MX508 to enter STOP mode. The DDR needs to put into
self-refresh manually, hence suspend code needs to run from OCRAM.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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A better way to check for devices that support USB remote
wakeup. If the device supports remote wakeup, then the
wake_up_enable function is defined in usb_xx.c, check on that
definition, rather than a cpu_is_xx() call.
Signed-off-by: Dinh Nguyen <Dinh.Nguyen@freescale.com>
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Add apll and pfd support.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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Move pswitch-pressed time checking routine into a delayed work for
mx28 EVK pswitch power-down and suspend function
Signed-off-by: Zhou Jingyu <Jingyu.Zhou@freescale.com>
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The current model does not allow to put a pad into different modes
once a pins is allocated. Remove the resource handling.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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also, check for a valid pad_ctrl_ofs before changing the
pad control register.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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The old defines leaked in from an old version of the patch.
Change the defines to match the register layout of the iomuxer.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Add UART2 for mx23 EVK board. EVK board needs rework.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Fix the following problem at compile-time.
WARNING: arch/arm/mach-mx5/built-in.o(.data+0xd354): Section mismatch in
reference from the variable max17135_pdata to the (unknown reference)
.init.data:(unknown)
The variable max17135_pdata references
the (unknown reference) __initdata (unknown)
Signed-off-by: Robby Cai <R63905@freescale.com>
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one wire master driver is coming from upstream.
clock name is owire, not owire_clk
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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Add "w1" setup at mx50 pin defination because 1wire pin used
for usb over current default.
Fix multi w1_setup problem at many i.MX platform. Only first one
is run by main.
Signed-off-by: Frank Li <Frank.Li@freescale.com>
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The platform related codes' modifications
when enable the eMMC44 DDR mode on MX53 EVK board
Signed-off-by: Richard Zhu <r65037@freescale.com>
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Add IOMUX and configuration data for esdhc3
Signed-off-by: Aisheng.Dong <b29396@freescale.com>
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Set pixel clock rate for CLAA-WVGA LCD panel for 27MHz and
set the display frequency to be 57Hz. This makes the panel
to get rid of water wave glitch issue on MX50 platform.
Signed-off-by: Liu Ying <b17645@freescale.com>
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1) Enable keepers for LCDIF pads.
2) Remove input path selection for LCDIF pads.
Signed-off-by: Liu Ying <b17645@freescale.com>
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1. adjust lp_clk, ddr_clk MX53 and MX51 uses different one
2. adjust cpu rate in cpu_wp_table
3. enable clock divider handshaking when ddr clock changing
4. add AHB_MED_SET_POINT to ldb_di_clk
5. adjust the bit define about CCDR register
Signed-off-by: Shen Yong <b00984@freescale.com>
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Build as module by default.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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Build as module by default.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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1. Adjust VDDGP for 1GHZ as 1.15v
2. Adjust VDDGP for 800MHZ as 1.05v
3. Not all current MX53 boards can run up to 1GHZ. So one limitation is
added into clock.c to limit 1GHZ working point. To enable 1GHZ
working point in kernel, please increase the GP voltage and type the
command "clk core 1000" in uboot console to switch CPU core to 1GHZ.
This limitation will be removed after all boards support 1GHZ.
Signed-off-by: Lily Zhang <r58066@freescale.com>
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it fix mx50 reboot wdog reg write failed issue.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
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MX50 requires inclusion of PxP, Maxim 17135, and EPDC drivers as defaults
in order to have proper E-Ink display support.
Signed-off-by: Danny Nold <dannynold@freescale.com>
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Reconfigure the PAD's configurations to level up the HW
timing compatibility.
MX51:Some MMC cards such as transcend mmc plus cards can't
be recognized and initialized correctly on the second
esdhc slot of the BBG boards that populated the new DDR chips.
MX53:Same Kingstone SDHC card can work well on EVK REVA board, but
failed in initialization on EVK REVB board without
any sw modifications.
After adjust the slot pin's pad configurations,
fix the HW compatible issues listed above.
Signed-off-by: Richard Zhu <r65037@freescale.com>
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