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2014-07-18apalis_imx6_defconfig: add CONFIG_NEW_LEDSApalis_iMX6_LinuxImageV2.3Beta1_20140804Max Krummenacher
2014-07-10apalis_imx6_defconfig: add fusion-F0710A as a moduleMax Krummenacher
Enable the TouchRevolution Fusion 7 and 10 multi-touch controller driver to be built as a module. While at it remove NEW_LEDS which is enabled through dependencies.
2014-07-10ENGR00318392 ARM:imx6x: Save/restore SCU and some CP15 registers across ↵Ranjani Vaidyanathan
suspend/resume This patch ensures that the SCU and certain A9 CP15 registers state are maintained across a suspend/resume cycle: 1. Need to ensure that SCU standby bit is set again after suspend/resume cycle, else the system will never WAIT mode after a suspend/resume cycle. This bit should be enabled on all SMP systems immaterial of whether CPUIDLE is enabled or not. 2. Several A9 errata workarounds involve setting bits in the ARM diagnostic register. Save/restore this register across a suspend/resume cycle. 3. Save and restore the A9 power control register also. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> (cherry picked from commit 7b5b4ef5b3cdc65c0576f87cfa52bcca1bda8b33) (cherry picked from commit 2a69800d94f182e975e4ed3ae2e64d30d35a3603)
2014-07-10ENGR00309838 ARM: imx6sl: gpc: add chip revision check for dispmixRobby Cai
The dispmix feature works without problem since TO1.2. This patch adds the back-compatibility for older chip. Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit a187b916d55052fed10de1797009250095b598fb) (cherry picked from commit dd27604b9d2a1bd294b3d8800e547bc526f87df7)
2014-07-10input: touchscreen: fusion: add device tree integrationMax Krummenacher
Add device tree integration and add the device to the dtb. i2c device, interrupt and reset GPIO can be specified in the dts as follows: Note that additionally you may have to set the pinmuxing for the pins to be GPIO. &i2c1 { status = "okay"; pcap@10 { /* TouchRevolution Fusion 7 and 10 multi-touch controller */ compatible = "touchrevolution,fusion-f0710a"; reg = <0x10>; gpios = <&gpio6 10 0 /* MXM-11, Pen down interrupt */ &gpio6 9 0 /* MXM-13, Reset interrupt */ >; };
2014-07-08apalis-imx6 dtb: cleanup and correct eval vs. moduleMax Krummenacher
2014-07-08imx6qdl.dtsi: add uart5 pinctrlMax Krummenacher
2014-07-07imx6qdl.dtsi: add a label for rhe snvs-rtc nodeMax Krummenacher
2014-07-07apalis_imx6_defconfig: remove CONFIG_INPUT_EVBUGMax Krummenacher
2014-07-07regulator: allow GPIO 0 to be used for an enable signalMax Krummenacher
GPIO number 0 *is* legal and must be accepted. Set .ena_gpio to -ENODEV on regulators having no GPIO in preparation of a code change to accept GPIO 0 in the config.
2014-06-25apalis-imx6: add initial defconfigMax Krummenacher
2014-06-25apalis-imx6: add initial device treeMax Krummenacher
2014-06-25imx6 dtsi: add additional pinctrl groupsMax Krummenacher
2014-06-25mach-types: add the apalis-imx6 machineMax Krummenacher
2014-05-05imx6q/dl/solo/sololite: set system_rev so the VPU can find its firmwareTroy Kisky
This allow gplay to work.
2014-05-05imx6qdl-nitrogen6x.dtsi: add tc358743_mipiTroy Kisky
2014-04-24Add board nitrogen6_mtpTroy Kisky
2014-04-24Add nitrogen6_max boardTroy Kisky
2014-04-24dma-mapping: increase DEFAULT_DMA_COHERENT_POOL_SIZE ifdef CONFIG_VIDEO_TW68Troy Kisky
2014-04-24Add nitrogen6x_ub_defconfig with Ubuntu's preferred settingsEric Nelson
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
2014-04-24imx6q: allow 1GHZ for TO1.0Troy Kisky
2014-04-24nit6xlite_defconfig: initial additionTroy Kisky
2014-04-24dts: add imx6dl-nit6xlite.dtsTroy Kisky
2014-04-24add nitrogen6x_defconfigTroy Kisky
2014-04-24dts: add imx6q-nitrogen6x.dtsTroy Kisky
2014-04-24imx6qdl-sabrelite.dtsi: correctionsTroy Kisky
2014-04-24add imx6qdl-sabrelite.dtsiTroy Kisky
2014-04-24imx6dl-pinfunc: add MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUTTroy Kisky
2014-04-24imx6qdl.dtsi: add more pinctrl groupsTroy Kisky
2014-04-24imx6q-pinfunc: add MX6QDL_PAD_SD1_CLK__OSC32K_32K_OUTTroy Kisky
2014-04-02ENGR00298286 arm: dts: imx6qdl: add clock to CAAM.Dan Douglass
CAAM depends on the clock used by WEIM interface. This patch supplied by Haung Shijie corrects the issue by adding the clock to the device tree entry for CAAM. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
2014-04-02ARM: 7669/1: keep __my_cpu_offset consistent with generic oneMing Lei
Commit 14318efb(ARM: 7587/1: implement optimized percpu variable access) introduces arm's __my_cpu_offset to optimize percpu vaiable access, which really works well on hackbench, but will cause __my_cpu_offset to return garbage value before it is initialized in cpu_init() called by setup_arch, so accessing percpu variable before setup_arch may cause kernel hang. But generic __my_cpu_offset always returns zero before percpu area is brought up, and won't hang kernel. So the patch tries to clear __my_cpu_offset on boot CPU early to avoid boot hang. At least now percpu variable is accessed by lockdep before setup_arch(), and enabling CONFIG_LOCK_STAT or CONFIG_DEBUG_LOCKDEP can trigger kernel hang. Signed-off-by: Ming Lei <tom.leiming@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> (cherry picked from commit 9394c1c65e61eb6f4c1c99f342b49e451ec337b6)
2014-04-01ARM: 7811/1: locks: use early clobber in arch_spin_trylockWill Deacon
commit afa31d8eb86fc2f25083e675d57ac8173a98f999 upstream. The res variable is written before we've finished with the input operands (namely the lock address), so ensure that we mark it as `early clobber' to avoid unintended register sharing. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Wang Weidong <wangweidong1@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ARM: 7812/1: rwlocks: retry trylock operation if strex fails on free lockWill Deacon
commit 00efaa0250939dc148e2d3104fb3c18395d24a2d upstream. Commit 15e7e5c1ebf5 ("ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lock") modifying our arch_spin_trylock to retry the acquisition if the lock appeared uncontended, but the strex failed. This patch does the same for rwlocks, which were missed by the original patch. Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Li Zefan <lizefan@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ARM: 7749/1: spinlock: retry trylock operation if strex fails on free lockWill Deacon
commit 15e7e5c1ebf556cd620c9b091e121091ac760f6d upstream. An exclusive store instruction may fail for reasons other than lock contention (e.g. a cache eviction during the critical section) so, in line with other architectures using similar exclusive instructions (alpha, mips, powerpc), retry the trylock operation if the lock appears to be free but the strex reported failure. Reported-by: Tony Thompson <anthony.thompson@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Li Zefan <lizefan@huawei.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ARM: 7957/1: add DSB after icache flush in __flush_icache_all()Vinayak Kale
commit 39544ac9df20f73e49fc6b9ac19ff533388c82c0 upstream. Add DSB after icache flush to complete the cache maintenance operation. Signed-off-by: Vinayak Kale <vkale@apm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ARM: 7953/1: mm: ensure TLB invalidation is complete before enabling MMUWill Deacon
commit bae0ca2bc550d1ec6a118fb8f2696f18c4da3d8e upstream. During __v{6,7}_setup, we invalidate the TLBs since we are about to enable the MMU on return to head.S. Unfortunately, without a subsequent dsb instruction, the invalidation is not guaranteed to have completed by the time we write to the sctlr, potentially exposing us to junk/stale translations cached in the TLB. This patch reworks the init functions so that the dsb used to ensure completion of cache/predictor maintenance is also used to ensure completion of the TLB invalidation. Reported-by: Albin Tonnerre <Albin.Tonnerre@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2014-04-01ENGR00306309 ARM:imx:imx6qdl: Fix procedure to switch the parent of LDB_DI_CLKRanjani Vaidyanathan
Due to incorrect placement of the clock gate cell in the ldb_di[x]_clk tree, the glitchy parent mux of ldb_di[x]_clk can cause a glitch to enter the ldb_di_ipu_div divider. If the divider gets locked up, no ldb_di[x]_clk is generated, and the LVDS display will hang when the ipu_di_clk is sourced from ldb_di_clk. To fix the problem, both the new and current parent of the ldb_di_clk should be disabled before the switch. This patch ensures that correct steps are followed when ldb_di_clk parent is switched in the beginning of boot. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
2014-04-01ENGR00306276: iMX6: Add workaround for ARM errata 761320 and 794072Nitin Garg
These are Category B, hence workaround is essential. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
2014-03-17ENGR00298127-2 ARM: dtsi: imx6qdl sabreauto: Disable mipi csiLiu Ying
As the sabreauto CPU board schematics mentions, the MIPI connector isn't mechanically compatible with Freescale MIPI display and camera board, then we have no way to support MIPI features currently on this platform. So, let's disable MIPI CSI. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 453d409281228429270b9f294728e5cad1c63ee0)
2014-03-17ENGR00298127-1 ARM: dtsi: imx6qdl sabreauto: Remove v4l2_cap_1 nodeLiu Ying
As the sabreauto CPU board schematics mentions, the MIPI connector isn't mechanically compatible with Freescale MIPI display and camera board, then we have only the parallel CSI video input that is supported by the v4l2_cap_0 node. So, let's remove the orphan one - v4l2_cap_1. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 1396bc28eac7e968e278a9ce36cdc7a44b0417bd)
2014-03-14ENGR00302869-1 ARM: dts: imx6qdl: add cfg_clk for MIPI CSI2Robby Cai
MIPI CSI2 depends on this clock to work. This patch also updates the binding document. Signed-off-by: Robby Cai <R63905@freescale.com> (cherry picked from commit 67e7963f6f7ddb6c001bb34c6af71f2330fd0e3f)
2014-03-05ENGR00299939-2 ARM: imx6sl: Add dummy LDO2p5 regulator to support VBUS wakeupRanjani Vaidyanathan
LDO2p5 cannot be disabled in low power idle mode when the USB driver enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy regulator that the USB driver will enable when VBUS wakeup is required. This patch ensures that the low power idle code checks the status of the dummy ldo2p5 regulator before disabling LDO2p5. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
2014-03-05ENGR00299939-1 ARM: dts: imx6sl:Add dummy LDO2p5 regulator to support vbus ↵Ranjani Vaidyanathan
wakeup LDO2p5 cannot be disabled in low power idle mode when the USB driver enables VBUS wakeup. To identify when LDO2p5 can be disabled add a dummy regulator that the USB driver will enable when VBUS wakeup is required. This patch adds the dummy regulator to the dts files. Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
2014-02-20ENGR00292341 imx6sl hwrngDan Douglass
Add hwrng support for i.MX6SL. 1. Add RNG driver. This driver originated as fsl-rngc.c. It has been modified to support device tree. The name has been changed since it supports both b and c variants of RNG. 2. Added clock and compatible info to the device tree data. 3. Added the entry in the options in the Kconfig for hwrng. Signed-off-by: Dan Douglass <dan.douglass@freescale.com>
2014-02-19ENGR00299756-3 ARM: imx6q: Add the clock route from external OSC to ESAI clockNicolin Chen
This patch mainly adds the clock route from external 24.576MHz OSC to internal ESAI clock via analog clock2 PADs on the SoC and pll4 so that ESAI can get an entirely synchronous clock source against CS42888. [ 1, We found if using pll4 to generate a 24.576MHz from inernal 24.0MHz OSC, we would get noise during the audio playback via ESAI->CS42888 even though this generated clock's rate is equal to the external one statistically. It might be resulted from the tiny difference between two clock source, which might be crucial to the sensitive CODEC we use -- CS42888. So we here apply the old 3.0.35 way to feed ESAI the same clock source as CS42888. 2, Ideally, we should use bypass mode for pll4 since we only need to get the raw rate (24.576MHz) while currently bypass mode in clk-pllv3.c isn't entirely supported: The clock rate would be fixed to 24.0MHz if setting to bypass, which would cause child clock get an incorrect rate and the driver who uses the child clock fail to derive a needed clock rate, and it might be dangerous to involve the clk-pllv3.c driver to this fix. Thus we here apply 3.0.35 way provisionally. ] Expected result: anaclk2 0 1 24576000 lvds2_in 0 1 24576000 pll4_sel 0 1 24576000 pll4_audio 0 1 786432000 pll4_post_div 0 1 786432000 pll4_audio_div 0 1 786432000 esai_sel 0 1 786432000 esai_pred 0 1 98304000 esai_podf 0 1 24576000 esai 0 1 24576000 Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 49584be724d4d9c7a753d2b981b3932d8d871eb4)
2014-02-19ENGR00299756-2 ARM: imx6q: Add missing lvds2 clock to the clock treeNicolin Chen
We actually have lvds2 (analog clock2), an I/O clock like lvds1, in the SoC. And this lvds2, along with lvds1, can be used to provide external clock source to the internal pll, such as pll4_audio and pll5_video. So This patch mainly adds the lvds2 to the clock tree and fix its relationship with pll4 accordingly. [ To reduce the risk from code changing. This patch only takes care of pll4 related part. We might later need to add the relationship with pll5 too. ] Acked-by: Wang Shengjiu <b02247@freescale.com> Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com> (cherry picked from commit 5b74b6b26e4b44d265090fc6ad15b15ccb7b5cff)
2014-02-19ENGR00298052-7 ARM: imx6q: remove function imx6q_lvds_cabc_init()Liu Ying
This patch removes the function imx6q_lvds_cabc_init() from the machine layer since we have a dedicated Hannstar CABC driver to control the CABC feature. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit b0d2154a9c63b2beba774e46b90ec3d55609c672)
2014-02-19ENGR00298052-6 ARM: dts: imx6qdl-sabresd: remove lvds_cabc_ctrlLiu Ying
This patch removes the device tree node lvds_cabc_ctrl, since it is replaced by hannstar_cabc_lvds0 and hannstar_cabc_lvds1. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 6a3d2c5e858afeef695bcd9fe2ecc0933d3d29da)
2014-02-19ENGR00298052-5 ARM: dts: imx6qdl-sabresd: support Hannstar CABCLiu Ying
This patch adds a device tree node for the Hannstar CABC function. We currently disable the CABC feature since it makes a panel's backlight unstable when display content varies considerably from time to time. Signed-off-by: Liu Ying <Ying.Liu@freescale.com> (cherry picked from commit 0c98df5d1b04ea043e5279628aebf406c250f5e3)
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