| Age | Commit message (Collapse) | Author |
|---|
|
Conflicts:
drivers/mtd/ubi/ubi.h
drivers/mtd/ubi/wl.c
|
|
Enable module versioning support (CONFIG_MODVERSIONS and
CONFIG_MODULE_SRCVERSION_ALL) which allows using kernel modules across
different kernel builds/versions.
While at it also update the Android configurations.
|
|
Change-Id: I40a8481618b1a5995a713ff343c7532badd20b65
Change-Id: I399302118c9d8d8246a4a304ff7a1ea80889dbc6
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45568
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
(cherry picked from commit 121c0c6dffe16c683f4dbf00ed841fb4de1f70a0)
Conflicts:
drivers/mmc/core/mmc.c
|
|
Commit fe4c58c4b96a24aba8e27956e8158b3002723b17 adding ADV7280 support
introduced the following warning being printed during boot:
[ 1.121072] sysfs: cannot create duplicate filename
'/devices/platform/soc-camera-pdrv.3'
|
|
(tegra-l4t-r16-16.5)
Conflicts:
drivers/media/video/tegra_v4l2_camera.c
drivers/mmc/host/sdhci.c
drivers/watchdog/tegra_wdt.c
include/media/tegra_v4l2_camera.h
|
|
|
|
This patch adds optional UHS support for the 8-bit MMC controller.
Please note that this requires V1.1A or later module hardware plus the
pull-up resistors on the data as well as the command signal lines of
your carrier board need to be removed (e.g. R46 to R54 on our Apalis
Evaluation Board V1.1A). If those pre-requisites are met support can be
enabled using the following kernel command line parameter:
mmc_uhs=1
|
|
Certain low-speed USB devices were not detected correctly when plugged
into a running system.
|
|
Both the Apalis EvalBoard as well as Ixora allow their LTC2954
pushbutton on/off controller to optionally initiate orderly shutdown
via GPIO interrupt on GPIO5 upon short power button press (short here
meaning really short unless C137 resp. C35 is assembled). For this to
work the following wiring is required:
Apalis EvalBoard V1.1a X61-4 to X2-6
Ixora V1.0a X5-4 to X27-17
For systemd/logind to actually use this as a power-switch a custom udev
rule /etc/udev/rules.d/70-power-switch-apalis_t30.rules as follows is
required:
# Specific rule for apalis_t30:
#
# Apalis T30's power button is not part of the kernel acpi subsystem.
# Let's manually add the power-switch tag to control its behaviour with
# systemd/logind
ACTION=="remove", GOTO="power_apalis_t30_end"
SUBSYSTEM=="input", KERNEL=="event1", TAG+="power-switch"
LABEL="power_apalis_t30_end"
|
|
Both the Apalis EvalBoard as well as Ixora allow their LTC2954
pushbutton on/off controller to optionally be forced off by using a
GPIO. This patch implements this upon poweroff/shutdown using Apalis
GPIO6 which happens to be internally pulled-up upon power-on reset
(otherwise we would immediately get powered off again). For this to
work the following wiring is required:
Apalis EvalBoard V1.1a X2-A5 to X61-5
Ixora V1.0a X27-18 to X5-5
|
|
The wake-up-key (formerly power-key) on MXM3 pin 37 aka WAKE1_MICO is
actually active-low due to the EvalBoard v1.1a having 4.7 K pull-up.
This patch fixes this.
While at it also get rid of the custom wakeup_key handling blindly
copied from T20 as non of the other T30 boards do this and it anyway
might only be required for LP0 which we anyway do not support so far.
|
|
This patch fixes a clock related audio hub driver lock-up observed when
booting with mainline U-Boot which we are in the process of migrating
to now.
|
|
Do not disable and re-enable clocks after deasserting
PCIE, AFI and PCIEX resets. Deasserting the resets should
be followed by programming the PCIE.
Bug 1521306
Change-Id: Idc43bc9b21cac3818852ed059fe512f4cd75b748
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/495616
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
PCIe Reset line must be asserted for at least 100us after clock is enabled.
PEX 2 Controller Register fix, offsets are not at constant intervals.
Bug 1521306
Reviewed-on: http://git-master/r/225399
(cherry picked from commit df0760bf515236bed2e87e590509642ab72a01b5)
Change-Id: I7b44ea51e7e02f2bca93cfc75ed85e01ab91fe03
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
Reviewed-on: http://git-master/r/435598
Reviewed-by: Jay Agarwal <jagarwal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Eric Brower <ebrower@nvidia.com>
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
Do not disable and re-enable clocks after deasserting
PCIE, AFI and PCIEX resets. Deasserting the resets should
be followed by programming the PCIE.
Bug 1521306
Change-Id: Idc43bc9b21cac3818852ed059fe512f4cd75b748
Signed-off-by: Shreshtha SAHU <ssahu@nvidia.com>
|
|
Commit 455bd4c430b0 ("ARM: 7668/1: fix memset-related crashes caused by
recent GCC (4.7.2) optimizations") attempted to fix a compliance issue
with the memset return value. However the memset itself became broken
by that patch for misaligned pointers.
This fixes the above by branching over the entry code from the
misaligned fixup code to avoid reloading the original pointer.
Also, because the function entry alignment is wrong in the Thumb mode
compilation, that fixup code is moved to the end.
While at it, the entry instructions are slightly reworked to help dual
issue pipelines.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Tested-by: Alexander Holler <holler@ahsoftware.de>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
optimizations
Recent GCC versions (e.g. GCC-4.7.2) perform optimizations based on
assumptions about the implementation of memset and similar functions.
The current ARM optimized memset code does not return the value of
its first argument, as is usually expected from standard implementations.
For instance in the following function:
void debug_mutex_lock_common(struct mutex *lock, struct mutex_waiter *waiter)
{
memset(waiter, MUTEX_DEBUG_INIT, sizeof(*waiter));
waiter->magic = waiter;
INIT_LIST_HEAD(&waiter->list);
}
compiled as:
800554d0 <debug_mutex_lock_common>:
800554d0: e92d4008 push {r3, lr}
800554d4: e1a00001 mov r0, r1
800554d8: e3a02010 mov r2, #16 ; 0x10
800554dc: e3a01011 mov r1, #17 ; 0x11
800554e0: eb04426e bl 80165ea0 <memset>
800554e4: e1a03000 mov r3, r0
800554e8: e583000c str r0, [r3, #12]
800554ec: e5830000 str r0, [r3]
800554f0: e5830004 str r0, [r3, #4]
800554f4: e8bd8008 pop {r3, pc}
GCC assumes memset returns the value of pointer 'waiter' in register r0; causing
register/memory corruptions.
This patch fixes the return value of the assembly version of memset.
It adds a 'mov' instruction and merges an additional load+store into
existing load/store instructions.
For ease of review, here is a breakdown of the patch into 4 simple steps:
Step 1
======
Perform the following substitutions:
ip -> r8, then
r0 -> ip,
and insert 'mov ip, r0' as the first statement of the function.
At this point, we have a memset() implementation returning the proper result,
but corrupting r8 on some paths (the ones that were using ip).
Step 2
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 1:
save r8:
- str lr, [sp, #-4]!
+ stmfd sp!, {r8, lr}
and restore r8 on both exit paths:
- ldmeqfd sp!, {pc} @ Now <64 bytes to go.
+ ldmeqfd sp!, {r8, pc} @ Now <64 bytes to go.
(...)
tst r2, #16
stmneia ip!, {r1, r3, r8, lr}
- ldr lr, [sp], #4
+ ldmfd sp!, {r8, lr}
Step 3
======
Make sure r8 is saved and restored when (! CALGN(1)+0) == 0:
save r8:
- stmfd sp!, {r4-r7, lr}
+ stmfd sp!, {r4-r8, lr}
and restore r8 on both exit paths:
bgt 3b
- ldmeqfd sp!, {r4-r7, pc}
+ ldmeqfd sp!, {r4-r8, pc}
(...)
tst r2, #16
stmneia ip!, {r4-r7}
- ldmfd sp!, {r4-r7, lr}
+ ldmfd sp!, {r4-r8, lr}
Step 4
======
Rewrite register list "r4-r7, r8" as "r4-r8".
Signed-off-by: Ivan Djelic <ivan.djelic@parrot.com>
Reviewed-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Dirk Behme <dirk.behme@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
|
|
Enable VLAN networking functionality.
While at it also enable some more kernel modules for Apalis T30 PCIe
based devices like the Intel E1000E NICs, Intel IWLAGN Wi-Fi cards,
PCIe serial cards and XHCI based USB 3.0 controllers.
|
|
Use HDA HDMI audio now on Colibri T30 as well allowing for up to 7.1
multi-channel playback. Split board sound initialisation between Apalis
and Colibri T30 in order to distinguish better between default SPDIF
being supported out-of-the-box on Apalis vs. this being an optional
feature for the Colibri. Therefore remove SPDIF for the Colibri T30.
While at it add csus clock required for vi_sensor camera master clock
on Apalis T30 and clk_out_2/extern2 for Colibri T30, fix debug UART1
initialisation, get rid of spurious CONFIG_SND_USB enable and further
clean-up both board platform data files.
|
|
Enable CONFIG_FHANDLE required for systemd >= 209 according to
lists.freedesktop.org/archives/systemd-devel/2014-February/017362.html
While at it put them all 3 on par concerning ARM Errata configuration.
|
|
Fix (Colibri) resp. introduce (Apalis) SPI device controller data to
properly use HW based chip select with one clock of setup and hold time
each for both MCP2515 CAN controller(s) as well as spidev.
|
|
The 1.8V quirk also affected the internal eMMC which disabled newer
modes such as SDR50, SDR104 and DDR50. This in turn lead to an
out of spec usage since the clock was still 50MHz.
By creating a no_1v8 field in the platform data we can now enable
this work around on a per-instance basis. Hence we enable the
quirk only on the controllers which are connected to the external
SD-slots.
|
|
PCIe Reset line must be asserted for at least 100us after clock is enabled.
PEX 2 Controller Register fix, offsets are not at constant intervals.
Bug 1521306
Reviewed-on: http://git-master/r/225399
(cherry picked from commit df0760bf515236bed2e87e590509642ab72a01b5)
Change-Id: I7b44ea51e7e02f2bca93cfc75ed85e01ab91fe03
Signed-off-by: Shreshtha Sahu <ssahu@nvidia.com>
|
|
This commit resolves an issue of non-working vi camera driver
on Colibri T20 occured after a l4t-r16-r4 merge.
|
|
- remove reduntant emc clock rate set which is controlled by DVFS
- VI's maxim working clock freq is 300MHz
- Change VI clock divider from an integer to a decimal, so the
maxim VI clock on Cardhu should be 272MHz (PLL_P is 408MHz and
divider is 1.5)
Bug 1478352
Change-Id: I4028ed8531d92300d131befb53a4c9dc9f90930d
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Reviewed-on: http://git-master/r/419071
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
Tested-by: Winnie Hsu <whsu@nvidia.com>
|
|
Signed-off-by: Bryan Wu <pengw@nvidia.com>
Change-Id: I67c50ff86b53a6c1001d2b688251dc55bd2eff55
Reviewed-on: http://git-master/r/419070
Reviewed-by: Winnie Hsu <whsu@nvidia.com>
|
|
Add SPI controller platform data required for use of hardware chip
selects.
While at it pull-up SPI chip select pin due to NVIDIA's designers
taking the term chip select a little too personal: they indeed only
select a chip otherwise all the chip select pins are just left
floating!
|
|
The MCP2515 on the Colibri EvalBoard V3.1a actually uses regular system
reset aka RESET_OUT# on SODIMM 87 to reset the MCP2515.
Therefore clean-up resp. remove any MECS Tellurium legacy in that
respect.
While at it adjust copyright year, re-order some include, clean-up some
struct spacing, re-order clocks and improve some comments.
|
|
|
|
This commit adds settings such as:
- values of horizontal/vertical active start,
- enabling/disabling internal sync,
to the private data of decoders: MAX9526, ADV7180, TVP5150,
OV7670 and AS0260.
The feature is available through *_tegra_camera_platform_data
struct initialised in board-*.c files.
|
|
This commit fixes the crash that occures while loading tegra_v4l2_camera
module caused by its new features (private data per sensor).
updated files:
arch/arm/mach-tegra/board-apalis_t30.c
arch/arm/mach-tegra/board-colibri_t20.c
arch/arm/mach-tegra/board-colibri_t30.c
|
|
This commit fixes the kernel compilation error with the lack
of the export of tegra_powergate_partition symbol in
arch/arm/mach-tegra/powergate.c
|
|
Enable IEEE 1588 precision time protocol (PTP) support.
|
|
|
|
|
|
Tegra20 and Tegra30 do not support gen2 PCIe, so correct the
register setting to disable it.
Signed-off-by: Eric Brower <ebrower@nvidia.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Thierry Reding <treding@nvidia.com>
|
|
Conflicts:
drivers/media/video/tegra_v4l2_camera.c
reverted to current driver supporting ACM rather than CSI2
drivers/media/video/videobuf2-dma-nvmap.c
drivers/video/tegra/host/Makefile
|
|
Disable PCIe Gen2 capability. This is not supported on Tegra 20/30 SOCs.
Bug 1399592
Change-Id: I696a982b93d2e56a3b24379d38e51a5e93e4b7a1
Signed-off-by: Eric Brower <ebrower@nvidia.com>
Reviewed-on: http://git-master/r/326195
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Activate Fusion touchscreen driver. Use GPIO 5/6 as pen down/reset
GPIO and provide a helper function to free the GPIO before the
driver requests them.
|
|
Fusion touchscreen driver now uses platform data to do GPIO
initialization by itself. Make use of this by providing GPIO numbers
instead of doing initialization in the board initialization.
|
|
Allow to change clock polarity for RGB display output using the
keywords outputen/pixclockpol/vsync and hsync. Add them right
after the driver specification, use 0/1 to specifiy high/low
polarity, e.g. video=tegrafb0:pixclockpol:1,800x480
|
|
Remove special clocks for Tegra 2, but use backup clock source
instead. This allows to run all common used resolution within
the drivers -1/+9% allowed band for pixelclock exactness.
|
|
Remove TEGRA_FB_VGA defines and use VGA as default. Since initial
mode is now configureable through kernel cmd line parameter, we
don't need those compile time helpers.
|
|
A request to set brightness to zero is valid irrespective
of what previous brightness of backlight was. A request of
zero brightness disables PWM; so a re-request can be made
to disable a already disabled PWM.
bug 1416333
Change-Id: Ia5f29911456eb5d76fa303bb9070a6f04ec97002
Signed-off-by: Pankaj Dabade <pdabade@nvidia.com>
Reviewed-on: http://git-master/r/348366
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
|
|
Use modedb to set mode on framebuffer/display controller for
Tegra 20 based module Colibri T20 too.
|
|
In order to find a viable resolution we not only parse VESA mode,
we also parse CEA (multimedia) modes and our own small modedb (for
specific touch screens).
|
|
|
|
Use new modedb based framebuffer settings by defining default_mode
in the display controllers platform data. Also impelmented the
fallback logic to this default_mode in case no kernel cmd line
parameter was set.
|
|
Allow to specify framebufffer videomode using kernel command line
parameters. NVIDIAs binary X driver later on picks up those settings
and start X with current mode settings, if no EDID data are available.
|
|
Disable hardware statistics monitor for AVP due to it completely
hanging upon boot on certain Colibri T20 V1.2a modules.
|
