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2016-03-31MLK-12573 ARM: dts: set LCD_nPWREN low to make VLCD_3V3 output 3V3.Robby Cai
Q901 (IRLML6401) is p-channel MOSET, need set pin1 (LCD_nPWREN) to low to let pin3 output be 3V3. Normally when pin1 is high, then pin3 output should be gated. It was working previously due to some leakage. Correct the enable logic from the software viewpoint. Signed-off-by: Robby Cai <robby.cai@nxp.com> (cherry picked from commit c70398a0b2e860d0bd9478d956d077eff8e7ea4f)
2016-03-21MLK-12466 ARM: dts: imx6ul-14x14-evk-usb-certi: add USB certification dtsPeter Chen
Below are the differences between standard evk: - Enable tpl - Enable software control vbus for otg2 (hardware rework is needed) - Disable TSC due to the pin conflict with above vbus regulator Signed-off-by: Peter Chen <peter.chen@nxp.com> (cherry picked from commit e4a5f2e763d5c9df8b97b01ee38879a9bee66f0d)
2016-03-15MLK-12556 dts: i.mx6ul: configure the CMA region by defaultJason Liu
CMA region is a must to avoid the multile memory mapping for the DMAed memory and also benifit the large continious phisical memory allocation. The default value is depend on the target system design and user cases definition. This is not suitable to put this into the soc.dtsi, thus we put it into the board DTS. customer can override the value by changing cma size in DTS file. Again, customer need set the CMA size correctly according to the target system. The incorrectly CMA size can cause Linux kernel fail to boot up.CMA disabled or CMA size set to zero is also not allowed. Signed-off-by: Jason Liu <jason.hui.liu@nxp.com>
2016-03-04MLK-12478-2 dts: imx7d-lpddr3-arm2: add lpsr mode state for flexcan pinsDong Aisheng
add lpsr mode state for flexcan pins Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> (cherry picked from commit 535699f47fbd7fb22a435ca2047560ee20687392)
2016-03-02MLK-12480 dts: imx7d-12x12-lpddr3-arm2: remove extended enet dts fileFugang Duan
There have two same extended enet dts file to enable fec2 port, so remove the redundant enet dts file. The issue is caused by the commit 370426c2a918 that was cherry picked after commit b74c6b9c7fdc. Signed-off-by: Fugang Duan <B38611@freescale.com>
2016-03-01MLK-12462-2 dts: imx: add pm-ignore-notify for WiFi cardDong Aisheng
MMC core pm_notify will re-detect card after system suspend/resume, regardless of post-cd claim. Since in current MMC implement, non-removeable card only detects once, this will break post card detect which happens next. e.g. when we suspend/resume system first, then load Broadcom wifi module, we will get below dump: root@imx6qdlsolo:/mnt/nfs/vte_IMX6QP-Sabre-SD# modprobe bcmdhd firmware_path=/lib/firmware/bcm/ZP_BCM4339/fw_bcmdhd.bin nvram_path=/lib/firmware/bcm/ZP_BCM4339/bcmdhd.ZP.SDIO.cal dhd_module_init in Power-up adapter 'DHD generic adapter' wifi_platform_bus_enumerate device present 1 failed to power up DHD generic adapter, 3 retry left wifi_platform_bus_enumerate device present 0 -----------[ cut here ]----------- Kernel BUG at 80513170 [verbose debug info unavailable] Internal error: Oops - BUG: 0 1 PREEMPT SMP ARM Modules linked in: bcmdhd ov5642_camera ov5640_camera_mipi_int ov5640_camera_int mxc_v4l2_capture mxc_dcic ipu_bg_overlay_sdc ipu_still v4l2_int_device ipu_prp_enc ipu_csi_enc ipu_fg_overlay_sdc CPU: 1 PID: 1487 Comm: modprobe Not tainted 4.1.15-1.0.0+g54cf6a2 #1 Hardware name: Freescale i.MX6 Quad/DualLite (Device Tree) task: a881e3c0 ti: a9152000 task.ti: a9152000 PC is at mmc_sdio_remove+0x7c/0x80 LR is at mmc_sdio_force_remove+0xc/0x34 pc : [<80513170>] lr : [<80513180>] psr: 60030013 sp : a9153d28 ip : 00000000 fp : 00000000 r10: 00000000 r9 : 00000000 r8 : 7f0f76e0 r7 : a9153d58 r6 : 00000000 r5 : 00000000 r4 : a83f1800 r3 : 00000000 r2 : 00000000 r1 : 809c02f4 r0 : a83f1800 Flags: nZCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment user Control: 10c53c7d Table: 38d7804a DAC: 00000015 Process modprobe (pid: 1487, stack limit = 0xa9152210) Stack: (0xa9153d28 to 0xa9154000) 3d20: 00000000 7f0c569c a9ffe440 00000003 00000000 7f0c58f4 3d40: a81942c0 8032e33c a8195960 7f0fbf68 00020002 00000000 a9153d58 a9153d58 3d60: fffffdfb 80bc0db4 a81af810 7f0f9518 fffffdfb 00000008 00000000 5624ce5c 3d80: 00000124 80381140 80bc0db4 a81af810 7f0f9518 00000000 00000008 8037f9dc 3da0: a81af810 7f0f9518 a81af844 80b288b0 00000000 8037fbec 00000000 7f0f9518 3dc0: 8037fb60 8037e068 a8025c5c a818fa34 7f0f9518 a20ff280 00000000 8037f16c 3de0: 7f0f0330 a9ffe440 00000000 7f0f9518 a9ffe440 00000000 80bb18f4 803801ec 3e00: 7f0fbf68 a9ffe440 00000000 7f0c5fdc 80b01720 80b01720 a9ffe440 7f11f000 3e20: 00000000 00000001 5624ce5c 80009730 abc7b120 800e316c 000000c8 a9209a00 3e40: 8040003f 00000001 00010000 800b0dfc 000000c8 8040003f abc7dc60 80afc2b0 3e60: abc75880 80afc260 a8001f00 80afe6c0 00000124 800e4944 7f0f9718 00000001 3e80: 7f0f9718 00000001 a9ffeb00 7f0f9718 a9db31c0 8078e47c 7f0f9718 a9db31c0 3ea0: a9153f58 00000001 a9db31c8 80094094 7f0f9724 00007fff 800910d4 00000000 3ec0: 00000000 7f0f9760 00000000 7f0f9860 c0fce8f4 7f0f9724 00000000 8079aa0c 3ee0: c0f07000 000c7944 00b6817a 00000000 0000000e 00000000 00000000 00000000 3f00: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 3f20: 00000000 00000000 00000000 00000000 00000640 00000000 00000003 01608348 3f40: 0000017b 8000f604 a9152000 00000000 01608270 800944f8 c0f07000 000c7944 3f60: c0fce28c c0f83439 c0f99248 0007aff8 0008f968 00000000 00000000 00000000 3f80: 00000029 0000002a 00000020 00000024 00000015 00000000 01608348 00000073 3fa0: 00000000 8000f480 01608348 00000073 00000003 01608348 00000000 00000000 3fc0: 01608348 00000073 00000000 0000017b 01608218 00000000 00000073 01608270 3fe0: 7e9ab8c0 7e9ab8b0 0001f2c0 76eac340 600d0010 00000003 00000000 00000000 [<80513170>] (mmc_sdio_remove) from [<7f0c58f4>] (dhd_wifi_platform_load+0x180/0x39c [bcmdhd]) [<7f0c58f4>] (dhd_wifi_platform_load [bcmdhd]) from [<80381140>] (platform_drv_probe+0x44/0xac) [<80381140>] (platform_drv_probe) from [<8037f9dc>] (driver_probe_device+0x174/0x2b4) [<8037f9dc>] (driver_probe_device) from [<8037fbec>] (__driver_attach+0x8c/0x90) [<8037fbec>] (__driver_attach) from [<8037e068>] (bus_for_each_dev+0x68/0x9c) [<8037e068>] (bus_for_each_dev) from [<8037f16c>] (bus_add_driver+0x148/0x1f0) [<8037f16c>] (bus_add_driver) from [<803801ec>] (driver_register+0x78/0xf8) [<803801ec>] (driver_register) from [<7f0c5fdc>] (dhd_wifi_platform_register_drv+0x1bc/0x208 [bcmdhd]) [<7f0c5fdc>] (dhd_wifi_platform_register_drv [bcmdhd]) from [<80009730>] (do_one_initcall+0x8c/0x1d4) [<80009730>] (do_one_initcall) from [<8078e47c>] (do_init_module+0x5c/0x1a8) [<8078e47c>] (do_init_module) from [<80094094>] (load_module+0x1ba8/0x1e50) [<80094094>] (load_module) from [<800944f8>] (SyS_finit_module+0x80/0x90) [<800944f8>] (SyS_finit_module) from [<8000f480>] (ret_fast_syscall+0x0/0x3c) Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com>
2016-03-01MLK-12457 dts: imx7d-12x12-lpddr3-arm2: correct pwm1 pinctrl settingsFancy Fang
The pwm1's pin belongs to lpsr iomux. So this should be corrected. Signed-off-by: Fancy Fang <chen.fang@nxp.com> (cherry picked from commit 94f87fc66f354dea8537d360732612ac5d6d65e6)
2016-02-29MLK-12454 ARM: dts: imx7d-12x12-lpddr3-arm2: add adc supportHaibo Chen
Add ADC support for imx7d-12x12-lpddr3-arm2 board. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
2016-02-26MLK-12456 ARM: dts : add spi1 IOMUX sleep stateGao Pan
Add spi1 IOMUX sleep state in imx7d-12x12-lpddr3-arm2.dts. Signed-off-by: Gao Pan <pandy.gao@nxp.com>
2016-02-24MLK-12399: ARM: imx: imx6q: lpddr2 busfreq audio operation supportAdrian Alonso
Add 100Mhz (HIGH_AUDIO_CLK) bus frequency support for imx6q lpddr2 targets On HIGH_AUDIO_CLK busfreq request source dram mmdc clock root from pll2_pfd2_div_2 to generate 100Mhz operation frequency. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Anson Huang <Anson.Huang@nxp.com> (cherry-picked from commit 5bc118112b36b72ed6b1e75a3760c371b486abec)
2016-02-24MLK-12443 ARM: imx: disable low power mode before entering LPSR modeAnson Huang
Before entering LPSR mode, as GPC was set to STOP/DSM mode already, the wfi loop after LPSR mode would cause system enter STOP/DSM mode first, then SNVS will force PMIC_ON_REQ to low, as SNVS needs IPG clock to be on before entering SNVS/LPSR mode, so we have to disable STOP/DSM mode to make sure IPG clock is on before SNVS actually enters LPSR mode. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-02-23MLK-12433: arm: dts: imx: disable tempmon device when cpufreq is disabledBai Ping
In the lpddr3-arm2-m4 dts, the I2C1 is disabled, so PMIC is disabled, the cpufreq is not support. As thermal driver is depended on cpufreq driver, if cpufreq is not support, the tempmon device can be disabled. Signed-off-by: Bai Ping <ping.bai@nxp.com>
2016-02-22MLK-10983 : ARM: imx: gpc: wait PU LDO ramp before GPU power up on i.mx6qpRobin Gong
Wait PU LDO ramp before GPU power on once system resume back on i.mx6qp, otherwise, GPU resume may hang. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit 361af86190c160e0ea66e007c61b18a793149b74) (cherry picked from commit 7ddd834bde557db1b62ea2ae683455cc75ba858e)
2016-02-22MLK-12412 ARM: imx: clk: correct 'csi_sel' settingsFancy Fang
The 'csi_sel' clock is in ccm instead of anatop. So correct the wrong register address used. Signed-off-by: Fancy Fang <chen.fang@nxp.com> (cherry picked from commit 2a1a58c63f4aeba3733f74efdaef3784186ef15c)
2016-02-21MLK-12430 ARM: imx: enable and bypass pll1_bypass clk before changing arm_podfBai Ping
Before changing the ARM_PODF, the pll1_bypass clock should be enabled and bypassed to make sure the ARM_PODF can be changed. Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit 78916c528cb424b20e87887c85246fceac81f3b4)
2016-02-19MLK-12423: ARM: dts: imx6sl: remove always-on for vddpuRobin Gong
PU can be dynamically turned off or on, so we need remove "regulator-always-on" property. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit f3c0df15fbecce36cae531a4a919d544f9ea8e2a)
2016-02-18MLK-9954 arm: imx: update operating point for i.MX6DLBai Ping
Update the i.MX6DL cpu operating points to comply with the latest published datasheet. Latest i.MX6DL datasheet of Rev.4, 10/2014 updates the 396MHz setpoint's min voltage from 1.075V to 1.125V, Add a 25mV margin to cover the board IR drop, here use 1.15V for 396MHz to match datasheet. Signed-off-by: Bai Ping <b51503@freescale.com> (cherry picked from commit 13c0324e8a006478c1b2045be6e84587b9857ad8)
2016-02-18MLK-10177 arm: imx: add cpuidle driver support for i.MX6DLBai Ping
Add cpudile driver support for i.MX6DL. Signed-off-by: Bai Ping <b51503@freescale.com> (cherry picked from commit 72809d405ca73f85c0397fa277ba2481512fe521)
2016-02-18MLK-12375 ARM: imx: improve ARM power up time for i.MX6UL TO1.1Anson Huang
On i.MX6UL, PGC_CPU_PUPSCR_SW's counter uses IPG/2048 as clock source, as IPG is at 1.5MHz during low power idle, so the power up time can be up to 1.3mS which is too long for idle. Since TO1.1, design team re-define the bit[5], if this bit is set to 1, the clock will be IPG/32, ~22us, enable this function for TO1.1, the latency value for low power idle needs to be adjusted accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Robin Gong <yibin.gong@nxp.com> (cherry picked from commit 1036fbdba0111d7fa21acb810e01907db8997a31)
2016-02-17MLK-12407 ARM: imx: clk: correct the periph_pre clk typeBai Ping
The periph_pre, periph2_pre, periph_clk2_sel and periph2_clk2_sel should be registered as 'imx_clk_mux_bus' type. Signed-off-by: Bai Ping <ping.bai@nxp.com> (cherry picked from commit c84612adf2ee69b019ef500fe387ad930a5ed151)
2016-02-17MLK-10190 ARM: dts: disable disp mix on imx6sl by defaultRobby Cai
The cause is EPDC works not stable if DISP mix is enabled. Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit db5b89bd35d259504da1c15d62f898f1291541e2) (cherry picked from commit 35f41cd363c076a0f429106e2a043992125c36ac)
2016-02-17MLK-12402-2 ARM: dts: imx6sl: add power-domains for display domainFancy Fang
Add power-domains for display domain for imx6sl. Signed-off-by: Fancy Fang <chen.fang@nxp.com> (cherry picked from commit c7d94716a0fcf711a447c0490a81f69bee0cd8dd)
2016-02-17MLK-12402-1 ARM: dts: imx6sx: add power-domains for display domainFancy Fang
Add power-domains for display domain for imx6sx. Signed-off-by: Fancy Fang <chen.fang@nxp.com> (cherry picked from commit cd1d72f0a0f7effe91ca7f191aadc3efac5d1a1c)
2016-02-16MLK-12077-4 dts: imx6: add cd-post property for BCM WiFi devicesDong Aisheng
BCM WiFi driver needs to take care of card detect by itself. Using cd-post property to tell MMC core not detect card automatically during host driver probe and post it untill client driver tells it to do it. Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> (cherry picked from commit bc1ac009d93e3fe731162d3193108321611ca879)
2016-02-16MLK-12077-3 bcmdhd: fix bcmdhd system resume crash issue.Dong Aisheng
bcmdhd can't support removing host during suspend and driver crash when detect card after resume due to no response to CMD7. It looks bcmdhd has a special requirement to enumerate card by itself which is incompatible with current MMC core. So implement post-cd feature to allow driver to detect card as it wants, then we add back non-removable capability to avoid MMC core to redetect card after resume. root@imx6qdlsolo:~# echo standby > /sys/power/state PM: Syncing filesystems ... done. PM: Preparing system for standby sleep Freezing user space processes ... (elapsed 0.001 seconds) done. Freezing remaining freezable tasks ... (elapsed 0.001 seconds) done. PM: Entering standby sleep evbug: Event. Dev: input3, Type: 0, Code: 0, Value: 1 evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 1 PM: suspend of devices complete after 652.363 msecs PM: suspend devices took 0.660 seconds PM: late suspend of devices complete after 1.148 msecs PM: noirq suspend of devices complete after 1.043 msecs Disabling non-boot CPUs ... CPU1: shutdown Enabling non-boot CPUs ... CPU1 is up PM: noirq resume of devices complete after 0.534 msecs PM: early resume of devices complete after 0.553 msecs evbug: Event. Dev: input2, Type: 1, Code: 116, Value: 1 evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 0 evbug: Event. Dev: input2, Type: 1, Code: 116, Value: 0 evbug: Event. Dev: input2, Type: 0, Code: 0, Value: 0 mmc1: error -110 during resume (card was removed?) PM: resume of devices complete after 605.525 msecs PM: resume devices took 0.610 seconds PM: Finishing wakeup. Restarting tasks ... done. WARNING: driver bcmsdh_sdmmc did not remove its interrupt handler! root@imx6qdlsolo:~# Unable to handle kernel NULL pointer dereference at virtual address 0000022c pgd = 80004000 [0000022c] *pgd=00000000 Internal error: Oops: 17 [#1] PREEMPT SMP ARM Modules linked in: bcmdhd evbug ov5647_camera_mipi mxc_mipi_csi mx6s_capture CPU: 1 PID: 780 Comm: kworker/u4:4 Not tainted 4.1.15-01434-g70f4b36 #1310 Hardware name: Freescale i.MX7 Dual (Device Tree) Workqueue: kmmcd mmc_rescan task: a974af80 ti: a846e000 task.ti: a846e000 PC is at _raw_spin_lock_irqsave+0x1c/0x5c LR is at get_parent_ip+0x10/0x2c pc : [<8077b9d4>] lr : [<8005207c>] psr: 60050093 sp : a846fc20 ip : 0001001f fp : a800b000 r10: 00000000 r9 : 00000001 r8 : 0000022c r7 : 00000002 r6 : 0000022c r5 : a0050013 r4 : 0000022c r3 : a974af80 r2 : 00000001 r1 : a846fc44 r0 : 00000000 Flags: nZCv IRQs off FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7d Table: a951406a DAC: 00000015 Process kworker/u4:4 (pid: 780, stack limit = 0xa846e210) Stack: (0xa846fc20 to 0xa8470000) fc20: 00000000 a846fc50 a846fc44 80061808 00000000 000001dc 00000000 805037fc fc40: 8d89d5ec 00000000 a974af80 80053e88 00000000 00000000 ab7293c0 00000000 fc60: 7f09c828 000000c9 7f09c828 a916a804 00000001 0001001f a800b000 7f0698a4 fc80: a974afc8 00000001 00000000 00000000 00012ebc a974af80 00000001 80ad46c0 fca0: a974af80 00000000 a8eeccc0 00000001 0001001f a846fd04 00000000 7f099440 fcc0: a800b000 7f0699c4 a846fcdf 00000000 00000001 7f068834 a937c900 0105c688 fce0: a846fd04 a8e20000 00000000 00000001 00000000 7f071f08 a846fd04 a80a0000 fd00: ffffffff 00000000 ffffffff a8e20000 a8e20000 00000000 7f099440 00000000 fd20: 00000000 7f099440 a800b000 7f072f4c a974af80 00000000 00000000 80778564 fd40: a846fd54 a9346550 80330028 00000001 a846e000 a8e20000 7f099440 00000000 fd60: 18005000 a8eeccc0 00000000 7f099440 a800b000 7f073744 a846fd8c 80052130 fd80: a9273898 00000000 a800b000 a8e20000 7f099440 00000001 a8eec200 a9270000 fda0: 00000000 7f099440 a800b000 7f07cd3c 80b81100 8040003f a800b000 00000000 fdc0: 00000000 a8e20000 7f099440 a9270000 a9273000 a9270000 00000000 7f099440 fde0: a800b000 7f02df4c 00000001 a8e20000 7f099440 a8eec200 00000000 a916e008 fe00: 00000000 a90bfb00 a800b000 7f074cbc a9270000 7f099440 a8e20000 00000000 fe20: a8f81610 7f0765ec 7f0765b0 a8eeccc0 a855df40 7f069310 a916a800 a8eec200 fe40: 7f09b414 7f06a950 7f06a908 a8f81608 a8f81600 8050e8b8 a8f81608 7f09b414 fe60: 80b22c70 80379744 a974af80 a8f8163c a8f81608 803797d4 00000005 a81ce930 fe80: a8f81608 8037923c a8f81608 a8f81608 80b93cf4 80376504 a846fea0 800e0e3c fea0: 00000000 00000000 a8f81608 000000bd a833f000 00000000 00000000 8050ed04 fec0: 00000001 8050dd8c 400f8c0f a833f000 ffffff92 a833f000 a81ce600 8050de30 fee0: 8050ddbc a833f240 a833f1dc 80506048 a90bfb00 a833f240 a800b000 a81ce600 ff00: 00000000 800462f0 a81ce600 80043c94 00000000 a800b000 a90bfb18 a800b014 ff20: a846e000 00000088 80b39379 a90bfb00 a800b000 8004654c 80ad4100 a800b164 ff40: a90bfb00 00000000 a84856c0 a90bfb00 80046500 00000000 00000000 00000000 ff60: 00000000 8004b1e8 2df9acc7 00000000 b5f3ff89 a90bfb00 00000000 00000000 ff80: a846ff80 a846ff80 00000000 00000000 a846ff90 a846ff90 a846ffac a84856c0 ffa0: 8004b10c 00000000 00000000 8000f568 00000000 00000000 00000000 00000000 ffc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000 ffe0: 00000000 00000000 00000000 00000000 00000013 00000000 ecd61557 f82769f5 [<8077b9d4>] (_raw_spin_lock_irqsave) from [<80061808>] (add_wait_queue+0x20/0x48) [<80061808>] (add_wait_queue) from [<805037fc>] (__mmc_claim_host+0x58/0x1b0) [<805037fc>] (__mmc_claim_host) from [<7f0698a4>] (sdioh_request_byte+0x1cc/0x2a4 [bcmdhd]) [<7f0698a4>] (sdioh_request_byte [bcmdhd]) from [<7f0699c4>] (sdioh_cfg_write+0x20/0x28 [bcmdhd]) [<7f0699c4>] (sdioh_cfg_write [bcmdhd]) from [<7f068834>] (bcmsdh_cfg_write+0x90/0xdc [bcmdhd]) [<7f068834>] (bcmsdh_cfg_write [bcmdhd]) from [<7f071f08>] (dhdsdio_clk_kso_enab+0x38/0x168 [bcmdhd]) [<7f071f08>] (dhdsdio_clk_kso_enab [bcmdhd]) from [<7f072f4c>] (dhdsdio_clk_devsleep_iovar+0xf4/0x5f4 [bcmdhd]) [<7f072f4c>] (dhdsdio_clk_devsleep_iovar [bcmdhd]) from [<7f073744>] (dhdsdio_bussleep+0x2f8/0x4dc [bcmdhd]) [<7f073744>] (dhdsdio_bussleep [bcmdhd]) from [<7f07cd3c>] (dhd_bus_stop+0x2e8/0x3f0 [bcmdhd]) [<7f07cd3c>] (dhd_bus_stop [bcmdhd]) from [<7f02df4c>] (dhd_detach+0x2a4/0x438 [bcmdhd]) [<7f02df4c>] (dhd_detach [bcmdhd]) from [<7f074cbc>] (dhdsdio_release+0x4c/0x1dc [bcmdhd]) [<7f074cbc>] (dhdsdio_release [bcmdhd]) from [<7f0765ec>] (dhdsdio_disconnect+0x3c/0xa0 [bcmdhd]) [<7f0765ec>] (dhdsdio_disconnect [bcmdhd]) from [<7f069310>] (bcmsdh_remove+0x3c/0x60 [bcmdhd]) [<7f069310>] (bcmsdh_remove [bcmdhd]) from [<7f06a950>] (bcmsdh_sdmmc_remove+0x48/0x60 [bcmdhd]) [<7f06a950>] (bcmsdh_sdmmc_remove [bcmdhd]) from [<8050e8b8>] (sdio_bus_remove+0x30/0xf8) [<8050e8b8>] (sdio_bus_remove) from [<80379744>] (__device_release_driver+0x70/0xe4) [<80379744>] (__device_release_driver) from [<803797d4>] (device_release_driver+0x1c/0x28) [<803797d4>] (device_release_driver) from [<8037923c>] (bus_remove_device+0xd8/0x104) [<8037923c>] (bus_remove_device) from [<80376504>] (device_del+0x10c/0x210) [<80376504>] (device_del) from [<8050ed04>] (sdio_remove_func+0x1c/0x28) [<8050ed04>] (sdio_remove_func) from [<8050dd8c>] (mmc_sdio_remove+0x40/0x70) [<8050dd8c>] (mmc_sdio_remove) from [<8050de30>] (mmc_sdio_detect+0x74/0x100) [<8050de30>] (mmc_sdio_detect) from [<80506048>] (mmc_rescan+0xb8/0x314) [<80506048>] (mmc_rescan) from [<800462f0>] (process_one_work+0x120/0x330) [<800462f0>] (process_one_work) from [<8004654c>] (worker_thread+0x4c/0x480) [<8004654c>] (worker_thread) from [<8004b1e8>] (kthread+0xdc/0xf4) [<8004b1e8>] (kthread) from [<8000f568>] (ret_from_fork+0x14/0x2c) Code: f10c0080 e3a00001 ebe359b1 f594f000 (e1943f9f) Signed-off-by: Dong Aisheng <aisheng.dong@nxp.com> (cherry picked from commit 8f998ca4d07aa93460ac7769c1f2b3be0c36fc78)
2016-02-05MLK-12392: arm: imx6q: fix lpddr2 build error if SMP is disabledAdrian Alonso
Fix build error if CONFIG_SMP is disabled: arch/arm/mach-imx/busfreq_lpddr2.c: In function ‘update_lpddr2_freq_smp’: arch/arm/mach-imx/busfreq_lpddr2.c:236:67: error: ‘me’ undeclared (first use in this function) printk(KERN_DEBUG "Bus freq set to %d done! cpu=%d\n", ddr_rate, me); Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Frank Li <Frank.Li@nxp.com>
2016-02-03MLK-12311: ARM: imx: imx6q lpddr2 busfreq single channel supportAdrian Alonso
Add imx6q lpddr2 busfreq support for single channel memory types, perform ddr frequency scaling taking into account if ddr uses single or dual channel mode by checking MMDC0_MDMISC[LPDDR2_2CH] state. Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-02-03MLK-12307: ARM: imx: imx6q arm2 use lpddr2 in 2 channel fixed modeAdrian Alonso
Set usable memory to 2 channel fixed mode MMDC0 0x80000000 512M MMDC1 0x10000000 512M MMDC 2 channel fixed mode is enabled by setting BOOT_CFG3[5:4] = 01 for Fixed 2x32 map Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com>
2016-02-03MLK-12306: ARM: imx: imx6 lpddr2 two channel suspend supportAdrian Alonso
Add lpddr2 two channel suspend support - save/restore mmdc io pads for channel 2 - Set mmdc channe 2 on self refresh and auto power saving mode only if mmdc channel 2 is enabled - Perform a reset fifo on resume_io when restoring mmdc io pads Signed-off-by: Adrian Alonso <adrian.alonso@nxp.com> Signed-off-by: Anson Huang <Anson.Huang@nxp.com> (cherry picked from commit 2e5982e82edc8fc7de0aebc8894a9f0a41e01965)
2016-02-03MLK-12023-3: arm: imx6q: add lpddr2 bus frequency supportAdrian Alonso
Add busfreq support for imx6q lpddr2 pop target platform DDR scaling support for low bus frequency and high bus frequency mode (24Mhz/400Mhz) Update Copyrigth year info Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit 91cff834d4f5d065fe8e7e60c1c1799f00990654)
2016-02-03MLK-12023-2: arm: imx6: refactor wfe ddr3 freq change low power modeAdrian Alonso
Refactor wfe_ddr3_freq_change to wfe_smp_freq_change in order to reuse enter/exit wfe standby low power mode. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit 4d92e1f5bab3480cb145821dce27960887e7a3ea)
2016-02-03MLK-12023-1: ARM: dts: imx: imx6q add busfreq device node labelAdrian Alonso
Add busfreq device node label to allow override busfreq properties on machine device tree descriptor Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit fd8faeb7a40fc2f9fb331d6ca6a60b64c95d7ee6)
2016-02-03MLK-11890: ARM: dts: imx: add imx6q arm2 lpddr2 targetAdrian Alonso
Add device tree for imx6q arm2 lpddr2 pop target platform Enable common imx6q features, uart, usb, usdhc, fec. Set DDR max frequency to 400Mhz which is the clock rate for MT42L128M64D2-25 Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit 06783aba18bda32f25107485891fc4bafc609abf)
2016-02-03MLK-11889: arm: imx6: low power mode support for imx6q lpddr2Adrian Alonso
Add low power suspend mode support for imx6q lpddr2 Save/restore mmdc iomux pads relevant to dual channel lpddr2 memory when enter/exit low power suspend mode. Remove unused macros in suspend-imx6. Signed-off-by: Adrian Alonso <aalonso@freescale.com> Signed-off-by: Anson Huang <b20788@freescale.com> (cherry picked from commit 5ebac6d425b859c51d570489d03684e0c976ef60)
2016-02-03MLK-12013 arm: imx: set eim_slow clk to 132Mhz only for MXC_CPU_IMX6QGao Pan
A patch(set imx6qp eim_slow to 132Mh) was pushed to eliminate the weim nor read performance drop cause by the IP difference between imx6q & imx6qp. However, the patch impacted the performance of imx6dl-ard. In succession, AXI clk is set to 270M which exceeds the max value(264M). This patch sets eim_slow to 132M only for MXC_CPU_IMX6Q. So the performance difference between imx6q & imx6qp decreases while no impact for imx6dl-ard. please see the following summary of weim nor read performance. clk(performance) 6q-sabreauto 6qp-sabreauto 6dl-ard imx_3.10 132M(18.9MB/s) —— 135M(19.1MB/s) imx_3.14.y 132M(18.9MB/s) 132M(16.8MB/s) 135M(19.1MB/s) Signed-off-by: Gao Pan <b54642@freescale.com> (cherry picked from commit f19e9899eacddb5343e7a7d476a500cd4551dffe)
2016-02-02MLK-12370 ARM: dts: imx7d-12x12-lpddr3-arm2: disable sim1 node in flexcan ↵Fugang Duan
dts file The sim1 has pin conflicts with flexcan1,flexcan2 and sai1. By default, imx7d 12x12 lpddr3 arm2 default dts enable sim1 node and disable flexcan1, flexcan2, sai1 nodes. The patch do two things: - disable sim1 node in extended flexcan dts file - remove redundant sim1 node in default dts file Signed-off-by: Fugang Duan <B38611@freescale.com>
2016-02-01MLK-12343 MX6SL-EVK missing hardware random number generator.Dan Douglass
ENGR00292341 imx6sl hwrng Add hwrng support for i.MX6SL. 1. Add RNG driver. This driver originated as fsl-rngc.c. It has been modified to support device tree. The name has been changed since it supports both b and c variants of RNG. 2. Added clock and compatible info to the device tree data. 3. Added the entry in the options in the Kconfig for hwrng. (cherry picked from commit 1f3f2c0647b7319c4e23293a61512e4191593513) [<vicki.milhoan@freescale.com>: Edited to apply to 3.14] Signed-off-by: Dan Douglass <dan.douglass@freescale.com> Signed-off-by: Victoria Milhoan <vicki.milhoan@freescale.com>
2016-02-01MLK-12350: ARM: anatop: disable PU regulator on i.mx6qp before suspendRobin Gong
To eliminate the power number, need turn off PU regulator before suspend since it's turned on always on i.mx6qp. Signed-off-by: Robin Gong <yibin.gong@nxp.com> (cherry picked from commit 9adf58b30c7ad3ac5662c4ef766b029a9a01faa0)
2016-02-01MLK-12358: ARM: dts: imx7d-val-m4: disable sim1 and reg_can2_3v3Richard Zhu
- Disable the sim1 on imx7d val board, because that there are pin conflictions between sim1 and flexcan2 used by M4. - Disable can2 is not enough, since the reg_can2_3v3 will be turned off by the regulator framework and that will impact can2 in m4 side even if can2 driver disabled in A7 side. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Tested-by: Ge Wang <G.Wang@nxp.com> (cherry picked from commit ff4b20bd06a4dce68df3f785326e46d287c24811)
2016-01-29MLK-12349 ARM: imx: skip RBC workaround for standby mode on i.MX7DAnson Huang
For standby mode, RBC workaround is NOT necessary as ARM platform is NOT powered down; Correct GIC register offset(0x1000) for disabling distributor. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-01-28MLK-12339 Security: Missing caam support.Dan Douglass
Added CAAM to the device tree for imx6sx in imx6sx.dtsi. Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
2016-01-28MLK-12262-6 ARM: imx: enable memory power down for i.MX7D TO1.1Anson Huang
Enable memory power down for i.MX7D TO1.1 to save power, TO1.0 has issue of entering DSM by mistake, so it is disabled as a solution, now that this issue is fixed on TO1.1, enable it. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-01-28MLK-12262-5 ARM: imx: add RBC workaround for i.MX7D DSMAnson Huang
Same as low power idle, during GPC shutting down ARM core, interrupts must be hold until the process done, apply RBC workaround and disable GIC during GPC powering down ARM core. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-01-28MLK-12262-4 ARM: imx: fix low power idle issue on i.MX7D TO1.1Anson Huang
For low power idle with ARM power gated, per hardware requirement, there must be no interrupt coming during the power down process of ARM core, so RBC counter is enabled to hold interrupts and GIC must be disabled at the moment; The hardware design team recommends ~240us is required during ARM core power down, so we update the RBC counter value to 8(~240us); Update GPC SCU and CPU power up/down timing according to design team's recommendation. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-01-28MLK-12262-3 ARM: imx: reduce DDR3 normal frequency to 400MHz for i.MX7D TO1.1Anson Huang
i.MX7D TO1.1 only supports DDR3 running at max frequency of 400MHz, update busfreq driver accordingly. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-01-28MLK-12262-2 ARM: imx: adjust LPDDR2 frequency scale flow for i.MX7D TO1.1Anson Huang
LPDDR2 frequency scale flow needs to be updated for i.MX7D TO1.1 due to the CKE timing change. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-01-28MLK-12262-1 ARM: imx: enable ddr auto self-refresh for i.MX7DAnson Huang
Enable DDR auto self-refresh for i.MX7D, when doing DDR frequency scale or suspend/resume, DDR self-refresh will be disabled, this is incorrect for saving power, enable it for all these scenarios. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
2016-01-25MLK-11830 ARM: dts: add tcm address info for imx7d 12x12 lpddr3 boardAnson Huang
When M4 is enabled, Linux has to do save/restore for M4 TCM during suspend/resume, dtb should pass the TCM address for kernel, without this TCM info, kernel will boot up fail: ------------[ cut here ]------------ WARNING: CPU: 0 PID: 1 at arch/arm/mach-imx/pm-imx7.c:1030 imx7d_pm_init+0x58/0) Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Not tainted 3.14.52-02791-g1babdb1-dirty #2093 [<80014b40>] (unwind_backtrace) from [<80011798>] (show_stack+0x10/0x14) [<80011798>] (show_stack) from [<807199ec>] (dump_stack+0x7c/0xbc) [<807199ec>] (dump_stack) from [<80032d78>] (warn_slowpath_common+0x6c/0x88) [<80032d78>] (warn_slowpath_common) from [<80032e30>] (warn_slowpath_null+0x1c/) [<80032e30>] (warn_slowpath_null) from [<80a09760>] (imx7d_pm_init+0x58/0x67c) [<80a09760>] (imx7d_pm_init) from [<80a08d3c>] (imx7d_init_machine+0x3c/0xe4) [<80a08d3c>] (imx7d_init_machine) from [<809e52e4>] (customize_machine+0x20/0x4) [<809e52e4>] (customize_machine) from [<800089bc>] (do_one_initcall+0xf8/0x144) [<800089bc>] (do_one_initcall) from [<809e2c4c>] (kernel_init_freeable+0x138/0x) [<809e2c4c>] (kernel_init_freeable) from [<807159b8>] (kernel_init+0x8/0xf0) [<807159b8>] (kernel_init) from [<8000e580>] (ret_from_fork+0x14/0x34) ---[ end trace fdb0885876d7ac0b ]--- Unable to handle kernel NULL pointer dereference at virtual address 00000000 pgd = 80004000 [00000000] *pgd=00000000 Internal error: Oops: 5 [#1] PREEMPT SMP ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper/0 Tainted: G W 3.14.52-02791-g1babdb1-dir3 task: a8084000 ti: a8090000 task.ti: a8090000 PC is at memcpy+0x48/0x330 LR is at imx7d_pm_init+0xd0/0x67c pc : [<8028e768>] lr : [<80a097d8>] psr: 20000013 sp : a8091e8c ip : 00000000 fp : 00000000 r10: a8090030 r9 : 0000010b r8 : 809e52c4 r7 : 80ab9380 r6 : 80ab9380 r5 : 80abb5a4 r4 : 80a411cc r3 : 00080000 r2 : 00007f80 r1 : 00000000 r0 : a8140000 Flags: nzCv IRQs on FIQs on Mode SVC_32 ISA ARM Segment kernel Control: 10c53c7d Table: 8000406a DAC: 00000015 Process swapper/0 (pid: 1, stack limit = 0xa8090238) Signed-off-by: Anson Huang <Anson.Huang@freescale.com> (cherry picked from commit c3dc7c16660200f3de8cbbdd1f215ae6a779a039)
2016-01-21ARM: clk-imx6q: refine sata's parentSébastien Szymanski
According to IMX6D/Q RM, table 18-3, sata clock's parent is ahb, not ipg. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> Reviewed-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org> (cherry picked from commit da946aeaeadcd24ff0cda9984c6fb8ed2bfd462a)
2016-01-20MLK-12305 Enable CAAM in kernel version 4.1 imx_v7_defconfigDan Douglass
Enabled CAAM in imx_v7_defconfig. Signed-off-by: Dan Douglass <dan.douglass@nxp.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-29 16:43:14 +0000