| Age | Commit message (Expand) | Author |
|---|---|---|
| 2019-03-05 | clk: vc5: Abort clock configuration without upstream clock | Marek Vasut |
| 2017-07-17 | clk: vc5: Add support for IDT VersaClock 5P49V5925 | Vladimir Barinov |
| 2017-07-17 | clk: vc5: Add support for IDT VersaClock 5P49V6901 | Marek Vasut |
| 2017-07-17 | clk: vc5: Add support for the input frequency doubler | Marek Vasut |
| 2017-07-17 | clk: vc5: Split clock input mux and predivider | Marek Vasut |
| 2017-07-17 | clk: vc5: Configure the output buffer input mux on prepare | Marek Vasut |
| 2017-07-17 | clk: vc5: Do not warn about disabled output buffer input muxes | Marek Vasut |
| 2017-07-17 | clk: vc5: Fix trivial typo | Marek Vasut |
| 2017-07-17 | clk: vc5: Prevent division by zero on unconfigured outputs | Marek Vasut |
| 2017-04-19 | clk: vc5: Add support for IDT VersaClock 5P49V5935 | Alexey Firago |
| 2017-04-19 | clk: vc5: Add structure to describe particular chip features | Alexey Firago |
| 2017-01-20 | clk: vc5: Add support for IDT VersaClock 5P49V5923 and 5P49V5933 | Marek Vasut |
 |
index : linux-toradex.git | |
| Linux kernel for Apalis, Colibri and Verdin modules | Marcel Ziswiler |
| summaryrefslogtreecommitdiff |