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This patch fixes coverity issue of "divide by 0".
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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Remove the unnecessary mutex and rcu lock from i.MX8MQ & i.MX7ULP
cpufreq driver.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Reviewed-by: Anson Huang <Anson.Huang@nxp.com>
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According to datasheet Rev-D, on B0 part, below CPU
freq needs to be supported:
500MHz for RUN mode;
720MHz for HSRUN mode.
To achieve best accurate frequency for CPU, adjust
SPLL's frequency for SPLL_PFD0 which is CPU's
clock source:
SPLL 528MHz -> SPLL_PFD0 500.2MHz;
SPLL 480MHz -> SPLL_PFD0 720MHz;
Remove CPU RUN/HSRUN mode switch, since it is implemented
as clock mux, whenever clock parent is switched, the
RUN/HSRUN mode will be changed accordingly.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Bai Ping <ping.bai@nxp.com>
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The pm Qos add/remove only need to be called when A7 change mode
between HSRUN and RUN mode.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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According to the i.MX7ULP RM & datasheet, when A7 is in RUN mode,
the max CPU frequency it can run at is 500MHz, if we want to increase
the A7 CPU frequency to 800MHz, we need to change the A7 from RUN mode
to HSRUN mode. And only when A7 is in RUN mode, we can enter STOP mode
and VLLS mode.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
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