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2016-03-14gpu: nvgpu: validate wait notification offsetKonsta Holtta
Make sure that the notification object fits within the supplied buffer. Bug 1739182 Change-Id: Ifb66f848e3758438f37645be6f534f5b60260214 Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1026431 (cherry picked from commit 2484c47f123c717030aa00253446e8756e1a0807) Reviewed-on: http://git-master/r/1030663 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2016-03-14gpu: nvgpu: validate error notifier offsetKonsta Holtta
Make sure that the notifier object fits within the supplied buffer. Bug 1739183 Bug 1739932 Change-Id: I713574ce797ffc23cec10b5114f469dbadc68f1e Signed-off-by: Konsta Holtta <kholtta@nvidia.com> Reviewed-on: http://git-master/r/1026410 (cherry picked from commit f476b93eb19b962b8760457102448bd533efc54d) Reviewed-on: http://git-master/r/1029379 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-09-28gpu: nvgpu: re-order POWERGATE_ENABLE operationsDeepak Nibade
re-order POWERGATE_ENABLE operations in opposite order of POWERGATE_DISABLE Bug 1679372 Change-Id: Ib72a0b80929e2dee2cf88a6d3d0f96d61c02307b Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/796459 (cherry picked from commit 7e2668f924a986d4bd7d1d2c383431a5e80d9968) Reviewed-on: http://git-master/r/801977 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-09-28gpu: nvgpu: enable powergate always while releasing debug sessionDeepak Nibade
Currently, while releasing the debug session we enable powergate only if a channel is bound to session If a session has no channel bound to it, and has powergate disabled, then we do not enable powergate when that session is closed Fix this by calling dbg_set_powergate(POWERGATE_ENABLE) always while releasing the session Refcounting and sanity checks in dbg_set_powergate() will take care of situation if powergate was not disabled by the session in first place Bug 1679372 Change-Id: I4e027393c611d3e8ab4f20e195f31871086da736 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/796999 cherry picked from commit 671dff8cb0605f865c5da32bd889e2a6fcf133fe) Reviewed-on: http://git-master/r/801986 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-07-23arm: tegra: fix debug build issueBibek Basu
Initialize uninitialized variables to get the build through Bug 1640594 Change-Id: Ia0788c5852bb8d68a79004e3f2fa1b3d2b9ca2fe Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/772239 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-06-19Revert "video: tegra: Wait PMU finishes booting"Winnie Hsu
This reverts commit f69b7093accdacfa653b4bd45d78e04a2676dc2a. Bug 200055546 Bug 200114503 Change-Id: I165a3da9f418657d86bf39fbe3db2adc13762c87 Signed-off-by: Winnie Hsu <whsu@nvidia.com> Reviewed-on: http://git-master/r/759875
2015-06-12gpu: nvgpu: Disable channel when updating SMPC WARSandarbh Jain
When updating SMPC WAR for channel, it needs to be kicked out. This ensures that the updated information is re-read from context header. Bug 1579548 Change-Id: Ieadc6b65b057d7f48dc16fbc786c881ab7e5fcd5 Signed-off-by: Sandarbh Jain <sanjain@nvidia.com> Reviewed-on: http://git-master/r/756639 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-06-05gpu: nvgpu: Do not touch gr status maskTerje Bergstrom
GR status disable mask was never set, so driver always disabled all engines from status rollup. Change-Id: I500a127be9253294f73d1f42ce89b886471a9117 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/719141 (cherry picked from commit 34a5ffe7e7dcc4df5f3a11848b828e96c43d2c4d) Reviewed-on: http://git-master/r/752092 GVS: Gerrit_Virtual_Submit
2015-06-04gpu: nvgpu: gk20a: dma_alloc only if neededBibek Basu
if vpr memory is carved out, then only call dma_alloc for secure memory. Bug 200057068 Change-Id: I12557cfaa48f7db729ccab17d3151916d35ce0f1 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/746153 GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2015-05-11vga: Make absence of device message as debug printPankaj Dabade
This patch converts message of absence of vga device as a debug print. This message comes when client tries to access device on PCI which is absent, in this case DSI. Bug 1481761 Change-Id: I7d83d39735e51bca8c789a86e517c0a040de57e8 Signed-off-by: Pankaj Dabade <pdabade@nvidia.com> Reviewed-on: http://git-master/r/739571 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-02-17gk20a: Moved bind fecs to init_gr_supportMahantesh Kumbar
-Moved bind fecs from work queue to init_gr_support. -It makes all CPU->FECS communication to happen before booting PMU, and after we boot PMU, only PMU talks to FECS. So it removes possibility to race between CPU and PMU talking to FECS. Bug 200032923 Bug 1570774 Change-Id: I01d6d7f61f5e3c0e788d9d77fcabe5a91fe86c84 Reviewed-on: http://git-master/r/559733 Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> (cherry picked from commit 1e63d8ae4056dbde82e1788decf7552f0b0af640) Reviewed-on: http://git-master/r/666712 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-02-17gpu: nvgpu: send ELPG init cmd after GR is readyVijayakumar
bug 200040021 bug 200032923 bug 1570774 Change-Id: Ic162902bd2f05abab9ebd37392ed56dc4c164ba8 Reviewed-on: http://git-master/r/539995 Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> (cherry picked from commit 62e9ba6c8fbabcb77e0ec6267463f51ae319a0b3) Reviewed-on: http://git-master/r/666721 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-02-17gu: nvgpu: Add PMU state ELPG bootingTerje Bergstrom
Add PMU state ELPG booting. Prevent ISR processing when PMU is in OFF state. Bug 200006956 Change-Id: Ibcf69a2d81965cc87f520bf864c4425681f04531 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/424769 (cherry picked from commit f9ce5a2cdf667f8e41f7ed4035678cc1198dc308) Reviewed-on: http://git-master/r/657487 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2015-01-19video: tegra: host: gk20a: invalidate TLB after PDE updateDeepak Nibade
Invalidate TLB after PDE udpate and before freeing the Page Table memory Stale TLBs during unmap can lead us to access invalid PTEs Bug 1577947 Change-Id: I46c6a7a9079570a8e2af8bb2a6687cfeec83a6f7 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/670324 (cherry-picked from commit e4cbdae09949d23ac338209924d35584c5d8d288) Reviewed-on: http://git-master/r/671197 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
2015-01-19video: tegra: host: gk20a: fix PDE update sequenceDeepak Nibade
Current sequence : - delete page tables memory - update PDE entry and mark above page tables invalid With this sequence, it is possible to have valid PDE entries with already freed page table and this could lead us to invalid memory accesses. Fix this by switching the sequence as follows : - update PDE entry and mark page tables invalid - delete page tables memory Bug 1577947 Change-Id: Icc3a8c74bbf1bf59e41e0322cfc279d15690aa9d Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/670323 (cherry-picked from commit 56f738b4c4ee188ec1f69b91615cd9728ff18cf0) Reviewed-on: http://git-master/r/671196 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
2015-01-14gpu: nvgpu: Allow suppressing WFI on submitTerje Bergstrom
Allow suppressing WFI when submitting work and requesting a fence back. Bug 1491545 Change-Id: Ic3d061bb4f116cf7ea68dbd6a1b2ace9f11d0ab5 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/390457 Reviewed-on: http://git-master/r/671029 GVS: Gerrit_Virtual_Submit Reviewed-by: Sibashis Mohapatra <sibashism@nvidia.com> Tested-by: Sibashis Mohapatra <sibashism@nvidia.com> Reviewed-by: Yogesh Kini <ykini@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-01-08gpu: nvgpu: reduce message severity to infoNaveen Kumar S
Shader informs user about context switch wait time. This doesn't affect any functionality. Hence changing print to info. bug 200015967 Change-Id: I7fbb562e43ee6ec1bc8ac01a51d3c9f19d5cb4cf Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/662657 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Matthew Pedro <mapedro@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2015-01-06gpu: nvgpu: implement mapping for sparse allocationKirill Artamonov
Implement support for partial buffer mappings. Whitelist gr_pri_bes_crop_hww_esr accessed by fec during sparse texture initialization. bug 1456562 bug 1369014 bug 1361532 Change-Id: Ib0d1ec6438257ac14b40c8466b37856b67e7e34d Signed-off-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-on: http://git-master/r/375012 (cherry picked from commit a24470f69961508412402b9b06d5b71fbf6f7549) Reviewed-on: http://git-master/r/601754 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-01-06video: tegra: Wait PMU finishes bootingsujeet baranwal
GPU PMU booting is in a separate thread(workqueue) and currently there is a race condition that PMU booting doesn't finish when "nvhost_gk20a_finalize_power_on" is returning. If the GPU starts to runtime powergate(nvhost_gk20a_prepare_poweroff) at that time, we left a unfinished PMU booting workqueue task there. So next time when this task starts running, GPU will be put into a bad state which causes lots of GPU errors. This patch adds a wait at the end of "nvhost_gk20a_finalize_power_on" , so that the race condition can be avoided. Bug 200055546 Change-Id: I4f2d0798fcadb4effc555a66f3c3e3061b18d246 Signed-off-by: Mark Zhang <markz@nvidia.com> Signed-off-by: sujeet baranwal <sbaranwal@nvidia.com> Reviewed-on: http://git-master/r/494065 (cherry picked from commit 3b9866a952ba0a1dea05d20bf32b6bcc9113f38b) Reviewed-on: http://git-master/r/655952 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-01-06gpu: nvgpu: Add boost once GPU is initializedTerje Bergstrom
Workaround for GPU hang if boost turns GPU on before it is initialized. Bug 1435870 Change-Id: I07d0617049612344ca7c494da8cb8d75789984e5 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/453375 (cherry picked from commit 260cf3d3fab941126eebf4bc977cb408587492eb) Reviewed-on: http://git-master/r/655951 Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2015-01-06gpu: nvgpu: Initialize ELPG ref-count early.Neil Gabriel
gk20a_pmu_disable_elpg can be called before the PMU driver has received and processed the INIT message from the PMU. If change ensures that the ELPG ref-count has been initialized to zero before that can happen. Bug 200016313 Bug 200055546 Change-Id: Ic80ec1ee69b1eb0499effb1abf556f78cb041f5e Signed-off-by: Neil Gabriel <ngabriel@nvidia.com> Reviewed-on: http://git-master/r/431927 Reviewed-on: http://git-master/r/436302 (cherry picked from commit dad127648262a76180259525ac660ffa8307f69b) Reviewed-on: http://git-master/r/655950 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-12-17gpu: nvgpu: update regops whitelistMatt Craighead
Remove an undesired register from the regops whitelist. Bug 1589712 Change-Id: I76e8ff1f4b68d6d5ce2c11adc08d984df7883e5e Signed-off-by: Matt Craighead <mcraighead@nvidia.com> Reviewed-on: http://git-master/r/663371 (cherry picked from commit 573a71d052ac18d34b5f4e984f8684cedea0396d) Reviewed-on: http://git-master/r/663998 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Eric Brower <ebrower@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-11-03gpu:nvgpu: update aelpg parameterMahantesh Kumbar
Updated aelpg parameter APCTRL_CYCLES_PER_SAMPLE_MAX_DEFAULT default value to 200 Bug 1536384 Bug 200043556 Change-Id: I090e50d0025f16c006429455d161bee26fc64173 Signed-off-by: Mahantesh Kumbar <mkumbar@nvidia.com> Reviewed-on: http://git-master/r/455440 (cherry picked from commit 4442b73ba0a9fb9d9d6c9c19b319146365ebfa96) Reviewed-on: http://git-master/r/553687 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-10-17gpu: nvgpu: gk20a: check ctx valid bitMayank Kaushik
When determining the chid for the current context, first check the ctx valid bit. Bug 1485555 Change-Id: I6c3096d800a6cef38b656d525437a2c4f8b45774 Signed-off-by: Mayank Kaushik <mkaushik@nvidia.com> Reviewed-on: http://git-master/r/496140 (cherry picked from commit 20a7a9635e9f969782da6695d99bc99c4ed8fa32) Reviewed-on: http://git-master/r/555054 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-26gpu: nvgpu: Increase PBDMA timeoutTerje Bergstrom
PBDMA timeout can cause stale data in FIFO. Default value equals 1ms. Increase it to max. Bug 1537636 Change-Id: I1c6c6b10abaece3a64b77b9b3ef77ff726ff67cf Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/457047 (cherry picked from commit f516652f567a44e2e1c6313dccd3dc80172a980f) Reviewed-on: http://git-master/r/457067 (cherry picked from commit f5219cf5888502de3f6cabb2db3e8968b6d20b7c) Reviewed-on: http://git-master/r/504534 Reviewed-by: Automatic_Commit_Validation_User
2014-09-24video: tegra: host: gk20a: reduce gr delaysPrashant Malani
The delay value used in gr usleep_range calls is too high. We can start at a much lower value. Bug 200032452 Change-Id: I7d196d0e3be0a5cd84e8c4dad537fae043da6274 Signed-off-by: Prashant Malani <pmalani@nvidia.com> Reviewed-on: http://git-master/r/335234 (cherry picked from commit 49bb8436a534496c70e6238d3bc20ed280d5b654) Reviewed-on: http://git-master/r/504632 Reviewed-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Tested-by: Rajkumar Kasirajan <rkasirajan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-09-19edp: sysedp : CPU/GPU priority depends on fGPUMatt Longnecker
Provide sysedp_dynamic_capping with the instantaneous GPU frequency when notifying it of the GPU load. Modify the gpu/cpu priority decision logic to choose CPU priority until GPU frequency gets "near" the CPU-priority-limited-GPU-fmax. Introduce the priority_bias debugfs parameter to facilitate tuning of "near". priority_bias takes a value from 0 to 100. Change-Id: I57df17d50cd8077a512b5932f4a304ca5e6992aa Signed-off-by: Matt Longnecker <mlongnecker@nvidia.com> Reviewed-on: http://git-master/r/481720 (cherry picked from commit b2ac745a45e273e849d7b190913ee97092fdebc2) Reviewed-on: http://git-master/r/498901 GVS: Gerrit_Virtual_Submit Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-08-21gpu: nvgpu: Never use KEPLER_C sync point incrementTerje Bergstrom
Bug 1497928 Change-Id: Ic3a2923ae73792e87145b6211e45e5ace3651ddc Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/482492 GVS: Gerrit_Virtual_Submit Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Tested-by: Prabhu Kuttiyam <pkuttiyam@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2014-08-04gpu: nvgpu: fix error handling for mutex_acquire()Deepak Nibade
Currently if pmu_mutex_acquire() fails, we disable ELPG and move ahead. But it is not clear why it is required to disable ELPG in case where we fail to acquire mutex. Hence skip disabling ELPG if mutex_acquire() fails Bug 1533644 Change-Id: I7e8e99a701d0ba071eb31ac17582b04072ee55eb Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/448131 (cherry picked from commit 789c256dd74e2b2b0481e25b2af1b2202ea6f582) Reviewed-on: http://git-master/r/450268 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-23gpu: nvgpu: return error from mutex_acquire() if pmu not initializedDeepak Nibade
In pmu_mutex_acquire(), we return zero (success) if pmu->initialized is not set Since mutex_acquire() was successful, we then call pmu_mutex_release() If now pmu->initialized is set in some other thread then we proceed to validate the mutex owner and end up causing below warning : pmu_mutex_release: requester 0x00000000 NOT match owner 0x00000008 Hence to fix this return error from mutex_acquire() and mutex_release() if pmu->initialized is not yet set and in that case we proceed to call elpg enable/disable Bug 1533644 Bug 200017082 Change-Id: Ifbb9e6a8e13f6478a13e3f9d98ced11792cc881f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Signed-off-by: Naveen Kumar S <nkumars@nvidia.com> Reviewed-on: http://git-master/r/439333 (cherry picked from commit 50497d4031103df1067f14ce4c1e14b15713efb9) Reviewed-on: http://git-master/r/440747 GVS: Gerrit_Virtual_Submit Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-07Revert "gpu: nvgpu: Dump offending push buffer fragment"Arto Merilainen
Channel and gpfifo allocations are entirely separated from each other, however, the code here assumes that active channel means that the channel also has a gpfifo. This reverts commit a24602f094380539788696d1b1567a4f4d914b17 which added gpfifo dump. Changing debug dumping to be safe requires refactoring the channel release code to use proper locking. Bug 200017498 Bug 1530226 Change-Id: I2fb02542a17dd56a0a9ce732b327e34b85ade8b9 Signed-off-by: Arto Merilainen <amerilainen@nvidia.com> (cherry picked from commit 3d37815d7660affeb9a4f23b0d17f870ed12dd33) Reviewed-on: http://git-master/r/434053 Reviewed-by: Emad Mir <emir@nvidia.com> Tested-by: Emad Mir <emir@nvidia.com>
2014-07-07gpu: nvgpu: increase delays in do_idle()Deepak Nibade
Increase the wait delays in do_idle() to 2000 mS and make use of msleep instead of mdelays Also, to check if GPU is rail gated or not, add a do-while() loop which will keep checking the status and bail out as soon as GPU is rail gated This increase in delays is required to allow GPU sufficient time to complete its work and get rail gated These delays are specially needed during stress testing where it is possible that a large amount of GPU work is blocked during do_idle() and then it might take more time to complete it while next do_idle() is waiting for it Also, remove waiting on API gk20a_wait_channel_idle() for each channels since it is sufficient to wait for refcount to be 1 bug 1529160 Change-Id: Ie541485fbdda76d79ae4a75dda928da240fc5d8f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/434192 GVS: Gerrit_Virtual_Submit Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2014-07-07gpu: nvgpu: remove redundant busy()/idle() callsDeepak Nibade
gk20a_busy() call in channel_syncpt_incr() and corresponding gk20a_idle() call in channel_update() are redundant since they are already encapsulated inside another pair of busy/idle calls This busy/idle pair will be called only from submit_gpfifo() and submit_gpfifo() already has its own busy/idle which it preserves for whole path and hence this redundant pair can be removed Also, this prevents a dead lock scenario while do_idle() is in progress as follows : - in submit_gpfifo() we call first gk20a_busy() which acquires busy read semaphore - in do_idle() we acquire busy write semaphore and wait for current jobs to finish - now submit_gpfifo() encounters second gk20a_busy() and requests busy read semaphore again - this results in dead lock where do_idle() is waiting for submit_gpfifo() to complete and submit_gpfifo() is waiting for busy lock held by do_idle() and hence it cannot complete bug 1529160 Change-Id: I96e4368352f693e93524f0f61689b4447e5331ea Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/434191 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2014-07-07gpu: nvgpu: fix race between do_idle() and unrailgate()Deepak Nibade
While we are executing do_idle() API, it is possible that unrailgate() gets invoked in midst of idling the GPU and this can result in failure of do_idle() To prevent simultaneous execution of these methods, add a mutex railgate_lock and acquire it during do_idle() and unrailgate() APIs Also, keep this lock held if do_idle() is successful. In success, lock will be released in do_unidle(), otherwise release this lock before returning Note that this lock should not be held in railgate() API since we do not want it to be blocked during do_idle() bug 1529160 Change-Id: I87114b5367eaa217376455a2699c0d21c451c889 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/434190 GVS: Gerrit_Virtual_Submit Reviewed-by: Arto Merilainen <amerilainen@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2014-06-30gpu: nvgpu: Wait for idle via FIFO registersTerje Bergstrom
Wait for engine idle via FIFO's engine status instead of submitting WFI to channel. Submitting WFI and waiting is not robust, and wait might invoke debug dump which cannot be done while powering down. Bug 1499214 Change-Id: I4d52e8558e1a862ad4292036594d81ebfbd5f36b Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/432151 (cherry picked from commit 3719dff8287f5402eea81acb19ae21f028b1b968) Reviewed-on: http://git-master/r/432154 Reviewed-by: Emad Mir <emir@nvidia.com> Tested-by: Emad Mir <emir@nvidia.com>
2014-06-30gpu:nvgpu:fix powergate disabling orderVijayakumar
ELPG has to disabled before we write to clock gating registers If ELPG is engaged during clock gating register write it will cause error in ELPG engine Bug 200013495 Bug 200014542 Change-Id: I57d1c59fc9311686829d898faddc90149df4cb46 Signed-off-by: Vijayakumar <vsubbu@nvidia.com> Reviewed-on: http://git-master/r/432127 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit Reviewed-by: Mitch Luban <mluban@nvidia.com>
2014-06-26gpu: nvgpu: Clear channel class on openTerje Bergstrom
Channel class needs to be cleared when a channel is opened. Otherwise previously used channel remains, and we can accidentally use KEPLER_C methods even if KEPLER_C is not allocated. Bug 1487928 Bug 200000669 Change-Id: I3e1ae8d5edbdd82fa569b38a89a89dedb69ee773 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/428868 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
2014-06-26gpu: nvgpu: fix possible PMU isr raceDeepak Nibade
Possible race description : - while PMU is booting, it sends messages to kernel which we process in gk20a_pmu_isr() - but when messages are processed it is possible that we are on the way to rail gate the GPU and we have already called pmu_destroy() - this could lead to hangs if while processing messages, GR is already off To fix this, introduce another mutex isr_enable_lock and a flag to turn on/off ISRs - when we enable PMU, get the lock and set the flag - in pmu_destroy(), get the lock and remove the flag - in pmu_isr(), take the lock, check if flag is set or not. If flag is not set return, otherwise proceed with the messages Bug 200014542 Bug 200014887 Change-Id: I0204d8a00e4563859eebc807d4ac7d26161316ea Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/428371 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Vijayakumar Subbu <vsubbu@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2014-06-26gpu: nvgpu: do not abort probe if secure page alloc failsDeepak Nibade
Do not abort GPU probe if secure page alloc fails. We can just note that this allocation failed (using bool secure_alloc_ready) and prevent further secure memory allocation if this flag is not set. Bug 1525465 Change-Id: Ie4eb6393951690174013d2de3db507876d7b657f Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/427730 (cherry picked from commit e7e47bb45d5ff5dcb48d8a961e9908b71db9e02f) Reviewed-on: http://git-master/r/428306 GVS: Gerrit_Virtual_Submit Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2014-06-18gpu: nvgpu: do not idle timed out channelsDeepak Nibade
While suspending the device, do not submit WFI on timed out channels Submitting WFI on timed out channels will cuase submit_wfi() to return error and as result of this, rail gating of device will be prevented Bug 200010416 Change-Id: Ic097bfdae59dbf9e1f2aea5d8d0431b5f1c3721b Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/422743 (cherry picked from commit 9ac601c0035240f6bacc3c42c5cc9e7b85a65456) Reviewed-on: http://git-master/r/424542 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-06-18gpu: nvgpu: bail out from poweroff if channel suspend failsDeepak Nibade
During gk20a_pm_prepare_poweroff(), if call to gk20a_channel_suspend() fails, we proceed to disable other components and then return error. But when genpd sees the error, it will abort the suspend sequence and keep the device state as active. But since we have already disabled all the components, GPU lands in invalid state. Hence, if channel_suspend() fails then do not proceed but return the error immediately Bug 200010416 Change-Id: I553a2a25832a1be4941bb6b6ce490c950cdbe7fa Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/422248 (cherry picked from commit 7352415a206b6bec41c762085e49efec5036dec9) Reviewed-on: http://git-master/r/424541 GVS: Gerrit_Virtual_Submit Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2014-06-18gpu: nvgpu: Remove extraneous FB flush callsTerje Bergstrom
gk20a_mm_fb_flush() invoked G_ELPG_FLUSH and FB_FLUSH. Remove the invokation of G_ELPG_FLUSH. Replace calls to gk20a_mm_fb_flush() with gk20a_mm_l2_flush() when appropriate. Bug 1421824 Change-Id: I02af4bdc3b7bd26d0f6a8d610f70349269775a36 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/408210 (cherry picked from commit f02f34a8d214d883c949ab55fe872d4176a21bc5) Reviewed-on: http://git-master/r/423230 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-06-18gpu: nvgpu: When rail gating, flush only onceTerje Bergstrom
When rail gating invoke G_ELPG_FLUSH only once. Bug 1421824 Change-Id: Ibde0e32b212e3b030e69a9cb837c87789887aabb Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/408209 (cherry picked from commit 7c8c12eef2e4ce132b5cec239dc59b24888f4c9c) Reviewed-on: http://git-master/r/412482 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-06-18gpu: nvgpu: Prune redundant cache maintenanceTerje Bergstrom
Remove redundant cache maintenance operations. Instance blocks and graphics context buffers are uncached, so they do not need any cache maintenance. Bug 1421824 Change-Id: Ie0be67bf0be493d9ec9e6f8226f2f9359cba9f54 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/406948 (cherry picked from commit 179d6ff3b2845e99d1719a9ba10862f2d3b22080) Reviewed-on: http://git-master/r/423229 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-06-16gpu: nvgpu: Dump offending push buffer fragmentTerje Bergstrom
When outputting debug dump, print the contents of current push buffer segment. Also changes the debug dump to use pr_cont when applicable, and dumps state before recovering in case channel was not loaded to an engine. Bug 1498688 Change-Id: I5ca12f64bae8f12333d82350278c700645d5007e Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/422208 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-06-16gpu: nvgpu: Turn on scaling when poweredAllen Yu
This patch reorders scaling resume to happen always when we power on the GPU, so as to balance the scaling suspend when we power off GPU. bug 200010911 Change-Id: I9fde817fbf9fed7d90c48ea06050db4b82e670a8 Signed-off-by: Allen Yu <alleny@nvidia.com> Reviewed-on: http://git-master/r/421543 Reviewed-by: Mandar Padmawar <mpadmawar@nvidia.com> Tested-by: Mandar Padmawar <mpadmawar@nvidia.com>
2014-06-13gpu: nvgpu: flush write before unlockingSang-Hun Lee
- gk20a_enable is reading the clock after unlocking the spinlock to flush any previous write - This could lead to a race if any write afterwards assume the write has been completed already - Read the clock before unlocking to ensure all previous writes have been completed before letting any other thread use gk20a Bug 200007520 Change-Id: I737fbbe825c68b25ca256c4a8ee2b99aa8baf0f5 Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-on: http://git-master/r/418485 (cherry picked from commit 2aed542a719caa69620766bf2dceefe50626c189) Reviewed-on: http://git-master/r/422773 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-06-12gpu: nvgpu: remove unused vpr refetch functionsDeepak Nibade
VPR resize is done by forcing GPU to idle and then updating VPR size from TLK. There is no need now to call vpr_resize funtion from kernel and hence these functions can be removed. Bug 1487804 Change-Id: I758a6e0a99a58757866f1138b0a89594e2a33908 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/421703 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
2014-06-12gpu: nvgpu: allocate secure buffer in probeDeepak Nibade
Allocate dummy secure buffer of size PAGE_SIZE during gk20a_probe(). This will also help to initiate first secure memory (VPR) resize call while GPU is rail gated and in reset. This dummy buffer is released after we allocate some more secure memory buffers in alloc_global_ctx_buffers() Bug 1487804 Change-Id: I61604d9e5ffb585801ee893435c98a0d3e69d666 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/421701 Reviewed-by: Riham Haidar <rhaidar@nvidia.com> Tested-by: Riham Haidar <rhaidar@nvidia.com>
2014-06-12gpu: nvgpu: add APIs to allocate/free dummy secure bufferDeepak Nibade
Add APIs to allocate and free dummy secure buffer of size PAGE_SIZE. Also, fix small errors during secure memory alloc/free. Bug 1487804 Change-Id: If078116fb973e81bfcee054b900c09a313e389c6 Signed-off-by: Deepak Nibade <dnibade@nvidia.com> Reviewed-on: http://git-master/r/421700 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> GVS: Gerrit_Virtual_Submit
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-13 09:08:44 +0000