Age | Commit message (Collapse) | Author |
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Add stub runtime_pm calls which go through the flow of enabling and
disabling but don't actually do anything with the device itself as
there's nothing useful we can do. This provides the core PM framework
with information about when the device is idle, enabling chip wide
power savings.
The change is based on change done by Mark Brown for s3c2410 i2c bus
driver.
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Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
i2c-s3c2410: Add stub runtime power management
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Change-Id: Icb92129c4f79a1642b2b73d14578b05928d745a8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/128151
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Rename fast clock to "fast-clk" and div clock to
"div-clk" in driver and clock table to have aligned
with mainline as:
This is based on change:
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commit f16e6e77a105ec53496f0d8343895da342917873
Author: Laxman Dewangan <ldewangan@nvidia.com>
i2c: tegra: pass proper name for getting clock
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Change-Id: Ie9a1972a18e2e60ac7c84c4509860cf72405ef16
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/128150
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The Tegra i2c controller actually can not support the reverse of
direction address (toggling r/w bit of address) as controller
take 7 bit address from configuration and HW make it 8 bit address
based on read/write flag.
Hence reverting this protocol mangling support.
Change-Id: I987b2be343d535c078e27b44575717a209d15584
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/128149
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NACK interrupt is generated before I2C controller generates the STOP
condition on bus. Because of this reset of controller is happening
before I2C controller could complete STOP condition. So wait for some
time before resetting the controller so that STOP condition has
delivered properly on bus.
Added delay of 2 clock period before resetting the controller in case of
NACK error.
Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Taken change from mainline commit.
Change-Id: Id089aae313614e58ec6da36eda4ff2d87c5cddc3
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/125148
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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The CONFIG_PM doesn't actually enable any of the PM callbacks, it
only allows to enable CONFIG_PM_SLEEP and CONFIG_PM_RUNTIME.
This means if CONFIG_PM is used to protect system sleep callbacks
then it may end up unreferenced if only runtime PM is enabled.
Hence protecting sleep callbacks with CONFIG_PM_SLEEP.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Change-Id: I090e167c1de8f254a278e9e3b511292cfbc5f250
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/124872
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Describe the fast and div clock part of structure and prints
better error message when any failure occurs in enabling clocks.
Change-Id: I72f66b5f8cbefbe8b2c6b8c7150edff3ee2244b4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/124873
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Declare the iomap address to __iomem type.
Change-Id: Ic855834f6e7fd417e4c2fd0415a6195655d3ed60
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/124874
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Tegra20 i2c controller does not support the continue transfer
which implements the I2C_M_NOSTART functionality of i2c
protocol mangling.
Removing the I2C_M_NOSTART functionality support for Tegra20.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Wolfram Sang <w.sang@pengutronix.de>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Cherry-picked from mainline
72dedc2fb12ff31cc2da977d0c40c3ac58f554cf
Change-Id: I461342749a834ff2eae056f1c6616a8d7693a32c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/124875
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Do the clock control for enable/disable during each transfer
regardless of whether clock is always on or not.
If clock is always on then in probe the reference count of the
clock incremented and doing again enable will just increment
reference and disable will decrement the reference count
and so there is no harm on calling enable/disable always
during transfer.
Change-Id: Ibf67413fb84f826f04e890fe3dd2a20cd0469922
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116473
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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Remove unused member variable "iomem" of the
i2c device structure.
This variable becomes unused when converted all allocation
to devm_* in following change:
i2c: tegra: make all resource allocation through devm_*
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
57c0dc3e69439a2ddf239226c318d676da773492
Change-Id: I8a3db21524a20ee4cbd1b87dff82bac80a2763de
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116472
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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The slave configuration is required for non-dvc i2c.
This can be done by checking the i2c type "is_dvc"
in place of having another variable.
Change-Id: Ia80ba0f7a68e2dfaa13b5da94896b87f2877e047
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116471
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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This reverts commit 021d8866c80fab07cb4cd2753ed67d0c1b49c174.
The reason for revert the change:
The readback is done at the time of i2c_writel() and hence
it is not require to have this in scattered manner.
This is towards the aligning driver with mainline.
Change-Id: I74184683301d7a3c26550d97fb1ce3596273a0bb
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116470
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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The Tegra PPSB (an peripheral bus) queues writes transactions.
In order to guarantee that writes have completed before a
certain time, a read transaction to a register on the same
bus must be executed.
This is necessary in situations such as when clearing an
interrupt status or enable, so that when returning from an
interrupt handler, the HW has already de-asserted its
interrupt status output, which will avoid spurious interrupts.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
ec7aaca2f64f509f45d463d784b41d0b3d2be083
Change-Id: I4f064c38993031303bfeef794015efd5517561cc
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116469
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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Use the devm_* for the memory region allocation, interrupt request,
clock handler request.
By doing this, it does not require to explicitly free it and hence
saving some code.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
9cbb6b2b92d0fdade0fe00cc00e3658b44c86676
Change-Id: I0bc86dbd2bd4e460c75f6d425131f9e27bdace71
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116468
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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It was originally missed in the __devinit/__devexit annotations.
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Cherry-picked from mainline
218d06d79468ca2e6abf3679eea12d7d93d251ef
Change-Id: I66db3d8b54ad6635819e5bda677bc789f9f90588
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116467
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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This fixes some section mismatch build warnings.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This is based on mainline
92891da11a3f913b50a685c3facff6a5891a45ba
Change-Id: I40547607818dbc42e5a428bfd98edcf472a7e35e
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116466
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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To align the downstream to mainline, renaming the
variable/macro of dev_pm_ops as per mainline.
The original change on mainline is:
commit 6a7b3c3c465cef29d92dfc3fbbff0d958aa8be04
Author: Rafael J. Wysocki <rjw@sisk.pl>
i2c-tegra: Use struct dev_pm_ops for power management
Change-Id: Ica427ee339390a76ac8004bef96b4c12ef4ecae4
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116465
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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In place of defining match_table for non-DT based as NULL,
use of_match_ptr() for initialzing the of_match_table.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Cherry-picked from mainline
02d8bf8dc6b09cb810599c64d47da3bdf4f85882
Fixed conflicts.
Change-Id: I71994c49813396ad6b3dfa3fd616d9585203adba
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/116464
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
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on tegra3, the i2c communication start immediately
after writing the tx fifo. And hence there is possibility
to complete the transfer and generates done interrupt before
actually sw updates their local pointers/count.
This patch will make sure that pointers/count can
get updated before data written into the fifo.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/89510
(cherry picked from commit 999c09f0ed32f271e767a319dd094947e63fdb8c)
Change-Id: I8e974b83b5306ec3363d4ca31ce1b539a498ca08
Signed-off-by: Johnny Qiu <joqiu@nvidia.com>
Reviewed-on: http://git-master/r/99997
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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writes to modules on APB bus may complete out-of-order. need
to guarantee that the write is completed by reading it back.
read I2C_INT_STATUS back right after writing the current int status
in the isr to make sure the clear operation of I2C_INT_STATUS is
done before the interrupt is re-enabled.
the same also done for DVC_STATUS.
bug 980763
Change-Id: I34f18804d530ccadf561fe1736552b6a4dd6e4ce
Signed-off-by: Ken Chang <kenc@nvidia.com>
Reviewed-on: http://git-master/r/101925
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Adding support for protocol mangling I2C_M_NOSTART.
Change-Id: I6cc0c96b3c374d452ea886a0f983dc5d31c4575c
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92573
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Add support for protocol mangling "I2C_M_REV_DIR_ADDR"
Change-Id: Icdef16885f1cf6ed1ce9c4003a94c2c2e917ced2
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92572
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Because of race condition between isr and tx fifo fill,
duplicate data is being written. So added locking to make
Tx fifo fill as atomic.
Change-Id: Ia99466adadfb6d86a6f238ec4cd0aa13bd36e434
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/90870
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Dvc I2C_DONE_INTR_EN interrupt bit is always enable into dvc
control register3. During normal transaction on dvc i2c bus
sometimes one transaction written two times in TX fifo buffer
because of triggered dvc interrupt. This is causing to corrupt
the next transaction header and send wrong address over dvc
i2c bus. To solve this issue dvc i2c interrupt has to disable
during filling of Tx fifo and enable after that.
Updated the following things in code:
(1) Add the code to mask/unmask I2C_DONE_INTR_EN into dvc control reg3
writing into Tx Fifo register.
(2) Put delay before resetting the controller
Hand-picked this change from: http://git-master/r/#change,39997
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Change-Id: I16b5821e1d0d0cf8419ce9d239e794de9d5b47be
Reviewed-on: http://git-master/r/89456
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The slave address of device to be configured in packet
header as follows:
7 bit address: PacketHeader3[7:1]
10 bit address: PacketHeader3[9:0]
Fixing the code to make packet header3 properly.
Change-Id: I1797066d23ada5d4d7b14710201a1fb17566b78b
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/92556
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Andy Carman <acarman@nvidia.com>
Reviewed-by: Stephen Warren <swarren@nvidia.com>
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Removed unnecessary synchronization between init and isr
because clock driver is making sure that any operations
will be completed before disabling the driver clock.
Change-Id: I545e48be73697e023fedb8c663402c15e2a472df
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Reviewed-on: http://git-master/r/91779
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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I2c controller requires the clock for fast clock as a second clock
source. This clock should be on during normal function of i2c controller.
Making sure that i2c driver get this clock and hold the clock enable
during data transfer.
bug 933653
Change-Id: I676eee1f8a0e1dff81b17259abcd9644bcb0b394
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/78996
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
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Adding the connection name of clock as "i2c-div" when i2c driver
calls clk_get_sys() for getting clock data pointers.
Change-Id: I3e7fa79ce6d51be189f1d93cb54af0d1b3425de8
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/84694
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
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Bug 915417
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Reviewed-on: http://git-master/r/74134
(cherry picked from commit 37018b3493d2d3006e38eb7a2f81cf47b111e5ea)
Change-Id: I1f8bda8be92f3861fabc51c362e677497e1cb44f
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/79993
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Added i2c high speed support.
Bug 873879
Reviewed-on: http://git-master/r/71997
Change-Id: I5a2c5f272485e6f7c8bb6c11d7c3b6850fdcd768
Signed-off-by: Alok Chauhan <alokc@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77741
Reviewed-by: Automatic_Commit_Validation_User
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Before making a transfer, is_suspended is checked to make sure the
device is alive. However this check is done without holding the lock
that the suspend and resume functions hold to change the suspend state,
creating the possibility of a race condition.
Bug 916336
Reviewed-on: http://git-master/r/70488
Change-Id: I7b4e52f686b0b372f3fc8ba7c7a4e4fdcdb6ba10
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/77740
Reviewed-by: Automatic_Commit_Validation_User
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put busses array as last struct member to avoid overwritting
arb_recovery function pointer.
Bug:889581
Reviewed-on: http://git-master/r/58347
(cherry picked from commit 223b2794fb0d3e94ccfb28549b74941a492415dd)
Change-Id: I4e8792a0cb42255724c8e45baea4f273181a8e2f
Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/58942
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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This reverts commit fc56d07f59a3cafa33c31bf90a50af04a0235cf8.
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Convert tegra i2c driver to use PM runtime framework.
changes since last version:
fix hang when using resume_noirq
Change-Id: I1cce314ef4c06dbc7f1b3ddbdd1ad50255aa8b02
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Reviewed-on: http://git-master/r/71192
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Rebase-Id: Rbc628711479b187a90437bea94776066c7a58b54
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Updated arbitration lost recovery to accumulate i2c multiplexing.
bug 854305
Original-Change-Id: I3f669c507980df78fa443c84b304d337bbe6a6da
Reviewed-on: http://git-master/r/46630
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R987d84dcf51a3d8e366f2e4b2d0d278304e2db76
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Added the arbitration lost error recovery code into
i2c driver.
bug 854305
Original-Change-Id: Ib855f3541d139c01ea34fd9070feef7969eed395
Reviewed-on: http://git-master/r/43201
Reviewed-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Tested-by: Bandi Krishna Chaitanya <bandik@nvidia.com>
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Rebase-Id: R7cda6214579416b3b0a4eafe412a18293260e669
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This reverts commit 738c1a66079ee7db8e4365aa85819ccdef2592a8.
This fixed the video recording system hang bug
Bug 842901
Reviewed-on: http://git-master/r/39912
Rebase-Id: R183a5a9202ec65099503ddad913a25b139bd6d91
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Remove the handling of synchronisation between isr and caller.
This change has become obsolete because now clock driver will make
sure that any write operations will be completed before disabling the
driver clock.
Original-Change-Id: I95957351fd1f291a59182fddbb619ffd02a0db63
Reviewed-on: http://git-master/r/33099
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Rebase-Id: Rec9671e9283870630fda6ceb977b99b92c3a99a9
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Following are the changes:
- Added a mechanism to handle synchronization between caller thread
and isr so that isr should not get called when clock is disable or
controller is in reset state.
- Handling tx fifo overflow error.
- Added delay before resetting the controller which is required if
there is any error in previous transaction so proper stop signal
will be generated.
Original-Change-Id: I7ac121e056193cd4601f032cdabab59e7e0946ea
Reviewed-on: http://git-master/r/30457
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Danielle Sun <dsun@nvidia.com>
Tested-by: Danielle Sun <dsun@nvidia.com>
Reviewed-by: Bo Yan <byan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Rebase-Id: R0e7b428de2b0b1567a23bcac3c53aa5cc9d8d4a9
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Added some more debug message to print during i2c transfer
failure to get more information from log.
This help to understand/analyse the issue quickly.
Original-Change-Id: Ie957b9f2ad737da210722f2ea6f18da9a7b76813
Reviewed-on: http://git-master/r/30011
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Rebase-Id: Rc40314cf7d257db51d98fba2dc94c8398fb2b8a9
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The clock table have two different entry for a given i2c controller.
The second entry is not required and hence removing from table.
Also removing the reference of this entry from driver.
Original-Change-Id: Iab5f79bf5d1fea9363ef524258fb3ec262547691
Reviewed-on: http://git-master/r/29629
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Daniel Willemsen <dwillemsen@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Narendra Damahe <ndamahe@nvidia.com>
Rebase-Id: R0265f605ec00f464eb9ec8d5ffe840a642592fab
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Original-Change-Id: I2ffeaf6f8dfeb279b40ca6f69f6c9157401a746a
Rebase-Id: R84f13e4b66ba9711fcb92850fd5e800ef3248a3f
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To make the response fast from i2c, providing the option to enable
clock of i2c always through platform data.
Original-Change-Id: I89c9156fc97f92a45ce72626ccd77920e02ca356
Reviewed-on: http://git-master/r/19880
Tested-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-by: Ramachandrudu Kandhala <rkandhala@nvidia.com>
Original-Change-Id: Ifaab9d7e052fb377abe27afdeb5c9cb4d19a6320
Rebase-Id: R15e2cfa9080024d9e2bbc8d966f5145766ee9e1a
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Removing the unnecessarily write in the interrupt status register
to avoid controller status misbehave.
bug 773262
Original-Change-Id: I15e2f3d5b377f44df5aae0fce9b55b2f3e7232b9
Reviewed-on: http://git-master/r/14223
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Tested-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Original-Change-Id: I17d9b90b91d54248bb23f7426faececd856403ea
Rebase-Id: R604a43169dbe3363cb9cb6d11c381aeeb502ea01
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New i2c slave should be configured with a non-zero i2c address.
Configure i2c slave with an i2c address assigned by platform
data for an i2c dev.
BUG 788286
Reviewed-on: http://git-master/r/25100
(cherry picked from commit e6e0610c72ffce3b734e079faf88fad3f0468d07)
Original-Change-Id: I440aa2cc72007d2835b2027c0b26089d0aad9263
Reviewed-on: http://git-master/r/25223
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Rfac0b98a3aad6f7df4badd5554a63856212a580d
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Use new cam_i2c slave (i2c2) instead of the legacy one.
With old i2c slave controller, occasionally it generates
spurious slave interrupts causing disruptions in i2c transfers.
BUG 790315
Reviewed-on: http://git-master/r/24287
(cherry picked from commit 001805e9036b647e9a1220f2b50e8973ec28e917)
Original-Change-Id: Icd5310286de0338a4458c26a8d491bcded032b03
Reviewed-on: http://git-master/r/24294
Tested-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R547c7338528aacebfb6b5258449dba31897552fc
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tegra2 has an improved new i2c slave controller. This should be
used instead of the old i2c slave controller. With old i2c slave
controller, occasionally it generates spurious slave interrupts
causing disruptions in master i2c transfers.
BUG 788286
BUG 804545
Reviewed-on: http://git-master/r/24107
(cherry picked from commit 64a6e1d5a555be1c330de80cfb477563ae061452)
Original-Change-Id: Id5d5bd809df4a583a743d84a91aecbb78889a3c6
Reviewed-on: http://git-master/r/24246
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Tested-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: Re4b74bb7df316c939cb619da87d2f6fd1ccb35dc
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I2C driver needs to be suspended late and resumed early than other drivers.
So, I2C driver uses the suspend_noirq/resume_noirq callbacks of struct dev_pm_ops
for early/late power management system.
Original-Change-Id: Ie2f453b96fb9ab9b16cafec79644fe5d3b982dd3
Reviewed-on: http://git-master/r/23347
Tested-by: Jubeom Kim <jubeomk@nvidia.com>
Reviewed-by: Jinyoung Park <jinyoungp@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R1126fb1683ac4f9138763e7981a0e36769f14738
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Sometimes unexpected status like I2C busy status, Tx FIFO interrupted
and wait on Rx data etc is seen. Add a code to detect such conditions
and return -EAGAIN from driver. This will cause the i2c-core to retry
the transmission as per the retry count and time-out specified by the
platform data of the adapter.
Bug ID: 777455
Original-Change-Id: Iac5971bca4d760d93cd2ed147f78fc2807315b4e
Signed-off-by: Jin Park <jinyoungp@nvidia.com>
Reviewed-on: http://git-master/r/16212
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R7c56bb575b1e7be19d1916124cdd86618c2f9c42
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