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path: root/drivers/mmc/host/sdhci-tegra.c
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2014-07-21mmc: tegra: use 1.8V quirk only on affected instancesStefan Agner
The 1.8V quirk also affected the internal eMMC which disabled newer modes such as SDR50, SDR104 and DDR50. This in turn lead to an out of spec usage since the clock was still 50MHz. By creating a no_1v8 field in the platform data we can now enable this work around on a per-instance basis. Hence we enable the quirk only on the controllers which are connected to the external SD-slots.
2013-04-23colibri_t20: mmc: sdhci: fix buildMarcel Ziswiler
Fix the following build issue introduced by commit 5cfcbc23d116927a7ae8d5b67baeacf2905b21f9 if neither CONFIG_MACH_APALIS_T30 nor CONFIG_MACH_COLIBRI_T30 is defined as in case of e.g. the Colibri T20: drivers/mmc/host/sdhci-tegra.c:951:2: error: expected expression before '.' token
2013-04-18apalis/colibri_t30: mmc: sdhci: hack to make newer cards workMarcel Ziswiler
SDR12, SDR25, SDR50, SDR104 and DDR50 all require 1.8V signalling which our current T30 designs can't do. Newer cards will fail as follows: Kingston 32GB microSDHC class 10 [ 69.000280] mmc1: error -84 whilst initialising SD card SanDisk Mobile Ultra 8GB microSDHC I [ 28.289174] mmc1: error -110 whilst initialising SD card This patch activates a quirk which signals our lack of 1.8V support.
2012-08-01mmc: host: tegra: get rid of tegra_gpio_enable()Laxman Dewangan
The gpio mode of pin is configured when setting direction and hence this call is no more required. Change-Id: I2c9bce83a283f6ef45754075cf3b7b1bc5c1d9ac Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/119612 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-08-01mmc: tegra: treat compilation warning as errorschowdary
- Add compilation flag to treat warning as error - Modified sdhci-tegra.c to remove compile warning bug 949219 Change-Id: I704ea95e3b8ca8862482b6793b71ca4e5114f832 Signed-off-by: schowdary <schowdary@nvidia.com> Reviewed-on: http://git-master/r/118036 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-07-30mmc: tegra: Don't set MMC_PM_KEEP_POWER by defaultPavan Kunapuli
For SDIO devices, MMC_PM_KEEP_POWER would be set by wifi driver during suspend. It need not be set by default. Bug 1011349 Change-Id: I779a438b45afed2cc0fd7283d89c24e9049cfe39 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/118954 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> GVS: Gerrit_Virtual_Submit
2012-07-19Revert "mmc: host: Disable SDIO card clock when idle for Tegra 3 only"Pavan Kunapuli
Without the card clock, inband interrupt is not working on some wifi chips. Bug 981683 This reverts commit 0467657691ba046b492504272baf7c626d9a3713. Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/110826 (cherry picked from commit 33c8e504328387097ed0160082cce6b36b994bd8) Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Change-Id: I6683720a9bda1f779a63133d8ca64a024c5d8a08 Reviewed-on: http://git-master/r/116707 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-07-19mmc: tegra: clean up interrupts logic in tuningPavan Kunapuli
Disable the normal interrupts signalling before tuning and enable it only after the entire tuning process is done. Bug 860102 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/111589 (cherry picked from commit 15a97f33f6cf1fc1c25441142f69f62ce5f7029b) Change-Id: I9eba9af65a50928dc4bb475e06cbf401963751bc Reviewed-on: http://git-master/r/116433 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-07-19mmc: tegra: Fix SDR50 clock rate configurationPavan Kunapuli
The host clock configuration in SDR50 mode is incorrectly grouped with DDR50 mode due to which DDR50 mode clock limits are wrongly applied even in SDR50 mode. Bug 965298 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/111566 (cherry picked from commit 2ad290d477e8198bace22d2623856555f07b9bf9) Change-Id: I5d3a446e39a349209e5842d385c1b728bfb7012e Reviewed-on: http://git-master/r/116428 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-07-16sdhci: tegra: enable sd dpdBitan Biswas
This is a WAR solution that allows for the turning on SD DPD feature. The original issue is that enabling SD DPD immediately after device comes out of LP0 causes ULPI disconnect. The root cause of that is not known. The WAR is to delay the enabling of SD DPD for 100ms after device comes out of LP0. Bug 929628 Change-Id: I946771a8e92459464ce571295f96f197db25c061 Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> (cherry picked from commit beba2b34af7ff9313aed074342b9bb86b12620a8) Reviewed-on: http://git-master/r/113391 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Wen Yi <wyi@nvidia.com> Tested-by: Wen Yi <wyi@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-30sdhci: tegra: Do not exceed platform voltage limitsnaveenk
check for platform limits before setting the voltage Bug 979504 Change-Id: Iea78be15d6a0eea0f4344c9b78ff9366f4759af8 Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com> Reviewed-on: http://git-master/r/104711 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-05-15mmc: enable background ops in driverVishal Singh
Adding a new config option and enabling background ops in driver. Correcting the EXT_CSD byte that needs to be written in order to trigger background ops in the MMC firmware. Bug 847037. Change-Id: Ibc517540cab43fa5070b142a416f6b67f2f7e7be Signed-off-by: Vishal Singh <vissingh@nvidia.com> Reviewed-on: http://git-master/r/99117 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-14mmc: tegra: Set eMMC DDR clock based on emc clockPavan Kunapuli
Set the eMMC ddr mode clock dynamically based on emc clock rate. If ddr clock limit is specified and the emc clock is less than max emc freq, then limit emmc ddr clk. If not, set the max eMMC ddr clock. Bug 967719 Change-Id: I9f70077c4ac4bb1f3e6d894fcb8420b1aba284dd Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/100579 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-11mmc: tegra: Fix SDR50 mode clock rate settingPavan Kunapuli
In SDR50 mode, set the controller clock to double the requested clock to ensure that the core voltage is maintained at a min of 1.2V. Bug 965298 Change-Id: I557a07de97efd6b44f812a11da657e03d3ddefd0 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/101522 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-07mmc: host: loglevel of a message to KERN_INFORamalingam C
Some boards don't have a vddio regulator for few rails hence not getting the regulator handle. And we assume that those rails are always powered. Hence rephrased the error message and lowered the loglevel to KERN_INFO. Bug 976177 Change-Id: I92b82f75934eaf7137584a625065e3389b6ae1b7 Signed-off-by: Ramalingam C <ramalingamc@nvidia.com> Reviewed-on: http://git-master/r/100490 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-05-02mmc: host: Disable SDIO card clock when idle for Tegra 3 onlyMursalin Akon
The CL disables SDIO card clock when idle for Tegra 3 only. Bonus: conditional build for some tegra 3 functionalities. Bug 975541 Change-Id: I097c4771f3565bf9137d7854ada10c1fe8535056 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/99707 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Martin <amartin@nvidia.com> Reviewed-by: Peer Chen <pchen@nvidia.com>
2012-04-26mmc: tegra: enable MMC_PM_IGNORE_PM_NOTIFYnaveenk
enable MMC_PM_IGNORE_PM_NOTIFY for all sd instances Bug 956238 Bug 932086 Change-Id: I4d455e480eabace403719f1813d97abfa4d01924 Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com> Reviewed-on: http://git-master/r/96071 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-04-19mmc: tegra: Disable card and host clk separatelyPavan Kunapuli
Disable card clock before disabling internal clock to ensure that there are no abnormal clock waveforms. Bug 947058 Change-Id: I98a3f7f63b4380b62bead05f1018d3cddc0ac217 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/95396 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-04-16mmc:host:tegra: make embedded sdio code conditionalMursalin Akon
Enable embedded sdio code, iff MMC_EMBEDDED_SDIO Kconfig is on. Bug 956238 Change-Id: I16539f5cad5fc66082af2f569ea36a54c12457e3 Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/90655 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-30mmc:host: add pm_caps and pm_flags to platform dataMursalin Akon
Initialize pm_caps and pm_flags through platform data. Bug 956238 Change-Id: I400f6e92541fa2e63ccc7f829e204d5eef4697fc Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/90790 Reviewed-by: Automatic_Commit_Validation_User Tested-by: Gerrit_Virtual_Submit Reviewed-by: Allen Martin <amartin@nvidia.com>
2012-03-06mmc: tegra: Enable SDHCI_QUIRK_BROKEN_CARD_DETECTIONPavan Kunapuli
Enable quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION. Also, implemented tegra_sdhci_get_cd() to return the card presence status. Bug 948943 Change-Id: I42eed23f951304e331a235f5a9199b70ba5e96b5 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/87766 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-05mmc: tegra: Clear SPI_MODE_CLKEN_OVERRIDE bit by defaultHarry Hong
This bit should always be 0 according to TRM. Bug 929985 Signed-off-by: Harry Hong <hhong@nvidia.com> Reviewed-on: http://git-master/r/79975 (cherry picked from commit 9371d04b4f9d79f1e03e60120bf1bba28af77d4b) Change-Id: I225d6b5442f63809a77ce92d9cbd152dc4112ac4 Reviewed-on: http://git-master/r/87640 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-02-23Revert "mmc: tegra: enabling MMC_PM_KEEP_POWER flag for built_in devices"Om Prakash Singh
This reverts commit caa6566d4fb8539d09276c1bcb818444af675624. MMC_PM_KEEP_POWER should be used only for sdio as power-on/off code is implemented only for sdio. This may also create regression in power. Bug 938011 Bug 943131 Change-Id: I41a29acb3dd6f3396c97ab78f9704f9b39359675 Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-on: http://git-master/r/85213 Reviewed-by: Om Prakash Singh <omp@nvidia.com> Tested-by: Om Prakash Singh <omp@nvidia.com>
2012-02-17mmc: tegra: Non std freq tuning supportShridhar Rasal
Tegra sdmmc controllers support fixed sampling frequency tuning. Also, frequency tuning is used to find the ideal tap delay value which ensures reliable high speed data transfers. Added support for the same. In SDR50 mode, setting controller clk rate to 208MHz as lower clk rates result in CRC errors. Bug 919232 Originally reviewed on: http://git-master/r/72596 Change-Id: I8825b4bdbc8533005bc76c54f5d1660f18304e4d Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-on: http://git-master/r/77798 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-16mmc: tegra: enabling MMC_PM_KEEP_POWER flag for built_in devicesnaveenk
During resume mmc_power_up is not necessary for eMMC Bug 932606 Change-Id: I6dd6e7c4f5582ecca8b9c459e3537b05cce69e69 Signed-off-by: naveen kumar arepalli<naveenk@nvidia.com> Reviewed-on: http://git-master/r/83709 Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-02-13sdhci: tegra: Enabling regulator when card is presentvjagadish
Enable the regulator with out any dependency on slot regulator Bug 932739 Signed-off-by: vjagadish <vjagadish@nvidia.com> Reviewed-on: http://git-master/r/78745 (cherry picked from commit 83d256fe3c269f59436a7cc08e46235ab5c067c8) Change-Id: I80fbaef6b76fd4bb7990c29499a62abfe46e5150 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-on: http://git-master/r/82711 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-02-09Sdhci: tegra: enable quirk NO_CALC_MAX_DISCARD_TOShridhar Rasal
enabling quirk *SDHCI_QUIRK_NO_CALC_MAX_DISCARD_TO* for not to calculate max discard timeout. bug 930767 Change-Id: Id2ca4fd202961d1997c9269eb0d437a6fca241cf Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-on: http://git-master/r/79840 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-02-03mmc: host: tegra: remove redundant code from tegra_sdhci_suspendVarun Wadekar
tegra_sdhci_suspend() had code to disable the same regulators twice. Remove one instance of the code to avoid warnings during system suspend. Change-Id: I71789b40a6d5e5c500c57b8323b9f4bc79634886 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/78682 Reviewed-by: Automatic_Commit_Validation_User
2012-01-31sdhci: tegra: Enabling power rails when card presentnaveenk
Enabling power rails when the card is present which reduces power consumption Bug 924888 Reviewed-on: http://git-master/r/75653 Change-Id: If9cbd02b49821954646845bd889501e9159c7b8c Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/78023 Reviewed-by: Automatic_Commit_Validation_User
2012-01-31mmc: tegra: Enable SDR104 and SDR50 supportPavan Kunapuli
Enable SDR104 and SDR50 support for Tegra3. Bug 920089 Bug 913598 Reviewed-on: http://git-master/r/75248 Change-Id: Ib7e7d15f1a42a14bb1ecb3e0f25934309ec43534 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/78022 Reviewed-by: Automatic_Commit_Validation_User
2012-01-16mmc: tegra: Set PADPIPE_CLKEN_OVERRIDE by defaultPavan Kunapuli
If PADPIPE_CLKEN_OVERRIDE is not set, CMD end bit errors are observed due to timing issues on some micro SD UHS cards. Bug 921412 Bug 914182 Bug 905519 Change-Id: Ie926843010e3082bf3469913c1f2ced0bfb008d2 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/74315 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/75150 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Tested-by: Varun Wadekar <vwadekar@nvidia.com>
2012-01-04mmc: tegra: io dpd support addedBitan Biswas
Enabled io dpd when clock is disabled for each SD instance. Clock enable for the SD instance causes io dpd to be disabled. bug 919993 Change-Id: I7d58517a7c51ce969a167abf7bb90ea89731d999 Signed-off-by: Bitan Biswas <bbiswas@nvidia.com> Reviewed-on: http://git-master/r/72027 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-01-04mmc: tegra: Add clock stabilization delayPavan Kunapuli
After switching the voltage and enabling the clock, wait for 1 msec for the clock to become stable. Bug 918563 Change-Id: I3cda964280daf739e8898dffb6ba3ed22ff54b14 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/72231 Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2011-12-23mmc: tegra: Add support for voltage switchingPavan Kunapuli
Enable SDHCI_QUIRK_NON_STD_VOLTAGE_SWITCHING. Implement switch_signal_voltage callback for tegra sdmmc controller to switch the voltage using regulator calls. Bug 906650 Reviewed-on: http://git-master/r/67138 Change-Id: I3237fde03fff1bd112db4f12ad66c5d68ffada09 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/69700
2011-12-22mmc: tegra: Set tap delay valuePavan Kunapuli
Set the tap delay value passed through the platform data. Bug 911075 Change-Id: I8f71b65fb6d3683a57054c52c94e3e8ae95f4da3 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/70333 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2011-12-16mmc: tegra: fix mmc pm flags and capabilitiesMayuresh Kulkarni
for bug 914934 Change-Id: I34892961074d5c23efb19a7e53688f227e0bf03d Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/70557 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2011-12-08mmc: tegra: Enforce platform specific clk limitsPavan Kunapuli
Some platforms cannot support higher clocks and result in CRC errors during read/write transactions. Do not exceed platform specific clk limits to prevent this. Bug 908560 Change-Id: I8bff6c6b66ee1018325f90cd7bf3061bd1bc5fdb Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/67483 Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2011-11-30HACK merge fixups for compileDan Willemsen
Rebase-Id: Rbc628711479b187a90437bea94776066c7a58b54
2011-11-30mmc: sdhci-tegra: Add MMC_PM_IGNORE_PM_NOTIFY for builtin deviceDmitry Shmidt
Signed-off-by: Dmitry Shmidt <dimitrysh@google.com> Rebase-Id: Rc29be578dd6cd3b02ecf72a05fcd6552fbe31fb9
2011-11-30sdhci: tegra: Set sdmmc controller clk ratePavan Kunapuli
Setting the appropriate clk rates for sdmmc controllers. The min clk rate is 50MHz. For freq between 50MHz and 104MHz, 104MHz clk rate is set. If freq higher than 104MHz is requested, then the corresponding clk rate is set. Bug 906190 Bug 896706 Change-Id: Ie81c5b027e187503d420bbd571879a98c754d252 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/64836 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> Rebase-Id: R3b9447946327071bba295453c391174953f02b1a
2011-11-30MMC: Tegra: Enabling wake up eventnaveenk
Enabling wake up event for sd card insertion/deletion to handle insertion/removal events during suspend Bug 895672 Change-Id: If9c59889d22b19b99584a8f01cb7bf7316c3b8b5 Signed-off-by: naveenk <naveenk@nvidia.com> Reviewed-on: http://git-master/r/65971 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R29c4dd500afac98150f7347f5f87d77efe45b676
2011-11-30mmc: sdhci-tegra: add platform code for UHS signalingPradeep Goudagunta
Tegra SD controller requires clk divisor to be set to 1 for DDR50 mode. Bug 899940 Change-Id: Ibc15e5f61b11e2e87b78eade8d004ff2c56b3b74 Reviewed-on: http://git-master/r/64510 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rf958d23dedd38a3d84efaf555d5ec0a31678da37
2011-11-30mmc: tegra: Set voltage based on supported ocr maskPavan Kunapuli
Setting the voltage based on the supported ocr mask in the platform data. Some SDIO/MMC devices operate in low voltage(1.8V). Bug 904614 Change-Id: I3d0a9ed4e9310a672f532a896d85a3aa3b830658 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/66103 Reviewed-by: Sachin Nikam <snikam@nvidia.com> Rebase-Id: R288360441bbeaee7c8c5dea6f85415339aed60be
2011-11-30sdhci: tegra: Add Tegra sd host init after resetPavan Kunapuli
Adding tegra sdhost controller initialization settings and enabling capabilities after reset. Changed the voltage range of SD cards to 2.7V - 3.6V to support the entire valid voltage range rather than only 3.3V. Bug 901938 Change-Id: Ic8dddc62ce6dfab931afbd3e68a2658dc2ec279e Reviewed-on: http://git-master/r/64105 Reviewed-by: Sachin Nikam <snikam@nvidia.com> Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: Rc03308b4e2b09349e15d3855baa1c32a0f248a5b
2011-11-30sdhci: tegra: Remove sdmmc clock overridesPavan Kunapuli
Remove sdmmc clock overrides. SDMMC clocks are properly configured without the clock overrides. Bug 887981 Change-Id: I1c07568e58e484c4a3a91240f0d1ed4b8a2c6fdd Reviewed-on: http://git-master/r/63238 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Bitan Biswas <bbiswas@nvidia.com> Rebase-Id: R0555f77217ef555507110b7626ce225be6bf5e35
2011-11-30sdhci: tegra: Don't use WARN_ON in error casesPavan Kunapuli
Do not use WARN_ON when regulators are not found as it would print the stack dump while booting. Use dev_err to print the error message. Change-Id: Ibe22cfe8d24719c2352084d7043f47d5203b84d0 Reviewed-on: http://git-master/r/61862 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R5f7ab8071b742843d960ce8b315e8095374af1b5
2011-11-30mmc: host: support runtime enable/disable SDCLKvjagadish
Implement functions needed in struct mmc_host_ops to support enable/disable SDCLK dynamically. BUG 886285 Change-Id: Ic48ac63af495cea30ce926c39ec2e0a9f2d26244 Reviewed-on: http://git-master/r/57856 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: Rfae7d6001a827395824716fb858ef18d0d2c4d68
2011-11-30sdhci: tegra: Add context restore support for SDIOPavan Kunapuli
Set MMC_CAP_SDIO_IRQ to use interrupts rather than polling for SDIO function handling. Set MMC_PM_KEEP_POWER for embedded SDIO devices. Add controller reset and power on for devices with MMC_PM_KEEP_POWER flag set. Bug 883715 Change-Id: I35c98ba879b564752662f60365ee8a5e72d3a587 Reviewed-on: http://git-master/r/57869 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Rebase-Id: Rc95d4035ea4569cf1742d5785efff7df7ffa2ade
2011-11-30sdhci: tegra: Switch OFF/ON power rails in suspend/resumePavan Kunapuli
Switching OFF the sd power rails in suspend and switching them ON in resume. Change-Id: I5145e211111b8144f14ee0338388eeacb34bb003 Reviewed-on: http://git-master/r/57877 Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Rebase-Id: R527ae8de0561bfedd3afb2fce62ad4d2876575bc
2011-11-30Sdhci: tegra: Tegra3 sdmmc uses non-std clk configurationPavan Kunapuli
Tegra3 sdmmc controllers need to follow a non-standard clock configuration sequence for the internal clock to stabilize. Enable SDHCI_CONFIG_NONSTANDARD_CLOCK. Implemented chip specific HW ops. Bug 871369 Change-Id: I954f93ce579c9e8b4889b27f51fa5d54a0a8e434 Reviewed-on: http://git-master/r/53416 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com> Rebase-Id: R4b68a67d19a299608da6969f4d403c958f55b3b4
generated by cgit v1.2.3 (git 2.0.4) at 2024-04-19 19:42:06 +0000