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We already check for ongoing async transfers when handling discard
requests, but not in mmc_blk_issue_flush(). This patch fixes that
omission.
Tested with an SDHCI controller and eMMC4.41.
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Per Forlin <per.forlin@linaro.org>
Cc: <stable@kernel.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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We observed a few commands timeout when using auto cmd23.
The root cause is still unkonwn.
This patch is a workaround to not use auto cmd23 temporarily.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Add auto cmd23 fix.
The original commit merged is: 97e4ba6a5
Subject: [PATCH 1/1] mmc: sdhci-esdhc-imx: Enable ADMA2
Eanble the ADMA2 mode for freescale esdhc imx driver, tested on MX25
3DS board, MX51 BBG board and MX53 LOCO board.
This patch is only used to enable the ADMA2 for MX51/53 platforms.
MX25/35 can't support the ADMA2 mode, set BROKEN_ADMA quirk on
MX25/35 platforms.
The ADMA mode supported or not can be distinguished by bit 20 of
the Capability Register (offset 0x40) in the FSL eSDHC module.
Signed-off-by: Richard Zhu <richard.zhu@linaro.org>
Tested-and-acked-by: Eric Miao <eric.miao@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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the patch is based on a series of patches by Per Forlin
the patch is sdhci host side implementation.
using a toshiba SDHC3.0 card, the performance increases
from 48.5MB/s to 52.4MB/s.
cmd: dd if=/dev/mmcblk0 of=/dev/null bs=1M count=500
the performance results running@1GHz, 200MHz CPU freq are:
52.4MB/s -> 20.7MB/s
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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Change mmc_blk_issue_rw_rq() to become asynchronous.
The execution flow looks like this:
* The mmc-queue calls issue_rw_rq(), which sends the request
to the host and returns back to the mmc-queue.
* The mmc-queue calls issue_rw_rq() again with a new request.
* This new request is prepared in issue_rw_rq(), then it waits for
the active request to complete before pushing it to the host.
* When the mmc-queue is empty it will call issue_rw_rq() with a NULL
req to finish off the active request without starting a new request.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Add an additional mmc queue request instance to make way for two active
block requests. One request may be active while the other request is
being prepared.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Break out code without functional changes. This simplifies the code and
makes way for handling two parallel requests.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar<sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Break out code from mmc_blk_issue_rw_rq to create a block request prepare
function. This doesn't change any functionallity. This helps when handling
more than one active block request.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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The way the request data is organized in the mmc queue struct, it only
allows processing of one request at a time. This patch adds a new struct
to hold mmc queue request data such as sg list, request, blk request and
bounce buffers, and updates any functions depending on the mmc queue
struct. This prepares for using multiple active requests in one mmc queue.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Some host controllers will not operate without a hardware
timeout that is limited in value. However large discards
require large timeouts, so there needs to be a way to
specify the maximum discard size.
A host controller driver may now specify the maximum discard
timeout possible so that max_discard_sectors can be calculated.
However, for eMMC when the High Capacity Erase Group Size
is not in use, the timeout calculation depends on clock
rate which may change. For that case Preferred Erase Size
is used instead.
Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Check the status bits in the r/w command response for any errors.
If error bits are set, then we won't have seen any data transferred,
so it's pointless doing any further checking.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Command channel errors fall into four classes:
1. The command was issued with the card in the wrong state
2. The command failed to be received by the card correctly
3. The cards response failed to be received by the host (CRC error)
4. The card failed to respond to the card
For (1), in theory we should know that the card is in the correct state.
However, a failed stop command (or other failure) may result in the card
remaining in a data transfer state from the previous command. If we
detect this condition, we try to recover by sending a stop command.
For the initial commands (set block count and the read/write command)
no data will have been transferred. All that we need deal with is
retrying at this point. A failed stop command can be remedied as
above.
If we are unable to recover the card (eg, the card ignores our requests
for status, or we don't recognise the error code) then we immediately
fail the request.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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If the MMC_SEND_STATUS command is not successful, we should not return
a zero status word, but instead allow the caller to know positively
that an error occurred.
Convert the open-coded get_card_status() to use the helper function,
and provide definitions for the card state field.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Pawel Moll <pawel.moll@arm.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Add a test that measures how the mmc bandwidth depends on the numbers of
sg elements in the sg list. The transfer size if fixed and sg length goes
from a few up to 512. The purpose is to measure overhead caused by
multiple sg elements.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Add four tests for read and write performance per
different transfer size, 4k to 4M.
* Read using blocking mmc request
* Read using non-blocking mmc request
* Write using blocking mmc request
* Write using non-blocking mmc request
The host driver must support pre_req() and post_req()
in order to run the non-blocking test cases.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar<sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Add a debugfs file "testlist" to print all available tests.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar<sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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pre_req() runs dma_map_sg() and prepares the dma descriptor for the next
mmc data transfer. post_req() runs dma_unmap_sg. If not calling pre_req()
before mmci_request(), mmci_request() will prepare the cache and dma just
like it did it before. It is optional to use pre_req() and post_req()
for mmci.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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pre_req() runs dma_map_sg(), post_req() runs dma_unmap_sg. If not calling
pre_req() before omap_hsmmc_request(), dma_map_sg will be issued before
starting the transfer. It is optional to use pre_req(). If issuing
pre_req(), post_req() must be called as well.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Previously there has only been one function mmc_wait_for_req()
to start and wait for a request. This patch adds:
* mmc_start_req() - starts a request wihtout waiting
If there is on ongoing request wait for completion
of that request and start the new one and return.
Does not wait for the new command to complete.
This patch also adds new function members in struct mmc_host_ops
only called from core.c:
* pre_req - asks the host driver to prepare for the next job
* post_req - asks the host driver to clean up after a completed job
The intention is to use pre_req() and post_req() to do cache maintenance
while a request is active. pre_req() can be called while a request is
active to minimize latency to start next job. post_req() can be used after
the next job is started to clean up the request. This will minimize the
host driver request end latency. post_req() is typically used before
ending the block request and handing over the buffer to the block layer.
Add a host-private member in mmc_data to be used by pre_req to mark the
data. The host driver will then check this mark to see if the data is
prepared or not.
Signed-off-by: Per Forlin <per.forlin@linaro.org>
Acked-by: Kyungmin Park <kyungmin.park@samsung.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Venkatraman S <svenkatr@ti.com>
Tested-by: Sourav Poddar <sourav.poddar@ti.com>
Tested-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Improve SD3.0 compatibility: reset host controller before changing clk
tuning ctrl reg.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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Improve compatibility by doing the following:
- Change DSE to 34ohm for 200MHz
- Reset host controller before changing clk tuning ctrl reg
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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- clear ddr_en bit on non ddr timing mode in platform code.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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- add hook for post tuning in common code
- add hook for post tuning for platform code to deal with clean up stuff on
finishing tuning.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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- clear exe_tune flag after tuning in platform code, otherwise it
will reduce io performance for SDR104 cards.
- add platform code to clear exe_tune bit after tuning completes.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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issue:
if uboot is loaded from eMMC, the eMMC memory will be configured to DDR mode.
on kernel startup, it will initialize the card at SDR mode, while the register
of USDHC is still configured to DDR enable mode. Therefore, the initialization
of eMMC memory will fail.
fix:
- clear MIX_CTRL on sdhc platform init code.
- clear vselect bit of VENDOR_SPEC on sdhc platform init code.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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- align UHS-I trial sequence with community that first DDR50
then SDR50.
- escape DDR50 from tuning procedure, only SDR104 will be tuned
so far.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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- add delay in mmc_switch to improve compatibility.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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- change UHS-I mode selection to try SDR50 first, then DDR50.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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- add auto_tune back on pretuning to improve compatibility.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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mmc/core/bus.c:189: warning: initialization from incompatible pointer type
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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- check ocr_avail_sd & MMC_VDD_165_195 before set S18R bit to check whether
the host is support 1.8v support.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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- this patch will mask ddr mode support on the slots support ddr,
but no 1.8v support
This reverts commit 05b7fdd4d6103500f1e531b3e5bd91d97f40ee34.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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fix build error:
incompatible pointer type
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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add bus suspend/resume function to prevent SDMMC suspend/resume stess test fail
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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- support 4bit/8bit ddr mode
- change cpu_is_mx6q() || cpu_is_mx6dl() to cpu_is_mx6()
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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This patch change is very trivial and simply just add
cpu_is_mx6dl() or using cpu_is_mx6 to replace cpu_is_mx6q
each driver owner will check it and adjust it accordingly later,
such as sdhc etc.
Signed-off-by: Jason Liu <r64343@freescale.com>
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the card interrupt status bit workaround and TC interrupt comes earlier than
DMA interrupt workaround are not necessary for i.MX6Q TO1.1 and later
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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- checking whether host support MMC_VDD_165_195, before query
UHS mode supported by host controller.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR152547-03 [MX6Q]add SDHC3.0 support on uSDHC controller
add voltage switch function due to SDHC3.0 spec requirement
add tuning function due to SDHC3.0 spec requirement
extend some functions to support SDR50 & SDR104 speed mode
- adjust the sequence of current_limit and bus_speed_mode
- add FSL specific tuning procedure
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR152547-03 [MX6Q]add SDHC3.0 support on uSDHC controller
add voltage switch function due to SDHC3.0 spec requirement
add tuning function due to SDHC3.0 spec requirement
extend some functions to support SDR50 & SDR104 speed mode
- add support for SD3.0.
- add workaround for accessing non-exist registers on FSL SDHC.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.
Hope people are OK with tiny include file.
Note, that mm_types.h is still dragged in, but it is a separate story.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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- remove unused 'u32 reg' in platform code
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR133884 eMMC: improve boot_info message output
Output bit means of important esd_csd register
Read esd_csd info each time when cat boot_info
becasue user may change config affect esd_csd
value.
boot_info:0x07;
ALT_BOOT_MODE:1 - Supports alternate boot method
DDR_BOOT_MODE:1 - Supports alternate dual data rate during boot
HS_BOOTMODE:1 - Supports high speed timing during boot
boot_size:0512KB
boot_partition:0x48;
BOOT_ACK:1 - Boot acknowledge sent during boot operation
BOOT_PARTITION-ENABLE: 1 - Boot partition 1 enabled
PARTITION_ACCESS:0 - No access to boot partition
boot_bus:0x01
BOOT_MODE:0 - Use single data rate + backward compatible timings
in boot operation
RESET_BOOT_BUS_WIDTH:0 - Reset bus width to x1, single data rate
and backward compatible timings after boot operation
BOOT_BUS_WIDTH:1 - x4 (sdr/ddr) bus width in boot operation mode
Signed-off-by: Frank Li <Frank.Li@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR126228 eMMC: Configure boot_partition_enable
Enable the configurations of the boot enable on the eMMC cards.
Add the interface that used to configure the boot_bus_width
In order to make sure that the re-read the ext-csd of card
can be completed successfully, add the method to wait for
the finish of the busy state.
NOTE:
The following are the valid inputs when configure the boot
bus width of the eMMC cards.
+--------------------------------------------------------------------+
| Bit7 Bit6 Bit5 | Bit4 Bit3 | Bit2 | Bit1 Bit0 |
|----------------|----------------------------------|----------------|
| X | BOOT_MODE | RESET_BOOT_BUS_WIDTH | BOOT_BUS_WIDTH |
+--------------------------------------------------------------------+
Bit [4:3] : BOOT_MODE (non-volatile)
0x0 : Use single data rate + backward compatible timings in boot
operation (default)
0x1 : Use single data rate + high speed timings in boot operation mode
0x2 : Use dual data rate in boot operation
0x3 : Reserved
Bit [2]: RESET_BOOT_BUS_WIDTH (non-volatile)
0x0 : Reset bus width to x1, single data rate and backward compatible
timings after boot operation (default)
0x1 : Retain boot bus width and boot mode after boot operation
Bit[1:0] : BOOT_BUS_WIDTH (non-volatile)
0x0 : x1 (sdr) or x4 (ddr) bus width in boot operation mode (default)
0x1 : x4 (sdr/ddr) bus width in boot operation mode
0x2 : x8 (sdr/ddr) bus width in boot operation mode
0x3 : Reserved
The following are the valid inputs when configure the boot
partitions of the eMMC cards.
+------------------------------------------------------------+
| Bit7 | Bit6 | Bit5 Bit4 Bit3 | Bit2 Bit1 Bit0 |
|------|----------|-----------------------|------------------|
| X | BOOT_ACK | BOOT_PARTITION_ENABLE | PARTITION_ACCESS |
+------------------------------------------------------------+
Bit7: Reserved
Bit6: always set to vaule '1' when boot_part is enabled
Bit[5:3]:
0x0 : Device not boot enabled (default)
0x1 : Boot partition 1 enabled for boot
0x2 : Boot partition 2 enabled for boot
0x7 : User area enabled for boot
Bit[2:0]:
0x0 : No access to boot partition (default)
0x1 : R/W boot partition 1
0x2 : R/W boot partition 2
So only the '0, 1, 2; 8, 9, 10; 16, 17, 18; 56, 57, 58' are
valid parameters when configure the boot_partiton.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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ENGR125411 eMMC: Boot Partition switch func used in MFG tool
User can get eMMC partitions info from user space layer in
linux OS enviroment.
User can do switch operations between the eMMC boot partitions
and the user partition.
User can access the eMMC boot partitions from user space layer
in linux OS enviroment.
NOTE:This func had been verified on TOSHIBA eMMC44 card only.
Signed-off-by: Richard Zhu <r65037@freescale.com>
Signed-off-by: Rob Herring <r.herring@freescale.com>
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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issue:
in the reverted patch, sdhc driver will claim host on its
entering suspend state. and the wifi driver will hold host on
its loading. so once system is about to enter suspend state,
system will be pended on claiming host.
fix:
- Revert "ENGR00170944 [MX6Q MMC]suspend/resume crash"
This reverts commit 3b2e3729dc57a5ff532552cde49de7ace4c5792c.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
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fix following build warning:
drivers/mmc/host/sdhci.c: In function 'sdhci_clk_worker':
drivers/mmc/host/sdhci.c:53: warning: unused variable 'flags'
drivers/mmc/host/sdhci.c: In function 'sdhci_resume_host':
drivers/mmc/host/sdhci.c:1751:
warning: 'ret' may be used uninitialized in this function
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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if the system suspend in the process of data transfer, current request
is broken by the suspend request, thus there're sd/mmc requests error logs.
to prevent this error, add a claim host in suspend function and release it
in resume function to make sure the request is finished before entering suspend
and next request could be started after resuming.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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call clk_enable/clk_disable in atomic is forbidden.
move all the calls out of atomic context.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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Signed-off-by: Jason Liu <jason.hui@linaro.org>
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