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This reverts commit bdf9e11d339ebc121e80e7ecdd44e0abcaf4ff38.
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When commands timeout, previously we had code to
retry the same command 3 times. But under some
situations 3 retries do not suffice. Increasing
the retries to 10 does the trick. Also if the card
does not respond after 10 retries then the card is
dead for sure. But if the same card responds in
between 3 to 10 retries then it is always beneficial
to have retries as 10.
Bug 914934
Change-Id: I6b1e95c10ca5a62dde84ce8cacbe53ad2197ab33
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/72092
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
(cherry picked from commit c4beda3e798ed91e1dadbce4206b407832fcc40b)
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If the data commands fail due to some error, retry the transfer.
Add 3 retries for data commands.
for bug 914934
Change-Id: I53245ddd159abdbade09f841d9490d2f106e7c88
Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/71181
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
(cherry picked from commit fd804ee58d3f9ce10cb2fe16aa76ae0407912d32)
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Add tracepoints to record the start and end of each mmc block
operation. This includes read, write, erase, secure erase,
trim, secure trim1 and secure trim 2, discard and
sanitize commands.
Change-Id: Ic5d1cbdb9adb940d8b1a2a13c73970023575df50
Signed-off-by: Ken Sumrall <ksumrall@android.com>
Signed-off-by: Iliyan Malchev <malchev@google.com>
Conflicts:
drivers/mmc/card/block.c
drivers/mmc/core/core.c
(cherry picked from commit 4de9a433c26e47d9b4a93105eb92935321100786)
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Support discard feature if MID field in the CID register is 0x15, EXT.CSD[192]
(device version) is 5 and Bit 0 in the EXT.CSD[64] is 1. Also removed REQ_SECURE flag
check to avoid kernel hang.
This patch is released from samsung.
Change-Id: I4023a900680e9bca10c40311b09ed077a22617db
(cherry picked from commit 4acc227edfb631d377e14911287c1b73682fc9c2)
Conflicts:
drivers/mmc/card/block.c
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Change-Id: Ia56018522e5d18ca5bfd25858ec943da93d3edc3
(cherry picked from commit e363e576f448d6132340c5d0bda580fef212888d)
Conflicts:
drivers/mmc/host/sdhci-tegra.c
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Change-Id: I46e3f1a158d61a0b255fae5d510c8f87579c435d
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/47847
Reviewed-by: Kirt Hsieh <Kirt_Hsieh@asus.com>
Tested-by: Kirt Hsieh <Kirt_Hsieh@asus.com>
Reviewed-by: Vincent Yue <Vincent_Yue@asus.com>
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/48199
Reviewed-by: Jim1 Lin <jim1_lin@asus.com>
Tested-by: Jim1 Lin <jim1_lin@asus.com>
Reviewed-by: Leslie Yu <Leslie_Yu@asus.com>
(cherry picked from commit 8eadc6d514b7838c398ff3499ab5f2e012e2fc06)
Conflicts:
drivers/mmc/host/sdhci.c
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Change-Id: I40a8481618b1a5995a713ff343c7532badd20b65
Change-Id: I399302118c9d8d8246a4a304ff7a1ea80889dbc6
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45568
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
(cherry picked from commit 121c0c6dffe16c683f4dbf00ed841fb4de1f70a0)
Conflicts:
drivers/mmc/core/mmc.c
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Change-Id: I28d670944cbfd55e2b2ad98b727368a8dfdc0944
Change-Id: I2bb65335c2468b257473fe264e705826cfd4474e
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45300
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
(cherry picked from commit 1711f72a9840f3667cf93c774ac16c2d8417375c)
Conflicts:
drivers/mmc/core/core.c
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Change-Id: I89b544afbb0a109a222621a9948399fba8f77693
Change-Id: Ie366a152100a478e7811b4395f3fae9794bb1386
Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45221
Reviewed-by: Ban Feng <Ban_Feng@asus.com>
Tested-by: Ban Feng <Ban_Feng@asus.com>
Reviewed-by: Sam hblee <Sam_hblee@asus.com>
Conflicts:
drivers/mmc/core/mmc.c
include/linux/mmc/card.h
asdf
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(tegra-l4t-r16-16.5)
Conflicts:
drivers/media/video/tegra_v4l2_camera.c
drivers/mmc/host/sdhci.c
drivers/watchdog/tegra_wdt.c
include/media/tegra_v4l2_camera.h
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As stated by the eMMC 5.0 specification, a chip should not be rejected
only because of the revision stated in the EXT_CSD_REV field of the
EXT_CSD register.
Remove the control on this value, the control of the CSD_STRUCTURE field
should be sufficient to reject future incompatible changes.
Signed-off-by: Romain Izard <romain.izard.pro@gmail.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
(cherry picked from commit 03a59437ef6b6ad7fb0165cb9b96c08d6bf057fc)
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With the new eMMC5.1 spec, there is a new EXT_CSD register with
the revision number(EXT_CSD_REV) 7. This patch updates the check
for ext-csd.rev number as 7.
Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit 6636bad839d9936e73e48c4841eda83a58fcdb53)
Conflicts:
drivers/mmc/core/mmc.c
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Newer eMMC standards use CMD23 for multi-block transfer. These
command has the advantage that only one command is necessary, no
stop command after the transfer is required. The kernel already
supports this command, but we need to enable the capability on
the host level.
Tests verified that the MMC code detects that SD-card do not
support CMD23 and hence don't use that command.
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This works around a issue we see when using eMMC 4.5 on tegra
SDHCI host controller.
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The 1.8V quirk also affected the internal eMMC which disabled newer
modes such as SDR50, SDR104 and DDR50. This in turn lead to an
out of spec usage since the clock was still 50MHz.
By creating a no_1v8 field in the platform data we can now enable
this work around on a per-instance basis. Hence we enable the
quirk only on the controllers which are connected to the external
SD-slots.
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The driver should not try to switch to 1.8V when the SD 3.0 host
controller does not have any UHS capabilities bits set (SDR50, DDR50
or SDR104). See page 72 of "SD Specifications Part A2 SD Host
Controller Simplified Specification Version 3.00" under
"1.8V Signaling Enable". Instead of setting SDR12 and SDR25 in the host
capabilities data structure for all V3.0 host controllers, only set them
if SDR104, SDR50 or DDR50 is set in the host capabilities register. This
will prevent the switch to 1.8V later.
Bug 1402031
Acked-by: Arindam Nath <arindam.nath@amd.com>
Acked-by: Philip Rakity <prakity@marvell.com>
Acked-by: Girish K S <girish.shivananjappa@linaro.org>
Signed-off-by: Al Cooper <acooper@gmail.com>
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Change-Id: I61d3fdb96fce223649075b6c063a3dd227aef062
Reviewed-on: http://git-master/r/365451
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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The OLPC XO-1.75 laptop includes a SDHCI controller which is 1.8v
capable, and it truthfully reports so in its capabilities. This
alternate voltage is used for driving new "UHS-I" SD cards at their
full speed.
However, what the controller doesn't know is that the motherboard
physically doesn't have a 1.8v supply available.
Add a quirk so that systems such as this one can override disable
1.8v support, adding support for UHS-I cards (by running them at
3.3v).
This avoids a problem where the system would first try to run the
card at 1.8v, fail, and then not be able to fully reset the card
to retry at the normal 3.3v voltage.
This is more appropriate than using the MISSING_CAPS quirk, which
is intended for cases where the SDHCI controller is actually lying
about its capabilities, and would force us to somehow override both
caps words from another source.
Bug 1402031
Change-Id: I7ca070a13241e6403eb2e243ebbc441a311110bc
Signed-off-by: Daniel Drake <dsd@laptop.org>
Reviewed-by: Philip Rakity <prakity@nvidia.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
Reviewed-on: http://git-master/r/346323
Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
Tested-by: Matthew Pedro <mapedro@nvidia.com>
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Fix the following build issue introduced by commit
5cfcbc23d116927a7ae8d5b67baeacf2905b21f9 if neither
CONFIG_MACH_APALIS_T30 nor CONFIG_MACH_COLIBRI_T30 is defined as in
case of e.g. the Colibri T20:
drivers/mmc/host/sdhci-tegra.c:951:2:
error: expected expression before '.' token
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SDR12, SDR25, SDR50, SDR104 and DDR50 all require 1.8V signalling which
our current T30 designs can't do. Newer cards will fail as follows:
Kingston 32GB microSDHC class 10
[ 69.000280] mmc1: error -84 whilst initialising SD card
SanDisk Mobile Ultra 8GB microSDHC I
[ 28.289174] mmc1: error -110 whilst initialising SD card
This patch activates a quirk which signals our lack of 1.8V support.
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The OLPC XO-1.75 laptop includes a SDHCI controller which is 1.8v
capable, and it truthfully reports so in its capabilities. This
alternate voltage is used for driving new "UHS-I" SD cards at their
full speed.
However, what the controller doesn't know is that the motherboard
physically doesn't have a 1.8v supply available.
Add a quirk so that systems such as this one can override disable
1.8v support, adding support for UHS-I cards (by running them at
3.3v).
This avoids a problem where the system would first try to run the
card at 1.8v, fail, and then not be able to fully reset the card
to retry at the normal 3.3v voltage.
This is more appropriate than using the MISSING_CAPS quirk, which
is intended for cases where the SDHCI controller is actually lying
about its capabilities, and would force us to somehow override both
caps words from another source.
Signed-off-by: Daniel Drake <dsd@laptop.org>
Reviewed-by: Philip Rakity <prakity@nvidia.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
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Conflicts:
arch/arm/mach-tegra/tegra3_usb_phy.c
arch/arm/mach-tegra/usb_phy.c
drivers/usb/gadget/tegra_udc.c
drivers/usb/otg/Makefile
drivers/video/tegra/fb.c
sound/soc/tegra/tegra_pcm.c
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Hack to avoid extensive warning messages from Redpine Signals LiteFi
driver due to unaligned DMA accesses.
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The gpio mode of pin is configured when setting
direction and hence this call is no more required.
Change-Id: I2c9bce83a283f6ef45754075cf3b7b1bc5c1d9ac
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/119612
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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- Add compilation flag to treat warning as error
- Modified sdhci-tegra.c to remove compile warning
bug 949219
Change-Id: I704ea95e3b8ca8862482b6793b71ca4e5114f832
Signed-off-by: schowdary <schowdary@nvidia.com>
Reviewed-on: http://git-master/r/118036
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Without card clock, inband interrupt is not working on
some wifi chips.
Bug 981683
This reverts commit b31946b34507209f26c6d709e23fd1c0cedd25f8.
Change-Id: I2dd86edb2445bd6db7917adf509b7a018d31aaed
Reviewed-on: http://git-master/r/110839
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I6f2266ac5b6bd9585272958b4b8a89af1b3cdffb
Reviewed-on: http://git-master/r/119009
Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
Tested-by: Lokesh Pathak <lpathak@nvidia.com>
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Modified the mmc_poweroff to resume before sending the poweroff
notification command. In sleep mode only AWAKE and RESET commands are
allowed, so before sending the poweroff notification command resume from
sleep mode and then send the notification command.
PowerOff Notify is tested on a Synopsis Designware Host Controller
(eMMC 4.5). The suspend to RAM and resume works fine.
Change-Id: Ib4642a29e423aee6041a92cc72a388d677674ae3
Signed-off-by: Girish K S <girish.shivananjappa@linaro.org>
Tested-by: Girish K S <girish.shivananjappa@linaro.org>
Reviewed-by: Saugata Das <saugata.das@linaro.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Bug 1007644
Bug 936069
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I2e3d421c82eb765cb640876691ffe4818d7e146b
Reviewed-on: http://git-master/r/118918
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Host may now use MMC_CAP2_NO_SLEEP_CMD to disable the use
of eMMC sleep/awake command.
This option can be used when your platform has a buggy
kernel crash dump software, which is supposed to store
the dump on the eMMC, but is not able to wake up the eMMC
from sleep state.
In particular, failures have been seen with u-boot; even if
it is fixed there, platforms will be slow to update their
bootloader binaries.
Change-Id: I403f4b2a231dde087095a660189dc2f4e79edfd5
Signed-off-by: Ulf Hansson <ulf.hansson@stericsson.com>
Reviewed-by: Hanumath Prasad <hanumath.prasad@stericsson.com>
Reviewed-by: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
Acked-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Chris Ball <cjb@laptop.org>
Bug 1007644
Bug 936069
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I8b2834e154e338a97bd6d82f177809d47d318ff0
Reviewed-on: http://git-master/r/118914
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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If eMMC sleep support is enabled, set MMC_PM_KEEP_POWER
to avoid host power off and power on. Instead, restore
the host context in resume.
Bug 1007644
Bug 936069
Change-Id: I74578bb1f9e297b3af6bd79b9215364334984836
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/118913
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Min-wuk Lee <mlee@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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For SDIO devices, MMC_PM_KEEP_POWER would be set
by wifi driver during suspend. It need not be set
by default.
Bug 1011349
Change-Id: I779a438b45afed2cc0fd7283d89c24e9049cfe39
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/118954
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
GVS: Gerrit_Virtual_Submit
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Unlike SDSC and SDHC, for SDXC cards CMD20 needs to be
issued to meet the class performance for speed class
recording. Adding mmc_speed_class_control() which should
be used by an AV recording app/utility before starting
recording on an SDXC card.
Bug 969360
Reviewed-on: http://git-master/r/39394
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/115685
(cherry picked from commit 04b8d1287a95e1882d956cdf7997015350408a3c)
Change-Id: Id567effb476ee580de3d49b70201ebae5a13360a
Reviewed-on: http://git-master/r/118038
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Without the card clock, inband interrupt is not working on
some wifi chips.
Bug 981683
This reverts commit 0467657691ba046b492504272baf7c626d9a3713.
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/110826
(cherry picked from commit 33c8e504328387097ed0160082cce6b36b994bd8)
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Change-Id: I6683720a9bda1f779a63133d8ca64a024c5d8a08
Reviewed-on: http://git-master/r/116707
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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Disable the normal interrupts signalling before
tuning and enable it only after the entire tuning
process is done.
Bug 860102
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/111589
(cherry picked from commit 15a97f33f6cf1fc1c25441142f69f62ce5f7029b)
Change-Id: I9eba9af65a50928dc4bb475e06cbf401963751bc
Reviewed-on: http://git-master/r/116433
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
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The host clock configuration in SDR50 mode is
incorrectly grouped with DDR50 mode due to which
DDR50 mode clock limits are wrongly applied even
in SDR50 mode.
Bug 965298
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/111566
(cherry picked from commit 2ad290d477e8198bace22d2623856555f07b9bf9)
Change-Id: I5d3a446e39a349209e5842d385c1b728bfb7012e
Reviewed-on: http://git-master/r/116428
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Tested-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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This is a WAR solution that allows for the turning on
SD DPD feature.
The original issue is that enabling SD DPD immediately after device comes
out of LP0 causes ULPI disconnect. The root cause of that is
not known.
The WAR is to delay the enabling of SD DPD for 100ms after
device comes out of LP0.
Bug 929628
Change-Id: I946771a8e92459464ce571295f96f197db25c061
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
(cherry picked from commit beba2b34af7ff9313aed074342b9bb86b12620a8)
Reviewed-on: http://git-master/r/113391
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Wen Yi <wyi@nvidia.com>
Tested-by: Wen Yi <wyi@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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If there are errors happened in sdhci_suspend_host, handle it so that
when the function returns with an error, the host's behaviour is the
same before this function call, e.g. card detection is enabled and
tuning timer is active, etc.
Signed-off-by: Philip Rakity <prakity@marvell.com>
Signed-off-by: Aaron Lu <aaron.lu@amd.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
(cherry picked from commit 38a60ea2e7b33ab33ee11d6ef527f259edb102cf)
Bug 984811
Change-Id: I532c3914cecf63291a23baa669c650b4ac5448e4
Signed-off-by: Sang-Hun Lee <sanlee@nvidia.com>
Reviewed-on: http://git-master/r/106351
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Thomas Cherry <tcherry@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Adding new sysfs entry for product revision which is needed by
mNAND health and status user space tool.
Bug 974823.
Change-Id: I4a07a5e6c1c81e2b7a4c1ed024e987e06f9f87c8
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/103366
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
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Adding CMD56 implementation.
Doing the following for manfid 0x90 and FW revisions 0x73 and
0x7b (both are non-standard custom FW):
1. Adding change to issue BKOPS_START whenever 20 seconds have gone
by without any slow write operations.
2. Adding change to issue CMD56 to refresh (custom feature) 1 block
whenever 60 seconds have gone by without any slow write operations.
Corresponding changes are already there in embedded branches:
http://git-master/r/#change,93247
http://git-master/r/#change,97555
Bug 847037.
Bug 874256.
Bug 963737.
Change-Id: Ie36b52620a75320abfedc36d1408647b36eddb46
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/102259
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Luis Dib <ldib@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
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check for platform limits before setting the voltage
Bug 979504
Change-Id: Iea78be15d6a0eea0f4344c9b78ff9366f4759af8
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/104711
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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mmc_test currently shows test case number as 0 for all test cases.
Correcting this to depict the correct test case number.
Bug 976137.
Change-Id: Ifa7bdd08d537ef20a3303594938a771e823d4e3b
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/103368
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Shridhar Rasal <srasal@nvidia.com>
Tested-by: Shridhar Rasal <srasal@nvidia.com>
GVS: Gerrit_Virtual_Submit
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Merges of dma changes from mainline reported conflict and
it was not got resolved properly.
Fix the resolution issue.
Change-Id: I7edc5effc0b9a61363e77e6cc39eb62e315396d0
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-on: http://git-master/r/102590
Reviewed-by: Automatic_Commit_Validation_User
GVS: Gerrit_Virtual_Submit
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Adding a new config option and enabling background ops in driver.
Correcting the EXT_CSD byte that needs to be written in order to
trigger background ops in the MMC firmware.
Bug 847037.
Change-Id: Ibc517540cab43fa5070b142a416f6b67f2f7e7be
Signed-off-by: Vishal Singh <vissingh@nvidia.com>
Reviewed-on: http://git-master/r/99117
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Set the eMMC ddr mode clock dynamically based on emc
clock rate. If ddr clock limit is specified and the emc
clock is less than max emc freq, then limit emmc ddr
clk. If not, set the max eMMC ddr clock.
Bug 967719
Change-Id: I9f70077c4ac4bb1f3e6d894fcb8420b1aba284dd
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100579
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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In SDR50 mode, set the controller clock to double
the requested clock to ensure that the core voltage
is maintained at a min of 1.2V.
Bug 965298
Change-Id: I557a07de97efd6b44f812a11da657e03d3ddefd0
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/101522
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Retries should be done only after abort command
is issued for the current failed transfer. The block
layer already has an implementation for retrying.
No need for the extra retries.
Bug 961761
Bug 922239
Change-Id: I07f60e85e093b725007727833739013f8fd66d43
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/100563
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Some boards don't have a vddio regulator for few rails hence not getting
the regulator handle. And we assume that those rails are always powered.
Hence rephrased the error message and lowered the loglevel to KERN_INFO.
Bug 976177
Change-Id: I92b82f75934eaf7137584a625065e3389b6ae1b7
Signed-off-by: Ramalingam C <ramalingamc@nvidia.com>
Reviewed-on: http://git-master/r/100490
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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The CL disables SDIO card clock when idle for Tegra 3 only.
Bonus: conditional build for some tegra 3 functionalities.
Bug 975541
Change-Id: I097c4771f3565bf9137d7854ada10c1fe8535056
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/99707
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
Reviewed-by: Peer Chen <pchen@nvidia.com>
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enable MMC_PM_IGNORE_PM_NOTIFY for all sd instances
Bug 956238
Bug 932086
Change-Id: I4d455e480eabace403719f1813d97abfa4d01924
Signed-off-by: naveen kumar arepalli <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/96071
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Disable card clock before disabling internal clock to
ensure that there are no abnormal clock waveforms.
Bug 947058
Change-Id: I98a3f7f63b4380b62bead05f1018d3cddc0ac217
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/95396
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Disable SDIO card clock when there are no commands/
data transfers on the SD bus.
Bug 958954
Bug 955742
Bug 952344
Change-Id: I7390be0406f7e46c0eb88ede2ae6f904b2181306
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/95390
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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