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2020-05-21Merge remote-tracking branch 'remotes/fslc/4.9-2.3.x-imx' into ↵Marcel Ziswiler
toradex_4.9-2.3.x-imx-next Conflicts: sound/soc/codecs/sgtl5000.c sound/soc/fsl/imx-sgtl5000.c
2020-05-19Merge tag 'v4.9.220' into 4.9-2.3.x-imxMarcel Ziswiler
This is the 4.9.220 stable release Conflicts: arch/arm/Kconfig.debug arch/arm/boot/dts/imx7s.dtsi arch/arm/mach-imx/common.h arch/arm/mach-imx/cpuidle-imx6q.c arch/arm/mach-imx/cpuidle-imx6sx.c arch/arm/mach-imx/suspend-imx6.S block/blk-core.c drivers/crypto/caam/caamalg.c drivers/crypto/mxs-dcp.c drivers/dma/imx-sdma.c drivers/gpu/drm/bridge/adv7511/adv7511_drv.c drivers/input/keyboard/imx_keypad.c drivers/input/keyboard/snvs_pwrkey.c drivers/mmc/host/sdhci.c drivers/net/can/flexcan.c drivers/net/ethernet/freescale/fec_main.c drivers/net/phy/phy_device.c drivers/net/wireless/ath/ath10k/pci.c drivers/tty/serial/imx.c drivers/usb/dwc3/gadget.c drivers/usb/host/xhci.c include/linux/blkdev.h include/linux/cpu.h include/linux/platform_data/dma-imx-sdma.h kernel/cpu.c net/wireless/util.c sound/soc/fsl/Kconfig sound/soc/fsl/fsl_esai.c sound/soc/fsl/fsl_sai.c sound/soc/fsl/imx-sgtl5000.c
2019-12-05mtd: rawnand: sunxi: Write pageprog related opcodes to WCMD_SETBoris Brezillon
[ Upstream commit 732774437ae01d9882e60314e303898e63c7f038 ] The opcodes used by the controller when doing batched page prog should be written in NFC_REG_WCMD_SET not FC_REG_RCMD_SET. Luckily, the default NFC_REG_WCMD_SET value matches the one we set in the driver which explains why we didn't notice the problem. Fixes: 614049a8d904 ("mtd: nand: sunxi: add support for DMA assisted operations") Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-11-25mtd: rawnand: sh_flctl: Use proper enum for flctl_dma_fifo0_transferNathan Chancellor
[ Upstream commit e2bfa4ca23d9b5a7bdfcf21319fad9b59e38a05c ] Clang warns when one enumerated type is converted implicitly to another: drivers/mtd/nand/raw/sh_flctl.c:483:46: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_DEV_TO_MEM) > 0) ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~ drivers/mtd/nand/raw/sh_flctl.c:542:46: warning: implicit conversion from enumeration type 'enum dma_transfer_direction' to different enumeration type 'enum dma_data_direction' [-Wenum-conversion] flctl_dma_fifo0_transfer(flctl, buf, rlen, DMA_MEM_TO_DEV) > 0) ~~~~~~~~~~~~~~~~~~~~~~~~^~~~~~~~~~~~~~ 2 warnings generated. Use the proper enums from dma_data_direction to satisfy Clang. DMA_MEM_TO_DEV = DMA_TO_DEVICE = 1 DMA_DEV_TO_MEM = DMA_FROM_DEVICE = 2 Reported-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-09-21mtd: rawnand: mtk: Fix wrongly assigned OOB buffer pointer issueXiaolei Li
commit 336d4b138be2dad372b67a2388e42805c48aaa38 upstream. One main goal of the function mtk_nfc_update_ecc_stats is to check whether sectors are all empty. If they are empty, set these sectors's data buffer and OOB buffer as 0xff. But now, the sector OOB buffer pointer is wrongly assigned. We always do memset from sector 0. To fix this issue, pass start sector number to make OOB buffer pointer be properly assigned. Fixes: 1d6b1e464950 ("mtd: mediatek: driver for MTK Smart Device") Signed-off-by: Xiaolei Li <xiaolei.li@mediatek.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-03-28Merge remote-tracking branch 'remotes/fslc/4.9-2.3.x-imx' into ↵Colibri-iMX7_LXDE-Image_2.8b6.184-20190401Colibri-iMX6_LXDE-Image_2.8b6.184-20190401Colibri-iMX6ULL_LXDE-Image_2.8b6.184-20190401Apalis-iMX6_LXDE-Image_2.8b6.184-20190401Marcel Ziswiler
toradex_4.9-2.3.x-imx-next
2019-03-28Merge tag 'v4.9.166' into 4.9-2.3.x-imxMarcel Ziswiler
This is the 4.9.166 stable release
2019-02-15mtd: rawnand: gpmi: fix MX28 bus master lockup problemMartin Kepplinger
commit d5d27fd9826b59979b184ec288e4812abac0e988 upstream. Disable BCH soft reset according to MX23 erratum #2847 ("BCH soft reset may cause bus master lock up") for MX28 too. It has the same problem. Observed problem: once per 100,000+ MX28 reboots NAND read failed on DMA timeout errors: [ 1.770823] UBI: attaching mtd3 to ubi0 [ 2.768088] gpmi_nand: DMA timeout, last DMA :1 [ 3.958087] gpmi_nand: BCH timeout, last DMA :1 [ 4.156033] gpmi_nand: Error in ECC-based read: -110 [ 4.161136] UBI warning: ubi_io_read: error -110 while reading 64 bytes from PEB 0:0, read only 0 bytes, retry [ 4.171283] step 1 error [ 4.173846] gpmi_nand: Chip: 0, Error -1 Without BCH soft reset we successfully executed 1,000,000 MX28 reboots. I have a quote from NXP regarding this problem, from July 18th 2016: "As the i.MX23 and i.MX28 are of the same generation, they share many characteristics. Unfortunately, also the erratas may be shared. In case of the documented erratas and the workarounds, you can also apply the workaround solution of one device on the other one. This have been reported, but I’m afraid that there are not an estimated date for updating the Errata documents. Please accept our apologies for any inconveniences this may cause." Fixes: 6f2a6a52560a ("mtd: nand: gpmi: reset BCH earlier, too, to avoid NAND startup problems") Cc: stable@vger.kernel.org Signed-off-by: Manfred Schlaegl <manfred.schlaegl@ginzinger.com> Signed-off-by: Martin Kepplinger <martin.kepplinger@ginzinger.com> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Fabio Estevam <festevam@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Signed-off-by: Boris Brezillon <bbrezillon@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-27Revert "MLK-16769-5: mtd: gpmi-nand runtime pm code change"Marcel Ziswiler
This reverts commit 6df9c073cb10a0f10d2fc2bea28f8133b5a89a66. This fixes gpmi-nand being defunct on i.MX 6ULL and i.MX 7S/D just hanging the ubifs background task during DMA. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Philippe Schenker <philippe.schenker@toradex.com>
2018-12-24mtd: gpmi: fsl,legacy-bch-geometry independent of nand-on-flash-bbtMax Krummenacher
The device tree property fsl,legacy-bch-geometry was only evaluated when nand-on-flash-bbt was also defined. This looks wrong. In mainline (as of 4.12) fsl,legacy-bch-geometry doesn't exist, its functionality seems to be taken over by the fsl,use-minimum-ecc property and it is used independent of nand-on-flash-bbt. The move of code gets also rid of the following compiler warning: drivers/mtd/nand/gpmi-nand/gpmi-nand.c:2274:2: warning: this 'if' clause does not guard... [-Wmisleading-indentation] if (of_property_read_bool(this->dev->of_node, ^~ drivers/mtd/nand/gpmi-nand/gpmi-nand.c:2278:3: note: ...this statement, but the latter is misleadingly indented as if it is guarded by the 'if' if (of_property_read_bool(this->dev->of_node, ^~ Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Stefan Agner <stefan.agner@toradex.com> (cherry picked from commit c8f0033be80ccb23230b6b572c328d1c02e4ad04)
2018-12-13mtd: rawnand: qcom: Namespace prefix some commandsOlof Johansson
[ Upstream commit 33bf5519ae5dd356b182a94e3622f42860274a38 ] PAGE_READ is used by RISC-V arch code included through mm headers, and it makes sense to bring in a prefix on these in the driver. drivers/mtd/nand/raw/qcom_nandc.c:153: warning: "PAGE_READ" redefined #define PAGE_READ 0x2 In file included from include/linux/memremap.h:7, from include/linux/mm.h:27, from include/linux/scatterlist.h:8, from include/linux/dma-mapping.h:11, from drivers/mtd/nand/raw/qcom_nandc.c:17: arch/riscv/include/asm/pgtable.h:48: note: this is the location of the previous definition Caught by riscv allmodconfig. Signed-off-by: Olof Johansson <olof@lixom.net> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2018-08-24MLK-16769-5: mtd: gpmi-nand runtime pm code changeHan Xu
acquire/release dma in runtime pm resume/suspend to proper get/put dma resources. BuildInfo: - SCFW 60e110f9, IMX-MKIMAGE e131af10, ATF - U-Boot 2017.03-imx_4.9.51_8qm_beta1_8qxp_alpha+gfcc9bdc Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-16243: mtd: gpmi: enable the EDO mode for i.MX8Han Xu
Enable the EDO mode on i.MX8 platforms for better performance. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-16089: mtd: gpmi-nand: calculate the correct free oob space for large ↵Han Xu
oob layout setting for the large oob layout setting, need to calculate the correct free oob space. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-15284-3: mtd: nand: gpmi-nand: support NAND on i.MX8QXPHan Xu
Enable the NAND support on i.MX8QXP Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-14388 mtd: gpmi: remove direct mtd->priv accessesOctavian Purdila
mtd->priv is no longer pointing to the struct nand_chip it is attached to. Replace those accesses by mtd_to_nand() calls. Signed-off-by: Octavian Purdila <octavian.purdila@nxp.com>
2018-08-24MLK-12684-2: mtd: gpmi: add NAND supportHan Xu
support NAND on imx6ull Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-12622: mtd: gpmi: fix the issue in legacy bch supportHan Xu
missed the brackets for bch legacy support, which leads the large oob nand bch setting to wrong path. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-12601: mtd: gpmi: provide the option to use legacy bch geometryHan Xu
Provide an option in DT to use legacy bch geometry, which compatible with the 3.10 kernel bch setting. To enable the feature, adding "fsl,legacy-bch-geometry" under gpmi-nand node. NOTICE: The feature must be enabled/disabled in both u-boot and kernel. Conflicts: drivers/mtd/nand/gpmi-nand/gpmi-nand.h Signed-off-by: Han Xu <han.xu@nxp.com> (cherry picked from commit 4d28b1693905526558892d40525763e6bc4469e4)
2018-08-24MLK-12449: mtd: gpmi: fix integer overflow issueHan Xu
fix the potential integer overflow issue found by coverify. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-12395: mtd: gpmi: add debugfs flag to indicate NAND driver use new raw ↵Han Xu
access mode For backward compatibility, kobs-ng need to know if the driver use legacy raw mode or new bch layout raw mode, add a new flag in debugfs to indicate the raw access mode. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-12394-2: mtd: gpmi: update NAND new raw page access functionsHan Xu
support the bch layout with dedicate ecc for meta Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-12394-1: Revert "MLK-12309: mtd: gpmi: workaround for kernel 4.1 NAND boot"Han Xu
This reverts commit 76babd7d075c9c22a27e6bc272bb57b6327cfbd3. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-12309: mtd: gpmi: workaround for kernel 4.1 NAND bootHan Xu
new implementation of GPMI NAND raw access functions was added in kernel 4.1 which changes the way from writing data in mirror mode to writing data with BCH layout mode. New implementation can help third party tools to analysis the data since all data were written in same layout, with or without ECC, but this implementation doesn't work for NAND boot. Kobs-ng, the tool for NAND boot will create the boot configuration data for each specific platform and need to write the data to NAND in mirror mode. In this workaround, we will keep using the previous raw NAND access function to fix the issue. Signed-off-by: Han Xu <han.xu@nxp.com>
2018-08-24MLK-11949 mtd: gpmi: fix the typo in .bbm_in_data_chunk()Fugang Duan
Fix the typo in when check bch geometry ecc chunk0 and chunkn size. Signed-off-by: Fugang Duan <B38611@freescale.com>
2018-08-24MLK-11751: mtd: gpmi: add empty sentinel entry at the end of of_device_id tableHan Xu
add an empty sentinel entry to avoid the struct of_device_id is not terminated with a NULL entry issue. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit 2b1ce5ec442dde8801b6b2d059d22f5dce7c9c76)
2018-08-24MLK-11747: mtd: gpmi: save bch geometry setting only in initial stageHan Xu
fix the bch setting issue when system suspend/resume, the bch geometry only need to be saved to debugfs in driver initial stage Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit 3b4f7178854e428fb5ef08d554b13abe4f27c533)
2018-08-24MLK-11720: mtd: gpmi: change the erase threshold for mx6qp,mx6ul and mx7dHan Xu
The erase threshold should be set to ecc_strength for these platforms. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit f46d113a02f5375c38fc9aba88c587fd672a30c4)
2018-08-24MLK-11719-4: mtd: gpmi: change the BCH layout setting for large oob NANDHan Xu
The cod change updated the NAND driver BCH ECC layout algorithm to support large oob size NAND chips(oob > 1024 bytes) and proposed a new way to set ECC layout. Current implementation requires each chunk size larger than oob size so the bad block marker (BBM) can be guaranteed located in data chunk. The ECC layout always using the unbalanced layout(Ecc for both meta and Data0 chunk), but for the NAND chips with oob larger than 1k, the driver cannot support because BCH doesn’t support GF 15 for 2K chunk. The change keeps the data chunk no larger than 1k and adjust the ECC strength or ECC layout to locate the BBM in data chunk. General idea for large oob NAND chips is 1.Try all ECC strength from the minimum value required by NAND spec to the maximum one that works, any ECC makes the BBM locate in data chunk can be chosen. 2.If none of them works, using separate ECC for meta, which will add one extra ecc with the same ECC strength as other data chunks. This extra ECC can guarantee BBM located in data chunk, of course, we need to check if oob can afford it. Previous code has two methods for ECC layout setting, the legacy_set_geometry and set_geometry_by_ecc_info, the difference between these two methods is, legacy_set_geometry set the chunk size larger chan oob size and then set the maximum ECC strength that oob can afford. While the set_geometry_by_ecc_info set chunk size and ECC strength according to NAND spec. It has been proved that the first method cannot provide safe ECC strength for some modern NAND chips, so in current code, 1. Driver read NAND parameters first and then chose the proper ECC layout setting method. 2. If the oob is large or NAND required data chunk larger than oob size, chose set_geometry_for_large_oob, otherwise use set_geometry_by_ecc_info 3. legacy_set_geometry only used for some NAND chips does not contains necessary information. So this is only a backup plan, it is NOT recommended to use these NAND chips. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit 78e8beff734adb72185405ae2cb55e0097eb96cb)
2018-08-24MLK-11719-2: mtd: gpmi: save the bch layout setting in debugfsHan Xu
save the bch layout setting in debugfs for the upper layer applications, such as kobs-ng. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit 8a373e796c21f4e9b714039e5f0b7d9388ef5a32)
2018-08-24MLK-11555: mtd: nand: i.MX6UL supports bitflip detectionHan Xu
i.MX6UL also has the DEBUG1 register which can be used for bitflip detection for erased page. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit 8df8d10edc8909e19e60f0cc1dd65c1fe706ab67)
2018-08-23MLK-11336: mtd: nand: enable LPSR for GPMI NANDHan Xu
The LPSR turns off the power for IOMUX when suspending so restore the IOMUX when resuming in GPMI NAND driver. The function was not tested yet since NAND only supported on 19x19 LPDDR board. Signed-off-by: Han Xu <b45815@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> (cherry picked from commit: b0375f42a27044667082e53449e534b265d7a029)
2018-08-23MLK-11236 mtd: gpmi-nand: Fix nand runtime PM issueYe.Li
Because of the delay of auto suspend, the nand clocks are delayed to disable when calling the clk_set_rate. This causes the clk_set_rate failed on some platforms like 6q/6qp, and finally lead the NAND not working. Signed-off-by: Ye.Li <Ye.Li@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> (cherry picked from commit: 1334dd236d4401d6635accb6c8472d8a5ed088b5)
2018-08-23MLK-11133: mtd:gpmi: support runtime pm for gpmi nandHan Xu
support runtime PM on gpmi nand to save the cost to enable/disable clock in each NAND IO. The driver also claim high-freq bus when resumed. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit: 5b72b3388d1399420f3b49a0ca937ca5792e2d7d)
2018-08-23MLK-11044: mtd:nand: enable per1_bch for NAND on all i.MX6 platformHan Xu
The per1_bch was moved in patch below since it was never mentioned in any GPMI/BCH/APBH documents, but actually it is necessary for BCH module since BCH use AXI bus transfer data through fabric, need to enable this clock for BCH at fabric side. This patch enabled this clock for all i.MX6 platforms and has been tested on i.MX6Q/i.MX6QP/i.MX6SX and i.MX6UL. commit 9aa0fb0a606a583e2b6e19892ac2cab1b0e726c4 Author: Han Xu <b45815@freescale.com> Date: Thu May 28 16:49:18 2015 -0500 mtd: nand: support NAND on i.MX6UL support i.MX6UL GPMI NAND driver and removed the unecessary clock per1_bch. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit: 53c5964a104f71c061d95bd98599fbf050644ddb)
2018-08-23MLK-10985: mtd: nand: support NAND on i.MX6ULHan Xu
support i.MX6UL GPMI NAND driver and removed the unecessary clock per1_bch. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit: 9aa0fb0a606a583e2b6e19892ac2cab1b0e726c4)
2018-08-23MLK-10664: mtd: nand: change the maxchips for i.MX7DHan Xu
change the maximum chips for i.MX7D, this part was missed when adding i.MX7D NAND support. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit: 313d4d5e701dd6a28dc7d2bd84094b8fbdb7f9ca)
2018-08-23MLK-10471: mtd: nand: use maximum ecc strength controller can supportHan Xu
when the maximum ecc NAND oob can afford exceed the ecc strength controller can provide, use the maximum ecc strength controller can support instead of the minimum ecc NAND spec required. kobs-ng will also use the same ecc strength to align with kernel to make sure all NAND chips can boot. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit: 958a2c5b07524f3502cfdefe66724a9a1f8ad608)
2018-08-23MLK-10657: mtd: NAND: correct bitflip for erased NAND pageHan Xu
i.MX6QP and i.MX7D BCH module integrated a new feature to detect the bitflip number for erased NAND page. So for these two platform, set the erase threshold to gf/2 and if bitflip detected, GPMI driver will correct the data to all 0xFF. Also updated the imx6qp dts file to ditinguish the GPMI module for i.MX6Q with the one for i.MX6QP. Signed-off-by: Han Xu <b45815@freescale.com> (cherry picked from commit: 4302ab74a301626e7e0b9cb398a23b2e488cfa6b)
2018-08-23MLK-10521-2: mtd: gpmi: Add NAND support on i.MX7DHan Xu
Support NAND on i.MX7D Signed-off-by: Han Xu <b45815@freescale.com> Signed-off-by: Fugang Duan <B38611@freescale.com> (cherry picked and merged from commit: 39af0df85dcbcb2ebd677ec5d2a2a4e6a61ed826)
2018-08-15mtd: nand: qcom: Add a NULL check for devm_kasprintf()Fabio Estevam
commit 069f05346d01e7298939f16533953cdf52370be3 upstream. devm_kasprintf() may fail, so we should better add a NULL check and propagate an error on failure. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-08-03mtd: rawnand: fsl_ifc: fix FSL NAND driver to read all ONFI parameter pagesJane Wan
[ Upstream commit a75bbe71a27875fdc61cde1af6d799037cef6bed ] Per ONFI specification (Rev. 4.0), if the CRC of the first parameter page read is not valid, the host should read redundant parameter page copies. Fix FSL NAND driver to read the two redundant copies which are mandatory in the specification. Signed-off-by: Jane Wan <Jane.Wan@nokia.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-07-11mtd: rawnand: mxc: set spare area size register explicitlyMartin Kaiser
commit 3f77f244d8ec28e3a0a81240ffac7d626390060c upstream. The v21 version of the NAND flash controller contains a Spare Area Size Register (SPAS) at offset 0x10. Its setting defaults to the maximum spare area size of 218 bytes. The size that is set in this register is used by the controller when it calculates the ECC bytes internally in hardware. Usually, this register is updated from settings in the IIM fuses when the system is booting from NAND flash. For other boot media, however, the SPAS register remains at the default setting, which may not work for the particular flash chip on the board. The same goes for flash chips whose configuration cannot be set in the IIM fuses (e.g. chips with 2k sector size and 128 bytes spare area size can't be configured in the IIM fuses on imx25 systems). Set the SPAS register explicitly during the preset operation. Derive the register value from mtd->oobsize that was detected during probe by decoding the flash chip's ID bytes. While at it, rename the define for the spare area register's offset to NFC_V21_RSLTSPARE_AREA. The register at offset 0x10 on v1 controllers is different from the register on v21 controllers. Fixes: d484018 ("mtd: mxc_nand: set NFC registers after reset") Cc: stable@vger.kernel.org Signed-off-by: Martin Kaiser <martin@kaiser.cx> Reviewed-by: Sascha Hauer <s.hauer@pengutronix.de> Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-13mtd: nand: check ecc->total sanity in nand_scan_tailMasahiro Yamada
[ Upstream commit 79e0348c4e24fd1affdcf055e0269755580e0fcc ] Drivers are supposed to set correct ecc->{size,strength,bytes} before calling nand_scan_tail(), but it does not complain about ecc->total bigger than oobsize. In this case, chip->scan_bbt() crashes due to memory corruption, but it is hard to debug. It would be kind to fail it earlier with a clear message. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-04-13mtd: nand: gpmi: Fix gpmi_nand_init() error pathBoris Brezillon
[ Upstream commit 4d02423e9afe6c46142ce98bbcaf5167316dbfbf ] The GPMI driver is wrongly assuming that nand_release() can safely be called on an uninitialized/unregistered NAND device. Add a new err_nand_cleanup label in the error path and only execute if nand_scan_tail() succeeded. Note that we now call nand_cleanup() instead of nand_release() (nand_release() is actually grouping the mtd_device_unregister() and nand_cleanup() in one call) because there's no point in trying to unregister a device that has never been registered. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Han Xu <han.xu@nxp.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-03-28mtd: nand: fsl_ifc: Read ECCSTAT0 and ECCSTAT1 registers for IFC 2.0Jagdish Gediya
commit 6b00c35138b404be98b85f4a703be594cbed501c upstream. Due to missing information in Hardware manual, current implementation doesn't read ECCSTAT0 and ECCSTAT1 registers for IFC 2.0. Add support to read ECCSTAT0 and ECCSTAT1 registers during ecccheck for IFC 2.0. Fixes: 656441478ed5 ("mtd: nand: ifc: Fix location of eccstat registers for IFC V1.0") Cc: stable@vger.kernel.org # v3.18+ Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-03-28mtd: nand: fsl_ifc: Fix eccstat array overflow for IFC ver >= 2.0.0Jagdish Gediya
commit 843c3a59997f18060848b8632607dd04781b52d1 upstream. Number of ECC status registers i.e. (ECCSTATx) has been increased in IFC version 2.0.0 due to increase in SRAM size. This is causing eccstat array to over flow. So, replace eccstat array with u32 variable to make it fail-safe and independent of number of ECC status registers or SRAM size. Fixes: bccb06c353af ("mtd: nand: ifc: update bufnum mask for ver >= 2.0.0") Cc: stable@vger.kernel.org # 3.18+ Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-03-28mtd: nand: fsl_ifc: Fix nand waitfunc return valueJagdish Gediya
commit fa8e6d58c5bc260f4369c6699683d69695daed0a upstream. As per the IFC hardware manual, Most significant 2 bytes in nand_fsr register are the outcome of NAND READ STATUS command. So status value need to be shifted and aligned as per the nand framework requirement. Fixes: 82771882d960 ("NAND Machine support for Integrated Flash Controller") Cc: stable@vger.kernel.org # v3.18+ Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-03-22mtd: nand: ifc: update bufnum mask for ver >= 2.0.0Jagdish Gediya
[ Upstream commit bccb06c353af3764ca86d9da47652458e6c2eb41 ] Bufnum mask is used to calculate page position in the internal SRAM. As IFC version 2.0.0 has 16KB of internal SRAM as compared to older versions which had 8KB. Hence bufnum mask needs to be updated. Signed-off-by: Jagdish Gediya <jagdish.gediya@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-03-22mtd: nand: fix interpretation of NAND_CMD_NONE in nand_command[_lp]()Miquel Raynal
[ Upstream commit df467899da0b71465760b4e35127bce837244eee ] Some drivers (like nand_hynix.c) call ->cmdfunc() with NAND_CMD_NONE and a column address and expect the controller to only send address cycles. Right now, the default ->cmdfunc() implementations provided by the core do not filter out the command cycle in this case and forwards the request to the controller driver through the ->cmd_ctrl() method. The thing is, NAND controller drivers can get this wrong and send a command cycle with a NAND_CMD_NONE opcode and since NAND_CMD_NONE is -1, and the command field is usually casted to an u8, we end up sending the 0xFF command which is actually a RESET operation. Add conditions in nand_command[_lp]() functions to sending the initial command cycle when command == NAND_CMD_NONE. Signed-off-by: Miquel Raynal <miquel.raynal@free-electrons.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Sasha Levin <alexander.levin@microsoft.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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