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2013-04-17Merge remote-tracking branch 'fsl-linux-sdk/imx_3.0.35_4.0.0' into ↵jb4.2.2_1.0.0-gaguoyin.chen
imx_3.0.35_android
2013-04-15ENGR00258733 WEIM-NOR: mtd: cfi_cmdset_0002: Do not release the mutex lockHuang Shijie
The NOR may suffers a write-buffer timeout during the bonnie++/ubifs stress test. This patch is just a workaround to fix this issue. With this patch, the read/write/erase will do in the synchronous way. Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-11mtd: fix recovery after failed write-buffer operation in cfi_cmdset_0002.cHarald Nordgard-Hansen
When working on a problem with some flash chips that lock up during write-buffer operations, I think there may be a bug in the linux handling of chips using cfi_cmdset_0002.c. The datasheets I have found for a number of these chips all specify that when aborting a write-buffer command, it is not enough to use the standard reset. Rather a "write-to-buffer-reset command" is needed. This command is quite similar for all chips, the main variance seem to be if the final 0xF0 can go to any address or must go to addr_unlock1. The bug is then in the recovery handling when timing out at the end of do_write_buffer, where using the normal reset command is not sufficient. Without this change, if the write-buffer command fails then any following operations on the flash also fail. Signed-off-by: Harald Nordgard-Hansen <hhansen@pvv.org> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-11mtd: cfi_cmdset_0002: Micron M29EW bugfixes as per TN-13-07Gerlando Falauto
Fix the following issues with Micron's (formerly Numonyx) M29EW NOR flash chips, as documented on TN-13-07: - Correcting Erase Suspend Hang Ups (page 20) - Resolving the Delay After Resume Issue (page 22) Signed-off-by: Gerlando Falauto <gerlando.falauto@keymile.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-11mtd: cfi_cmdset_0002: Slight cleanup of fixup messagesDavid Woodhouse
These should be semicolons, not commas. Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-11mtd: add fixup for S29NS512P NOR flash.Javier Martin
Spansion S29NS512P flash uses a 16bit transfer to report number of sectors instead of two 8bit accesses as CFI specifies. Artem: remove warning message which said that we are applying the fixup - no need to scary the user unnecessarily. Signed-off-by: Javier Martin <javier.martin@vista-silicon.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-11mtd: chips: cfi_cmdset_0002: Match ENABLE_VPP()/DISABLE_VPP() callsPaul Parsons
This patch is part of a set which fixes unnecessary flash erase and write errors resulting from the MTD CFI driver turning off vpp while an erase is in progress. This patch ensures that only those flash operations which call ENABLE_VPP() can then call DISABLE_VPP(). Other operations should never call DISABLE_VPP(). Signed-off-by: Paul Parsons <lost.distance@yahoo.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-11mtd: cfi: AMD/Fujitsu compatibles: add panic write supportIra W. Snyder
This allows the mtdoops driver to work on flash chips using the AMD/Fujitsu compatible command set. As the code comments note, the locks used throughout the normal code paths in the driver are ignored, so that the chance of writing out the kernel's last messages are maximized. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-11mtd: cleanup style on pr_debug messagesBrian Norris
Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-11mtd: replace DEBUG() with pr_debug()Brian Norris
Start moving away from the MTD_DEBUG_LEVEL messages. The dynamic debugging feature is a generic kernel feature that provides more flexibility. (See Documentation/dynamic-debug-howto.txt) Also fix some punctuation, indentation, and capitalization that went along with the affected lines. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-07Merge remote-tracking branch 'fsl-linux-sdk/imx_3.0.35_4.0.0' into ↵guoyin.chen
imx_3.0.35_android Conflicts: arch/arm/mach-mx6/board-mx6q_hdmidongle.c drivers/input/touchscreen/egalax_ts.c
2013-04-03ENGR00256315-5 mtd: cfi_cmdset_0002: print @adr when write timeout occursHuang Shijie
Print out the @adr when the write timeout occurs. This is useful to check if the write timeouts occur at the same address. Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-04-03ENGR00256315-2 Revert "ENGR00244769-1 [NOR FLASH]-Improve WEIM NOR speed"Huang Shijie
This reverts commit 4020b38fe2f0283af7630dbed28ed32d64118a83. After apply these two patches, we can not pass the stress test. So revert these two patches. Signed-off-by: Huang Shijie <b32955@freescale.com>
2013-02-27Merge remote-tracking branch 'fsl-linux-sdk/imx_3.0.35' into imx_3.0.35_androidguoyin.chen
Conflicts: arch/arm/mach-mx6/Makefile arch/arm/mach-mx6/board-mx6dl_hdmidongle.h arch/arm/mach-mx6/board-mx6q_hdmidongle.c arch/arm/mach-mx6/board-mx6q_hdmidongle.h arch/arm/mach-mx6/board-mx6q_sabreauto.c arch/arm/mach-mx6/board-mx6q_sabrelite.c drivers/media/video/mxc/capture/csi_v4l2_capture.c drivers/media/video/mxc/capture/ipu_csi_enc.c drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_compiler.h drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_device.c drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c drivers/mxc/vpu/mxc_vpu.c drivers/usb/gadget/arcotg_udc.c drivers/video/mxc/mxc_ipuv3_fb.c drivers/video/mxc_hdmi.c include/linux/mxcfb.h sound/soc/imx/imx-wm8962.c
2013-02-14ENGR00244769-1 [NOR FLASH]-Improve WEIM NOR speedOliver Brown
Increase the NOR flash read speed. Added weimnor driver to use cached (and page mode) reads. Signed-off-by: Oliver Brown <oliver.brown@freescale.com>
2013-01-17ENGR00240571 mtd: gpmi: fix the compiler warningHuang Shijie
The current code may print out the following warning: .................................................................... drivers/mtd/nand/gpmi-nand/gpmi-lib.c: In function gpmi_begin: drivers/mtd/nand/gpmi-nand/gpmi-lib.c:1163: warning: hw.use_half_periods may be used uninitialized in this function drivers/mtd/nand/gpmi-nand/gpmi-lib.c:1163: warning: hw.sample_delay_factor may be used uninitialized in this function .................................................................... this patch fixes it. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-11-08Merge remote branch 'fsl-linux-sdk/imx_3.0.35' into imx_3.0.35_androidXinyu Chen
Conflicts: arch/arm/plat-mxc/dvfs_core.c drivers/input/keyboard/mpr121.c drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c include/linux/i2c/mpr.h sound/soc/imx/imx-wm8962.c
2012-11-01ENGR00232005 mtd: fix the overflow of big mtd partitionsHuang Shijie
When the kernel parses the following cmdline #mtdparts=gpmi-nand:16m(boot),16m(kernel),1g(home),4g(test),-(usr) for a big nand chip Micron MT29F64G08AFAAAWP(8GB), we got the following wrong result: ............................................. "mtd: partition size too small (0)" ............................................. We can not get any partition. The "4g(test)" partition triggers a overflow of the "size". The memparse() returns 4g to the "size", but the size is "unsigned long" type, so a overflow occurs, the "size" becomes zero in the end. This patch changes the "size"/"offset" to "unsigned long long" type, and replaces the UINT_MAX with ULLONG_MAX for macros SIZE_REMAINING and OFFSET_CONTINUOUS. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-11-01mtd: support ONFI multi lun NANDMatthieu CASTET
With onfi a flash is organized into one or more logical units (LUNs). A" logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-11-01mtd: nand_flash_detect_onfi propagate busw infoMatthieu CASTET
there is a bug in nand_flash_detect_onfi, busw need to be passed by pointer to return it. Signed-off-by: Matthieu CASTET <matthieu.castet@parrot.com> Acked-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-10-15Merge remote branch 'fsl-linux-sdk/imx_3.0.35' into imx_3.0.35_androidXinyu Chen
2012-10-12ENGR00227835 imx6q: gpmi: fix the warning when no NAND chip exitsHuang Shijie
If there is no nand chip in the board, the kernel will prints out the following warning message: ------------[ cut here ]------------ WARNING: at arch/arm/plat-mxc/clock.c:63 clk_disable+0x48/0x90() clock enable/disable mismatch! clk apbh_dma_clk Modules linked in: [<80044f48>] (unwind_backtrace+0x0/0xfc) from [<80070ac0>] (warn_slowpath_common+0x4c/0x64) [<80070ac0>] (warn_slowpath_common+0x4c/0x64) from [<80070b6c>] (warn_slowpath_fmt+0x30/0x40) [<80070b6c>] (warn_slowpath_fmt+0x30/0x40) from [<8005ee60>] (clk_disable+0x48/0x90) [<8005ee60>] (clk_disable+0x48/0x90) from [<80255e48>] (dma_chan_put+0x4c/0x50) [<80255e48>] (dma_chan_put+0x4c/0x50) from [<80255f18>] (dma_release_channel+0x24/0x94) [<80255f18>] (dma_release_channel+0x24/0x94) from [<802ad8ec>] (release_resources+0x58/0x6c) [<802ad8ec>] (release_resources+0x58/0x6c) from [<80445964>] (gpmi_nand_probe+0x44c/0x4ec) [<80445964>] (gpmi_nand_probe+0x44c/0x4ec) from [<80281868>] (platform_drv_probe+0x18/0x1c) [<80281868>] (platform_drv_probe+0x18/0x1c) from [<80280590>] (driver_probe_device+0x98/0x1a4) [<80280590>] (driver_probe_device+0x98/0x1a4) from [<80280728>] (__driver_attach+0x8c/0x90) [<80280728>] (__driver_attach+0x8c/0x90) from [<8027fdd0>] (bus_for_each_dev+0x60/0x8c) [<8027fdd0>] (bus_for_each_dev+0x60/0x8c) from [<8027f75c>] (bus_add_driver+0x184/0x25c) [<8027f75c>] (bus_add_driver+0x184/0x25c) from [<80280d1c>] (driver_register+0x78/0x13c) [<80280d1c>] (driver_register+0x78/0x13c) from [<80022d80>] (gpmi_nand_init+0xc/0x3c) [<80022d80>] (gpmi_nand_init+0xc/0x3c) from [<80039478>] (do_one_initcall+0x30/0x16c) [<80039478>] (do_one_initcall+0x30/0x16c) from [<80008410>] (kernel_init+0x98/0x144) [<80008410>] (kernel_init+0x98/0x144) from [<8003ffb4>] (kernel_thread_exit+0x0/0x8) ---[ end trace c28d32057fe33a29 ]--- This mxs_dma_clk's usecount is not correctly changed which causes the kernel shows this warning. This patch adds proper clk_disable_unprepare/clk_prepare_enable in the mxs-dma driver to balance the mxs_dma_clk's usecount. Also put the mxs_dma_clk when the gpmi exits. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-10-09Merge remote branch 'fsl-linux-sdk/imx_3.0.35' into imx_3.0.35_androidXinyu Chen
Conflicts: arch/arm/configs/imx6s_updater_defconfig arch/arm/include/asm/hardware/coresight.h arch/arm/kernel/etm.c arch/arm/mach-mx6/board-mx6q_sabresd.c arch/arm/mach-mx6/cpu_op-mx6.c arch/arm/mach-mx6/mx6_suspend.S arch/arm/mach-mx6/pm.c arch/arm/mach-mx6/system.c arch/arm/plat-mxc/cpufreq.c drivers/mfd/mxc-hdmi-core.c drivers/power/sabresd_battery.c drivers/video/mxc/mxc_ipuv3_fb.c drivers/video/mxc_hdmi.c include/linux/mfd/mxc-hdmi-core.h
2012-09-14Merge commit '9bba02d47489f2455bae09815b779bdc494efabb' into imx_3.0.35_androidXinyu Chen
2012-09-13ENGR00223349-4 gpmi: enable the EDO support for mx6qHuang Shijie
Enable the EDO mode for mx6q. The following is the test result with the same nand chip (Micron MT29F32G08QAA) in mode 4: The test result without enable the EDO mode: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 209715200, eraseblock size 524288, page size 4096, count of eraseblocks 400, pages per eraseblock 128, OOB size 218 mtd_speedtest: scanned 400 eraseblocks, 6 are bad mtd_speedtest: testing eraseblock write speed mtd_speedtest: eraseblock write speed is 1945 KiB/s mtd_speedtest: testing eraseblock read speed mtd_speedtest: eraseblock read speed is 3384 KiB/s mtd_speedtest: testing page write speed mtd_speedtest: page write speed is 1841 KiB/s mtd_speedtest: testing page read speed mtd_speedtest: page read speed is 3136 KiB/s mtd_speedtest: testing 2 page write speed mtd_speedtest: 2 page write speed is 1853 KiB/s mtd_speedtest: testing 2 page read speed mtd_speedtest: 2 page read speed is 3164 KiB/s mtd_speedtest: Testing erase speed mtd_speedtest: erase speed is 145441 KiB/s mtd_speedtest: Testing 2x multi-block erase speed mtd_speedtest: 2x multi-block erase speed is 146711 KiB/s mtd_speedtest: Testing 4x multi-block erase speed mtd_speedtest: 4x multi-block erase speed is 147139 KiB/s mtd_speedtest: Testing 8x multi-block erase speed mtd_speedtest: 8x multi-block erase speed is 147786 KiB/s mtd_speedtest: Testing 16x multi-block erase speed mtd_speedtest: 16x multi-block erase speed is 147569 KiB/s mtd_speedtest: Testing 32x multi-block erase speed mtd_speedtest: 32x multi-block erase speed is 147677 KiB/s mtd_speedtest: Testing 64x multi-block erase speed mtd_speedtest: 64x multi-block erase speed is 147677 KiB/s mtd_speedtest: finished ================================================= The test result enable the EDO mode: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 209715200, eraseblock size 524288, page size 4096, count of eraseblocks 400, pages per eraseblock 128, OOB size 218 mtd_speedtest: scanned 400 eraseblocks, 6 are bad mtd_speedtest: testing eraseblock write speed mtd_speedtest: eraseblock write speed is 3733 KiB/s mtd_speedtest: testing eraseblock read speed mtd_speedtest: eraseblock read speed is 20413 KiB/s mtd_speedtest: testing page write speed mtd_speedtest: page write speed is 3603 KiB/s mtd_speedtest: testing page read speed mtd_speedtest: page read speed is 18966 KiB/s mtd_speedtest: testing 2 page write speed mtd_speedtest: 2 page write speed is 3668 KiB/s mtd_speedtest: testing 2 page read speed mtd_speedtest: 2 page read speed is 19686 KiB/s mtd_speedtest: Testing erase speed mtd_speedtest: erase speed is 146604 KiB/s mtd_speedtest: Testing 2x multi-block erase speed mtd_speedtest: 2x multi-block erase speed is 147354 KiB/s mtd_speedtest: Testing 4x multi-block erase speed mtd_speedtest: 4x multi-block erase speed is 147677 KiB/s mtd_speedtest: Testing 8x multi-block erase speed mtd_speedtest: 8x multi-block erase speed is 148002 KiB/s mtd_speedtest: Testing 16x multi-block erase speed mtd_speedtest: 16x multi-block erase speed is 147894 KiB/s mtd_speedtest: Testing 32x multi-block erase speed mtd_speedtest: 32x multi-block erase speed is 148329 KiB/s mtd_speedtest: Testing 64x multi-block erase speed mtd_speedtest: 64x multi-block erase speed is 148220 KiB/s mtd_speedtest: finished ================================================= We can see that there is 6 times performance improvement for reading when we enable the EDO mode. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-13ENGR00223349-3 gpmi: add a new field for HW_GPMI_CTRL1Huang Shijie
add the WRN_DLY_SEL field for HW_GPMI_CTRL1. This field is used as delay for gpmi write strobe. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-13ENGR00223349-2 gpmi: do not get the clock frequency in gpmi_begin()Huang Shijie
The current code will gets the clock frequency which is used by gpmi_nfc_compute_hardware_timing(). It makes the code a little mess. So move the `get clock frequency` code to the gpmi_nfc_compute_hardware_timing() itself. This makes the code tidy and clean. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-13ENGR00223349-1 gpmi: add a new field for HW_GPMI_TIMING1Huang Shijie
The gpmi_nfc_compute_hardware_timing{} should contains all the fields setting for gpmi timing registers. It already contains the fields for HW_GPMI_TIMING0 and HW_GPMI_CTRL1. So it is better to add a new field setting for HW_GPMI_TIMING1 in this data structure. This makes the code more clear in logic. This patch also changs some comments to make the code more readable. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-13ENGR00223349-4 gpmi: enable the EDO support for mx6qHuang Shijie
Enable the EDO mode for mx6q. The following is the test result with the same nand chip (Micron MT29F32G08QAA) in mode 4: The test result without enable the EDO mode: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 209715200, eraseblock size 524288, page size 4096, count of eraseblocks 400, pages per eraseblock 128, OOB size 218 mtd_speedtest: scanned 400 eraseblocks, 6 are bad mtd_speedtest: testing eraseblock write speed mtd_speedtest: eraseblock write speed is 1945 KiB/s mtd_speedtest: testing eraseblock read speed mtd_speedtest: eraseblock read speed is 3384 KiB/s mtd_speedtest: testing page write speed mtd_speedtest: page write speed is 1841 KiB/s mtd_speedtest: testing page read speed mtd_speedtest: page read speed is 3136 KiB/s mtd_speedtest: testing 2 page write speed mtd_speedtest: 2 page write speed is 1853 KiB/s mtd_speedtest: testing 2 page read speed mtd_speedtest: 2 page read speed is 3164 KiB/s mtd_speedtest: Testing erase speed mtd_speedtest: erase speed is 145441 KiB/s mtd_speedtest: Testing 2x multi-block erase speed mtd_speedtest: 2x multi-block erase speed is 146711 KiB/s mtd_speedtest: Testing 4x multi-block erase speed mtd_speedtest: 4x multi-block erase speed is 147139 KiB/s mtd_speedtest: Testing 8x multi-block erase speed mtd_speedtest: 8x multi-block erase speed is 147786 KiB/s mtd_speedtest: Testing 16x multi-block erase speed mtd_speedtest: 16x multi-block erase speed is 147569 KiB/s mtd_speedtest: Testing 32x multi-block erase speed mtd_speedtest: 32x multi-block erase speed is 147677 KiB/s mtd_speedtest: Testing 64x multi-block erase speed mtd_speedtest: 64x multi-block erase speed is 147677 KiB/s mtd_speedtest: finished ================================================= The test result enable the EDO mode: ================================================= mtd_speedtest: MTD device: 2 mtd_speedtest: MTD device size 209715200, eraseblock size 524288, page size 4096, count of eraseblocks 400, pages per eraseblock 128, OOB size 218 mtd_speedtest: scanned 400 eraseblocks, 6 are bad mtd_speedtest: testing eraseblock write speed mtd_speedtest: eraseblock write speed is 3733 KiB/s mtd_speedtest: testing eraseblock read speed mtd_speedtest: eraseblock read speed is 20413 KiB/s mtd_speedtest: testing page write speed mtd_speedtest: page write speed is 3603 KiB/s mtd_speedtest: testing page read speed mtd_speedtest: page read speed is 18966 KiB/s mtd_speedtest: testing 2 page write speed mtd_speedtest: 2 page write speed is 3668 KiB/s mtd_speedtest: testing 2 page read speed mtd_speedtest: 2 page read speed is 19686 KiB/s mtd_speedtest: Testing erase speed mtd_speedtest: erase speed is 146604 KiB/s mtd_speedtest: Testing 2x multi-block erase speed mtd_speedtest: 2x multi-block erase speed is 147354 KiB/s mtd_speedtest: Testing 4x multi-block erase speed mtd_speedtest: 4x multi-block erase speed is 147677 KiB/s mtd_speedtest: Testing 8x multi-block erase speed mtd_speedtest: 8x multi-block erase speed is 148002 KiB/s mtd_speedtest: Testing 16x multi-block erase speed mtd_speedtest: 16x multi-block erase speed is 147894 KiB/s mtd_speedtest: Testing 32x multi-block erase speed mtd_speedtest: 32x multi-block erase speed is 148329 KiB/s mtd_speedtest: Testing 64x multi-block erase speed mtd_speedtest: 64x multi-block erase speed is 148220 KiB/s mtd_speedtest: finished ================================================= We can see that there is 6 times performance improvement for reading when we enable the EDO mode. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-13ENGR00223349-3 gpmi: add a new field for HW_GPMI_CTRL1Huang Shijie
add the WRN_DLY_SEL field for HW_GPMI_CTRL1. This field is used as delay for gpmi write strobe. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-13ENGR00223349-2 gpmi: do not get the clock frequency in gpmi_begin()Huang Shijie
The current code will gets the clock frequency which is used by gpmi_nfc_compute_hardware_timing(). It makes the code a little mess. So move the `get clock frequency` code to the gpmi_nfc_compute_hardware_timing() itself. This makes the code tidy and clean. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-13ENGR00223349-1 gpmi: add a new field for HW_GPMI_TIMING1Huang Shijie
The gpmi_nfc_compute_hardware_timing{} should contains all the fields setting for gpmi timing registers. It already contains the fields for HW_GPMI_TIMING0 and HW_GPMI_CTRL1. So it is better to add a new field setting for HW_GPMI_TIMING1 in this data structure. This makes the code more clear in logic. This patch also changs some comments to make the code more readable. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-07mtd: gpmi-nand: fix read page when reading to vmalloced areaSascha Hauer
The gpmi-nand driver uses virt_addr_valid() to check whether a buffer is suitable for dma. If it's not, a driver allocated buffer is used instead. Then after a page read the driver allocated buffer must be copied to the user supplied buffer. This does not happen since commit 7725cc85932bd02dd12c23108e0ef748c551ccba. This patch fixes the issue. The bug is encountered with UBI which uses a vmalloced buffer for the volume table. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Tested-by: snijsure@grid-net.com Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-07mtd: gpmi-nand: utilize oob_requested parameterBrian Norris
Don't read OOB if the caller didn't request it. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Acked-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-09-07mtd: nand: pass proper 'oob_required' parameterHuang Shijie
We now have an interface for notifying the nand_ecc_ctrl functions when OOB data must be returned to the upper layers and when it may be left untouched. This patch fills in the 'oob_required' parameter properly from nand_do_{read,write}_ops. When utilized properly in the lower layers, this parameter can improve performance and/or reduce complexity for NAND HW and SW that can simply avoid transferring the OOB data. Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
2012-09-07mtd: nand: add 'oob_required' argument to NAND {read,write}_page interfacesHuang Shijie
New NAND controllers can perform read/write via HW engines which don't expose OOB data in their DMA mode. To reflect this, we should rework the nand_chip / nand_ecc_ctrl interfaces that assume that drivers will always read/write OOB data in the nand_chip.oob_poi buffer. A better interface includes a boolean argument that explicitly tells the callee when OOB data is requested by the calling layer (for reading/writing to/from nand_chip.oob_poi). This patch adds the 'oob_required' parameter to each relevant {read,write}_page interface; all 'oob_required' parameters are left unused for now. The next patch will set the parameter properly in the nand_base.c callers, and follow-up patches will make use of 'oob_required' in some of the callee functions. Note that currently, there is no harm in ignoring the 'oob_required' parameter and *always* utilizing nand_chip.oob_poi, but there can be performance/complexity/design benefits from avoiding filling oob_poi in the common case. I will try to implement this for some drivers which can be ported easily. Note: I couldn't compile-test all of these easily, as some had ARCH dependencies. [Huang Shijie: I remove the unused code for the other drivers.] [dwmw2: Merge later 1/0 vs. true/false cleanup] Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Shmulik Ladkani <shmulik.ladkani@gmail.com> Acked-by: Jiandong Zheng <jdzheng@broadcom.com> Acked-by: Mike Dunn <mikedunn@newsguy.com> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-07-25Merge remote branch 'fsl-linux-sdk/imx_3.0.35' into imx_3.0.35_androidXinyu Chen
Conflicts: arch/arm/configs/imx6_defconfig arch/arm/configs/imx6_updater_defconfig arch/arm/configs/imx6s_defconfig arch/arm/include/asm/dma-mapping.h arch/arm/kernel/smp.c arch/arm/mach-mx6/Kconfig arch/arm/mach-mx6/board-mx6dl_arm2.h arch/arm/mach-mx6/board-mx6dl_sabresd.h arch/arm/mach-mx6/board-mx6q_arm2.c arch/arm/mach-mx6/board-mx6q_arm2.h arch/arm/mach-mx6/board-mx6q_sabreauto.c arch/arm/mach-mx6/board-mx6q_sabreauto.h arch/arm/mach-mx6/board-mx6q_sabrelite.c arch/arm/mach-mx6/board-mx6q_sabresd.c arch/arm/mach-mx6/board-mx6q_sabresd.h arch/arm/mach-mx6/board-mx6sl_arm2.c arch/arm/mach-mx6/board-mx6sl_arm2.h arch/arm/mach-mx6/board-mx6solo_sabreauto.h arch/arm/mach-mx6/bus_freq.c arch/arm/mach-mx6/clock.c arch/arm/mach-mx6/clock_mx6sl.c arch/arm/mach-mx6/cpu.c arch/arm/mach-mx6/crm_regs.h arch/arm/mach-mx6/devices-imx6q.h arch/arm/mach-mx6/devices.c arch/arm/mach-mx6/mx6_anatop_regulator.c arch/arm/mach-mx6/pcie.c arch/arm/mach-mx6/system.c arch/arm/mm/dma-mapping.c arch/arm/plat-mxc/devices/Makefile arch/arm/plat-mxc/devices/platform-imx-dcp.c arch/arm/plat-mxc/devices/platform-imx-ocotp.c arch/arm/plat-mxc/devices/platform-imx-rngb.c arch/arm/plat-mxc/devices/platform-mxc_hdmi.c arch/arm/plat-mxc/include/mach/devices-common.h arch/arm/plat-mxc/include/mach/esdhc.h arch/arm/plat-mxc/include/mach/iomux-mx6dl.h arch/arm/plat-mxc/include/mach/iomux-mx6q.h arch/arm/plat-mxc/include/mach/memory.h arch/arm/plat-mxc/include/mach/mx6.h arch/arm/plat-mxc/include/mach/mxc_edid.h arch/arm/plat-mxc/include/mach/mxc_hdmi.h arch/arm/plat-mxc/system.c drivers/Kconfig drivers/char/hw_random/fsl-rngc.c drivers/cpufreq/Makefile drivers/cpufreq/cpufreq_interactive.c drivers/crypto/Kconfig drivers/crypto/caam/caamalg.c drivers/crypto/caam/compat.h drivers/crypto/caam/ctrl.c drivers/crypto/caam/desc_constr.h drivers/crypto/caam/intern.h drivers/crypto/dcp.c drivers/dma/pch_dma.c drivers/input/keyboard/gpio_keys.c drivers/input/touchscreen/egalax_ts.c drivers/input/touchscreen/max11801_ts.c drivers/media/video/mxc/capture/Kconfig drivers/media/video/mxc/capture/adv7180.c drivers/media/video/mxc/capture/ipu_csi_enc.c drivers/media/video/mxc/capture/ipu_prp_vf_sdc.c drivers/media/video/mxc/capture/ipu_prp_vf_sdc_bg.c drivers/media/video/mxc/capture/mxc_v4l2_capture.c drivers/media/video/mxc/capture/ov5640_mipi.c drivers/media/video/mxc/output/mxc_vout.c drivers/misc/Kconfig drivers/misc/Makefile drivers/mmc/card/block.c drivers/mmc/core/mmc.c drivers/mmc/host/mmci.c drivers/mmc/host/sdhci-esdhc-imx.c drivers/mmc/host/sdhci.c drivers/mmc/host/sdhci.h drivers/mxc/Kconfig drivers/mxc/Makefile drivers/mxc/asrc/mxc_asrc.c drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c drivers/mxc/ipu3/ipu_device.c drivers/mxc/vpu/mxc_vpu.c drivers/net/fec.c drivers/net/wireless/Makefile drivers/power/sabresd_battery.c drivers/regulator/core.c drivers/tty/serial/imx.c drivers/usb/core/hub.c drivers/usb/gadget/arcotg_udc.c drivers/usb/gadget/fsl_updater.c drivers/usb/gadget/inode.c drivers/usb/host/ehci-hub.c drivers/video/mxc/ldb.c drivers/video/mxc/mipi_dsi.c drivers/video/mxc/mxc_dispdrv.c drivers/video/mxc/mxc_dispdrv.h drivers/video/mxc/mxc_edid.c drivers/video/mxc/mxc_elcdif_fb.c drivers/video/mxc/mxc_ipuv3_fb.c drivers/video/mxc/mxc_spdc_fb.c drivers/video/mxc_hdmi.c drivers/watchdog/imx2_wdt.c fs/proc/base.c include/linux/mmc/host.h include/linux/mmc/sdhci.h include/linux/mxc_v4l2.h kernel/power/main.c sound/soc/codecs/mxc_hdmi.c sound/soc/codecs/mxc_spdif.c sound/soc/codecs/wm8962.c sound/soc/imx/Kconfig sound/soc/imx/Makefile sound/soc/imx/imx-cs42888.c sound/soc/imx/imx-esai.c sound/soc/imx/imx-wm8958.c sound/soc/imx/imx-wm8962.c
2012-07-20ENGR00180231 mx6q arm2 ONFI NAND clock changeAllen Xu
change clock source to enfc clock on mx6q arm2 lpddr board for ONFI nand when enable ddr mode Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-07-20ENGR00179284-4 support ONFI NAND device on mx6q_arm2_pop boardAllen Xu
if the NAND chip supports ONFI feature and the board supports ONFI DDR transfer mode, users could enable ONFI DDR transfer by add command line parameter "onfi_support" Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-07-20ENGR00179284-3 support ONFI NAND device on mx6q_arm2_pop boardAllen Xu
Add bch and gpmi register define for ONFI ddr feature Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-07-20ENGR00177241-4 mx6 close APBH DMA clock when no I/O operationAllen Xu
Select APBH DMA automatically when enable GPMI NAND module. Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-07-20ENGR00177241-2 mx6 close APBH DMA clock when no I/O operationAllen Xu
When there is no NAND I/O operation, close all the reference clock, include GPMI,BCH and APBH clock. Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-07-20ENGR00175572 add NAND write verify supportAllen Xu
Add NAND write verify support in NAND code Signed-off-by: Allen Xu <allen.xu@freescale.com>
2012-07-20ENGR00173947-1 mtd/gpmi : add BBT support to gpmi nand driverHuang Shijie
Add a new field to gpmi_nand_platform_data{}. Make the BBT support to board specific. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-07-20ENGR00173731-7 MX6Q/GPMI : add gpmi for mx6qHuang Shijie
add gpmi support to mx6q for the imx_3.0.15. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-07-20ENGR00173731-3 mxs-dma : rewrite the last parameter of mxs_dma_prep_slave_sg()Huang Shijie
[1] Background : The GPMI does ECC read page operation with a DMA chain consist of three DMA Command Structures. The middle one of the chain is used to enable the BCH, and read out the NAND page. The WAIT4END(wait for command end) is a comunication signal between the GPMI and MXS-DMA. [2] The current DMA code sets the WAIT4END bit at the last one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ | | set WAIT4END here This chain works fine in the mx23/mx28. [3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should be set not only at the last DMA Command Structure, but also at the middle one, such as: +-----+ +-----+ +-----+ | cmd | ------------> | cmd | ------------------> | cmd | +-----+ +-----+ +-----+ ^ ^ | | | | set WAIT4END here too set WAIT4END here If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state. In the next ECC write page operation, a DMA-timeout occurs. This has been catched in the MX6Q board. [4] In order to fix the bug, rewrite the last parameter of mxs_dma_prep_slave_sg(), and use the dma_ctrl_flags: --------------------------------------------------------- DMA_PREP_INTERRUPT : append a new DMA Command Structrue. DMA_CTRL_ACK : set the WAIT4END bit for this DMA Command Structure. --------------------------------------------------------- [5] changes to the relative drivers: For gpmi-nand driver: use the new flags. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-07-20ENGR00173731-2 mxs-dma : use the new mxs-dma.hHuang Shijie
use the new header : mxs-dma.h. Signed-off-by: Huang Shijie <b32955@freescale.com>
2012-07-20mtd: abstract last MTD partition parser argumentDmitry Eremin-Solenikov
Encapsulate last MTD partition parser argument into a separate structure. Currently it holds only 'origin' field for RedBoot parser, but will be extended in future to contain at least device_node for OF devices. Amended commentary to make kerneldoc happy Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Artem Bityutskiy <dedekind1@gmail.com>
2012-07-20mtd: add new API for handling MTD registrationDmitry Eremin-Solenikov
Lots (nearly all) mtd drivers contain nearly the similar code that calls parse_mtd_partitions, provides some platform-default values, if parsing fails, and registers mtd device. This is an aim to provide single implementation of this scenario: mtd_device_parse_register() which will handle all this parsing and defaults. Artem: amended comments Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
2012-07-20net: remove mm.h inclusion from netdevice.hAlexey Dobriyan
Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually). To prevent mm.h inclusion via other channels also extract "enum dma_data_direction" definition into separate header. This tiny piece is what gluing netdevice.h with mm.h via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h". Removal of mm.h from scatterlist.h was tried and was found not feasible on most archs, so the link was cutoff earlier. Hope people are OK with tiny include file. Note, that mm_types.h is still dragged in, but it is a separate story. Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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