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Conflicts:
arch/arm/configs/imx6_defconfig
arch/arm/configs/imx6_updater_defconfig
arch/arm/configs/imx6s_defconfig
arch/arm/include/asm/dma-mapping.h
arch/arm/kernel/smp.c
arch/arm/mach-mx6/Kconfig
arch/arm/mach-mx6/board-mx6dl_arm2.h
arch/arm/mach-mx6/board-mx6dl_sabresd.h
arch/arm/mach-mx6/board-mx6q_arm2.c
arch/arm/mach-mx6/board-mx6q_arm2.h
arch/arm/mach-mx6/board-mx6q_sabreauto.c
arch/arm/mach-mx6/board-mx6q_sabreauto.h
arch/arm/mach-mx6/board-mx6q_sabrelite.c
arch/arm/mach-mx6/board-mx6q_sabresd.c
arch/arm/mach-mx6/board-mx6q_sabresd.h
arch/arm/mach-mx6/board-mx6sl_arm2.c
arch/arm/mach-mx6/board-mx6sl_arm2.h
arch/arm/mach-mx6/board-mx6solo_sabreauto.h
arch/arm/mach-mx6/bus_freq.c
arch/arm/mach-mx6/clock.c
arch/arm/mach-mx6/clock_mx6sl.c
arch/arm/mach-mx6/cpu.c
arch/arm/mach-mx6/crm_regs.h
arch/arm/mach-mx6/devices-imx6q.h
arch/arm/mach-mx6/devices.c
arch/arm/mach-mx6/mx6_anatop_regulator.c
arch/arm/mach-mx6/pcie.c
arch/arm/mach-mx6/system.c
arch/arm/mm/dma-mapping.c
arch/arm/plat-mxc/devices/Makefile
arch/arm/plat-mxc/devices/platform-imx-dcp.c
arch/arm/plat-mxc/devices/platform-imx-ocotp.c
arch/arm/plat-mxc/devices/platform-imx-rngb.c
arch/arm/plat-mxc/devices/platform-mxc_hdmi.c
arch/arm/plat-mxc/include/mach/devices-common.h
arch/arm/plat-mxc/include/mach/esdhc.h
arch/arm/plat-mxc/include/mach/iomux-mx6dl.h
arch/arm/plat-mxc/include/mach/iomux-mx6q.h
arch/arm/plat-mxc/include/mach/memory.h
arch/arm/plat-mxc/include/mach/mx6.h
arch/arm/plat-mxc/include/mach/mxc_edid.h
arch/arm/plat-mxc/include/mach/mxc_hdmi.h
arch/arm/plat-mxc/system.c
drivers/Kconfig
drivers/char/hw_random/fsl-rngc.c
drivers/cpufreq/Makefile
drivers/cpufreq/cpufreq_interactive.c
drivers/crypto/Kconfig
drivers/crypto/caam/caamalg.c
drivers/crypto/caam/compat.h
drivers/crypto/caam/ctrl.c
drivers/crypto/caam/desc_constr.h
drivers/crypto/caam/intern.h
drivers/crypto/dcp.c
drivers/dma/pch_dma.c
drivers/input/keyboard/gpio_keys.c
drivers/input/touchscreen/egalax_ts.c
drivers/input/touchscreen/max11801_ts.c
drivers/media/video/mxc/capture/Kconfig
drivers/media/video/mxc/capture/adv7180.c
drivers/media/video/mxc/capture/ipu_csi_enc.c
drivers/media/video/mxc/capture/ipu_prp_vf_sdc.c
drivers/media/video/mxc/capture/ipu_prp_vf_sdc_bg.c
drivers/media/video/mxc/capture/mxc_v4l2_capture.c
drivers/media/video/mxc/capture/ov5640_mipi.c
drivers/media/video/mxc/output/mxc_vout.c
drivers/misc/Kconfig
drivers/misc/Makefile
drivers/mmc/card/block.c
drivers/mmc/core/mmc.c
drivers/mmc/host/mmci.c
drivers/mmc/host/sdhci-esdhc-imx.c
drivers/mmc/host/sdhci.c
drivers/mmc/host/sdhci.h
drivers/mxc/Kconfig
drivers/mxc/Makefile
drivers/mxc/asrc/mxc_asrc.c
drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_context.c
drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c
drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.c
drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel.h
drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_command.c
drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_event.c
drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal.h
drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_base.h
drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h
drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
drivers/mxc/ipu3/ipu_device.c
drivers/mxc/vpu/mxc_vpu.c
drivers/net/fec.c
drivers/net/wireless/Makefile
drivers/power/sabresd_battery.c
drivers/regulator/core.c
drivers/tty/serial/imx.c
drivers/usb/core/hub.c
drivers/usb/gadget/arcotg_udc.c
drivers/usb/gadget/fsl_updater.c
drivers/usb/gadget/inode.c
drivers/usb/host/ehci-hub.c
drivers/video/mxc/ldb.c
drivers/video/mxc/mipi_dsi.c
drivers/video/mxc/mxc_dispdrv.c
drivers/video/mxc/mxc_dispdrv.h
drivers/video/mxc/mxc_edid.c
drivers/video/mxc/mxc_elcdif_fb.c
drivers/video/mxc/mxc_ipuv3_fb.c
drivers/video/mxc/mxc_spdc_fb.c
drivers/video/mxc_hdmi.c
drivers/watchdog/imx2_wdt.c
fs/proc/base.c
include/linux/mmc/host.h
include/linux/mmc/sdhci.h
include/linux/mxc_v4l2.h
kernel/power/main.c
sound/soc/codecs/mxc_hdmi.c
sound/soc/codecs/mxc_spdif.c
sound/soc/codecs/wm8962.c
sound/soc/imx/Kconfig
sound/soc/imx/Makefile
sound/soc/imx/imx-cs42888.c
sound/soc/imx/imx-esai.c
sound/soc/imx/imx-wm8958.c
sound/soc/imx/imx-wm8962.c
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change clock source to enfc clock on mx6q arm2 lpddr board for ONFI nand
when enable ddr mode
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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if the NAND chip supports ONFI feature and the board supports ONFI
DDR transfer mode, users could enable ONFI DDR transfer by add command
line parameter "onfi_support"
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Add bch and gpmi register define for ONFI ddr feature
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Select APBH DMA automatically when enable GPMI NAND module.
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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When there is no NAND I/O operation, close all the reference
clock, include GPMI,BCH and APBH clock.
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Add NAND write verify support in NAND code
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Add a new field to gpmi_nand_platform_data{}.
Make the BBT support to board specific.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add gpmi support to mx6q for the imx_3.0.15.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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[1] Background :
The GPMI does ECC read page operation with a DMA chain consist of three DMA
Command Structures. The middle one of the chain is used to enable the BCH,
and read out the NAND page.
The WAIT4END(wait for command end) is a comunication signal between
the GPMI and MXS-DMA.
[2] The current DMA code sets the WAIT4END bit at the last one, such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^
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set WAIT4END here
This chain works fine in the mx23/mx28.
[3] But in the new GPMI version (used in MX50/MX60), the WAIT4END bit should
be set not only at the last DMA Command Structure,
but also at the middle one, such as:
+-----+ +-----+ +-----+
| cmd | ------------> | cmd | ------------------> | cmd |
+-----+ +-----+ +-----+
^ ^
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set WAIT4END here too set WAIT4END here
If we do not set WAIT4END, the BCH maybe stalls in "ECC reading page" state.
In the next ECC write page operation, a DMA-timeout occurs.
This has been catched in the MX6Q board.
[4] In order to fix the bug, rewrite the last parameter of
mxs_dma_prep_slave_sg(), and use the dma_ctrl_flags:
---------------------------------------------------------
DMA_PREP_INTERRUPT : append a new DMA Command Structrue.
DMA_CTRL_ACK : set the WAIT4END bit for this DMA Command Structure.
---------------------------------------------------------
[5] changes to the relative drivers:
For gpmi-nand driver: use the new flags.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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use the new header : mxs-dma.h.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Encapsulate last MTD partition parser argument into a separate
structure. Currently it holds only 'origin' field for RedBoot parser,
but will be extended in future to contain at least device_node for OF
devices.
Amended commentary to make kerneldoc happy
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <dedekind1@gmail.com>
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Lots (nearly all) mtd drivers contain nearly the similar code that
calls parse_mtd_partitions, provides some platform-default values, if
parsing fails, and registers mtd device.
This is an aim to provide single implementation of this scenario:
mtd_device_parse_register() which will handle all this parsing and
defaults.
Artem: amended comments
Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
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Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.
Hope people are OK with tiny include file.
Note, that mm_types.h is still dragged in, but it is a separate story.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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The patch converts gpmi nand driver to clk_prepare/clk_unprepare by
using helper functions clk_prepare_enable/clk_disable_unprepare.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Cc: Huang Shijie <b32955@freescale.com>
Cc: Artem Bityutskiy <artem.bityutskiy@intel.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
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In MX28, if we do not reset the BCH module. The BCH module may
becomes unstable when the board reboots for several thousands times.
This bug has been catched in customer's production.
The patch adds some comments(some from Wolfram Sang), and fixes it now.
Also change gpmi_reset_block() to static.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
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This patch fixes usage of dma direction to adopt dma_transfer_direction.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
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Fixes:
drivers/mtd/nand/gpmi-nand/gpmi-nand.c: In function 'gpmi_nfc_init':
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1475:16: error: 'THIS_MODULE' undeclared (first use in this function)
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1475:16: note: each undeclared identifier is reported only once for each function it appears in
drivers/mtd/nand/gpmi-nand/gpmi-nand.c: At top level:
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:15: error: expected declaration specifiers or '...' before string constant
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:1: warning: data definition has no type or storage class
drivers/mtd/nand/gpmi-nand/gpmi-nand.c:1617:1: warning: type defaults to 'int' in declaration of 'MODULE_AUTHOR'
and some more...
Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
Acked-by: Huang Shijie <b32955@freescale.com>
Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
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These files contain the common code for the GPMI-NAND driver.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
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add the GPMI-NAND driver in the relevant Kconfig and Makefile in the MTD.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
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bch-regs.h : registers file for BCH module
gpmi-regs.h: registers file for GPMI module
gpmi-lib.c: helper functions library.
Signed-off-by: Huang Shijie <b32955@freescale.com>
Acked-by: Marek Vasut <marek.vasut@gmail.com>
Tested-by: Koen Beel <koen.beel@barco.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@intel.com>
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There is only one DMA command in the chain,
So MXS_DMA_F_APPEND is not needed.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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If we do not set the WAIT4END in the middle DMA command structure
of the long DMA command chain, a DMA timeout may occurs.
The reason of the DMA timeout is:
[1] We do not set the WAIT4END in the DMA command structure
which do the ECC READ PAGE by the BCH.
[2] So the following DMA command structure (maybe in other DMA
CHAIN)may disable the BCH module.
[3] If the time delay between [2] and [1] is long enough,
it's ok. But if the time delay is not long enough, the BCH
module may become unnormal, so it can not finish its job.
The DMA will timeout in this case.
We have changed the DMA interface to fix the bug, now use the new
interface.
Acked-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The TIMING1 specifies the timeouts used when monitoring the
NAND READY pin and IOWAIT signals.
We should set a default value for it.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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select the MXS-DMA and MTD_CHAR macros.
The gpmi driver needs them to be enabled.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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The GPMI block SHOULD be initialized when the system starts.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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We do not support any ONFI or TOGGLE nand now.
So disable the DDR code.
If keep it enabled, the ECC chunk will be 1K for ONFI nand,
this is not compatible with the kobs-ng which uses 512bytes for ECC chunk size.
So disable it now. change it in future.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the gpmi driver for imx6q.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the kernel command parameter to control whether we should enable
the GPMI NAND driver.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the gpmi support for mx50.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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add the GPMI driver in the relevant Kconfig and Makefile in the MTD.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Add the implementation code for imx23 and imx28.
The imx23 and imx28 share most of the same code.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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These files contain the common code for the GPMI driver.
Signed-off-by: Huang Shijie <b32955@freescale.com>
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Signed-off-by: Rob Herring <r.herring@freescale.com>
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and oob sizes
Signed-off-by: Rob Herring <r.herring@freescale.com>
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commit 34a5704d91d6f8376a4c0a0143a1dd3eb3ccb37e upstream.
It seems there is a bug in scan_read_raw_oob() in nand_bbt.c which
should cause wrong functioning of NAND_BBT_SCANALLPAGES option.
Artem: the patch did not apply and I had to amend it a bit.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit 452380efbd72d8d41f53ea64c8a6ea1fedc4394d upstream.
major == 0 allocates dynamic major, not major == -1
Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Conflicts:
arch/arm/configs/imx6_defconfig
arch/arm/kernel/smp.c
arch/arm/mach-mx6/board-mx6q_arm2.c
arch/arm/mach-mx6/board-mx6q_sabreauto.c
arch/arm/mach-mx6/board-mx6q_sabrelite.c
arch/arm/mach-mx6/board-mx6q_sabresd.c
arch/arm/mach-mx6/bus_freq.c
arch/arm/mach-mx6/clock.c
arch/arm/mach-mx6/cpu.c
arch/arm/mach-mx6/devices-imx6q.h
arch/arm/mach-mx6/mx6_ddr_freq.S
arch/arm/mach-mx6/mx6_mmdc.c
arch/arm/mach-mx6/mx6_suspend.S
arch/arm/mach-mx6/mx6_wfi.S
arch/arm/mach-mx6/plat_hotplug.c
arch/arm/mach-mx6/pm.c
arch/arm/mach-mx6/system.c
arch/arm/plat-mxc/cpufreq.c
arch/arm/plat-mxc/system.c
drivers/media/video/mxc/capture/Kconfig
drivers/media/video/mxc/capture/mxc_v4l2_capture.c
drivers/media/video/mxc/capture/ov5640_mipi.c
drivers/media/video/mxc/output/mxc_vout.c
drivers/mmc/host/sdhci.c
drivers/mtd/nand/gpmi-nand/gpmi-lib.c
drivers/mxc/gpu-viv/arch/XAQ2/hal/kernel/gc_hal_kernel_hardware.c
drivers/mxc/gpu-viv/hal/kernel/gc_hal_kernel_mmu.c
drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_enum.h
drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_options.h
drivers/mxc/gpu-viv/hal/kernel/inc/gc_hal_version.h
drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_driver.c
drivers/mxc/gpu-viv/hal/os/linux/kernel/gc_hal_kernel_os.c
drivers/mxc/ipu3/vdoa.c
drivers/power/max8903_charger.c
drivers/video/mxc/mxc_ipuv3_fb.c
sound/soc/codecs/mxc_spdif.c
sound/soc/imx/Makefile
sound/soc/imx/imx-wm8962.c
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change clock source to enfc clock on mx6q arm2 lpddr board for ONFI nand
when enable ddr mode
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Conflicts:
arch/arm/kernel/traps.c
arch/arm/mach-mx6/board-mx6q_sabresd.c
arch/arm/mach-mx6/cpu.c
arch/arm/mach-mx6/system.c
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commit b54f47c8bcfc5f766bf13ec31bd7dd1d4726d33b upstream.
Using UBI on m25p80 can give messages like:
UBI error: io_init: bad write buffer size 0 for 1 min. I/O unit
We need to initialize writebufsize; I think "page_size" is the correct
"bufsize", although I'm not sure. Comments?
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit fcc44a07dae0af16e84e93425fc8afe642ddc603 upstream.
The writebufsize concept was introduce by commit
"0e4ca7e mtd: add writebufsize field to mtd_info struct" and it represents
the maximum amount of data the device writes to the media at a time. This is
an important parameter for UBIFS which is used during recovery and which
basically defines how big a corruption caused by a power cut can be.
Set writebufsize to 4 because this drivers writes at max 4 bytes at a time.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit b604387411ec6a072e95910099262616edd2bd2f upstream.
The writebufsize concept was introduce by commit
"0e4ca7e mtd: add writebufsize field to mtd_info struct" and it represents
the maximum amount of data the device writes to the media at a time. This is
an important parameter for UBIFS which is used during recovery and which
basically defines how big a corruption caused by a power cut can be.
However, we forgot to set this parameter for block2mtd. Set it to PAGE_SIZE
because this is actually the amount of data we write at a time.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Acked-by: Joern Engel <joern@lazybastard.org>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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commit c4cc625ea5958d065c21cc0fcea29e9ed8f3d2bc upstream.
The writebufsize concept was introduce by commit
"0e4ca7e mtd: add writebufsize field to mtd_info struct" and it represents
the maximum amount of data the device writes to the media at a time. This is
an important parameter for UBIFS which is used during recovery and which
basically defines how big a corruption caused by a power cut can be.
Set writebufsize to the flash page size because it is the maximum amount of
data it writes at a time.
Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com>
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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if the NAND chip supports ONFI feature and the board supports ONFI
DDR transfer mode, users could enable ONFI DDR transfer by add command
line parameter "onfi_support"
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Add bch and gpmi register define for ONFI ddr feature
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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if the NAND chip supports ONFI feature and the board supports ONFI
DDR transfer mode, users could enable ONFI DDR transfer by add command
line parameter "onfi_support"
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Add bch and gpmi register define for ONFI ddr feature
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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Select APBH DMA automatically when enable GPMI NAND module.
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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When there is no NAND I/O operation, close all the reference
clock, include GPMI,BCH and APBH clock.
Signed-off-by: Allen Xu <allen.xu@freescale.com>
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