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Enable OT limitation for gc880, without this limitation
3D core may stall system bus when it is running at a very low clock.
Signed-off-by: Loren HUANG <b02279@freescale.com>
Acked-by: Shawn Guo
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Integrate 4.6.9p12 release kernel part code.
Signed-off-by: Loren Huang <b02279@freescale.com>
Signed-off-by: Xianzhong <b07117@freescale.com>
Acked-by: Lily Zhang
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Add global value gpu3DMinClock so that minimum 3D clock can be change by user.
When gpu min clock is too low, it may cause IPU starvation issue in certain case.
Use echo x > /sys/module/galcore/parameters/gpu3DMinClock to change it.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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imx_3.0.35_android
Conflicts:
drivers/net/fec.c
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Correct code to remove unnecessary GPU frequency scaling updte.
This patch is from vivante.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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This patch is generated on imx_android_jb4.2.2 branch
Signed-off-by: Xianzhong <b07117@freescale.com>
Acked-by: Lily Zhang
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This is linux kernel part of gpu4.6.9p11.1 upgrade.
Signed-off-by: Xianzhong <b07117@freescale.com>
Acked-by: Lily Zhang
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-4.6.9p11 kernel code integration
-Additionally release runtime pm and regulator when destory gpu driver
to avoid reference count mismatch.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Integrate both 4.6.9p9.1 and 4.6.9p10.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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This patch changed the GPU AXI bus cache attribute
to improve the performance of fillrate bound case.
Here is some test result: BEFORE:AFTER (larger better)
mm06 samruai fps: 117.74:137.64
mm06 proxycon fps: 117.90:135.00
Fillrate with 1 tex: 251.3M:331.1M
Fillrate with 2 tex: 402.6M:475.4M
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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-Fix a value name typo in gc_hal_kernel_hardware.c
Signed-off-by: Loren Huang <b02279@freescale.com>
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Merge vivante 4.6.9 p7 kernel part code.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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It fixed the issue which causes gpu driver can't enter suspend and idle mode.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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This patch from vivante.
It fixed the stress test failure issue by disabling all internal clock
before clock updating.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Merge vivante 4.6.9 kernel part code
Updated clock management code
Updated gpu reset code
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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The patch is from vivante.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Use allocated GPU resource to enable GPU.
Memroy address on imx6sl board starts from 0x80000000
and GC320 can access [baseAddress, baseAddress + 2G) only without MMU.
So to make GC320 work, baseAddres must be set to 0x80000000, and all
address sent to GC320 must be a offset to baseAddress. GC355 doesn't
need this baseAddress, that means it needs a real physcial adress,
rather than the offset to baseAddress.
Original code always change phsysical address to 'offset' before use it,
no matter it is used by GC355 or GC320, so only one of them can work.
Solution is to move address adjustion to arch specific part. So each
core can get what it wants.
Signed-off-by: Larry Li <b20787@freescale.com>
Acked-by: Lily Zhang
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Merge vivante 4.6.8 kernel part code
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Merge vivante 4.6.7p1 kernel part code
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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AXI BUS ERROR may occur in very low possibility,
this debug message exist before 4.4.2, but removed in 4.6.x,
need add it back to trace critical gpu issue
Signed-off-by: Li Xianzhong <b07117@freescale.com>
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Merge vivante 4.6.6p2 kernel part code
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Merge vivante 4.6.6 kernel part code
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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using gc320
this needs by all the chips(6dl, 6dq) that using gc320
this is vivante's IP bug, that when set outstanding number bigger than
16, it will have a chance for gc320 to dead lock the axi bus, which will
lead to system hang.
also, as our chip can only support axi outstanding of 8(for 6dl) and 4(6dq),
this change have no performance impact.
Signed-off-by: Wu Guoxing <b39297@freescale.com>
Acked-by: Lily Zhang
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Merge 4.6.5 p1 kernel part code.
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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gc320 on Rigel can not run at high core clock, above 200M core clock will
make system hang.
change gc320's axi outstanding limit to 16 as a ic workaround.
Signed-off-by: Wu Guoxing <b39297@freescale.com>
Acked-by: Lily Zhang
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viv code is using mutex to wait for pm events,
kernel will see this as a dead lock and give a warrning, as the mutex
can be hold for a long time.
Signed-off-by: Wu Guoxing <b39297@freescale.com>
Acked-by: Lily Zhang
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Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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-Correct gc355 initial power state to poweroff.
-Separate clock gating operation in function gckOS_SetGPUPower().
-Turn on clock while suspend GPU cores.
-Remove clock switch in drv_open().
Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Signed-off-by: Loren Huang <b02279@freescale.com>
Acked-by: Lily Zhang
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Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Lily Zhang
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It's vivante driver 4.5.0 (Sep 5, 2011) with freescale changes.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com>
Acked-by: Lily Zhang
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