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Board files correctly define fec gpio irq to wake up wait mode since FEC
interrupt cannot connect to GPC, otherwise board files define fec gpio irq
to -1. So, fec probe function check the gpio irq to decide whether fec use
gpio irq or fec irq.
Current irq checking logic is incorrect. Correct the gpio irq checking.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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For imx6 serial silicon, fec MDC clock parent is ipg 66MHz.
The current clock file define the clock source is enet_pll8 50Mhz.
So, the MDC clock is more than 2.5Mhz after divider.
The phy Ar8031 work fine in current MDC clock, which shows the phy
have exceeding flexibility. Correct the parent clock source to make
MDC clock little than 2.5Mhz.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Add a command line option to route the ENET interrupts to the GPIO_1_6.
To route the ENET interrupts to GPIO_6 add "enet_gpio_6" to the
kernel command line.
Also remove the CONFIG option (MX6_ENET_IRQ_TO_GPIO).
This commit should be applied on top of following commits:
72c86f0b9a953e91bb1ed31021b71f337050bc28
808863866d2c17aeb3e70a7fcd094bd96db4b601
bae4d40849f3acdd9663f5a0857c9415ed7e6d5d
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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Enable "CONFIG_DMA_API_DEBUG" in kernel, and system generate
warning when run up.
WARNING:
/home/b29397/work/projects/linux-2.6-imx/lib/dma-debug.c:865
check_unmap+0x6f8/0x7d8()
net eth0: DMA-API: device driver tries to free DMA memory it
has not allocated [device address=0x00000000443d7040] [size=2048]
[<80025f60>] (warn_slowpath_common+0x0/0x6c) from [<80026070>]
(warn_slowpath_fmt+0x38/0x40) r9:00000000 r8:00000800 r7:807bfb0c
r6:807a3d48 r5:00000000
It is dma memory map/unmap mismatch issue caused by kernel upgrade.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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This is an issue from IC errata ERR005641 which is described as follows:
----------------------------------------------------------
FlexCAN does not transmit a message that is enabled to be transmitted
in a specific moment during the arbitration process. The following
conditions are necessary to have the issue.
- Only one MB is configured to be transmitted
- The write which enables the MB to be transmitted (write on Control status
word) happens during a specific clock during the arbitration process.
After this arbitration process occurs, the bus goes to Idle state and no
new message is received on bus.
For example:
1) MB13 is deactivated on RxIntermission (write 0x0 on CODE field from Control
Status word) - First write on CODE
2) Reconfigure the ID and data fields
3) Enable the MB13 to be transmitted on BusIdle (write 0xC on Code
field) - Second write on code
4) CAN bus keeps in Idle state
5) No write on Control status from any MB happens.
During the second write on code (step 3), the write must happen one clock
before the current MB13 is to be scanned by arbitration process.
In this case, it does not detect the new code (0xC) and no new arbitration is
scheduled.
The suggested workaround which is implemented in this patch is:
The workaround consists of executing two extra steps:
6. Reserve the first valid mailbox as an inactive mailbox (CODE=0b1000).
If RX FIFO is disabled, this mailbox must be MB0. Otherwise, the first
valid mailbox can be found by using table "RX FIFO filters" on FlexCAN3 chapter.
7. Write twice INACTIVE code (0b1000) into the first valid mailbox.
Note: The first mailbox cannot be used for reception or transmission process.
-------------------------------------------------------------
Note: Although the currently flexcan driver does not have the step 1 to run,
it's also possible to meet this issue in theory because we can not predict
when the arbitration is scheduled.
With a modified can-utils/canfdttest tool simulating Pingpong test, we were
able to reproduce this issue after running a about one day.
After applying this patch, we ran six days and did not see the issue happen
again on two mx6q sabrelite boards.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Currently the flexcan driver uses hardware local echo. This blindly
echos all transmitted frames to all receiving sockets, regardless what
CAN_RAW_RECV_OWN_MSGS and CAN_RAW_LOOPBACK are set to.
This patch now submits transmitted frames to be echoed in the transmit
complete interrupt, preserving the reference to the sending
socket. This allows the can protocol to correctly handle the local
echo.
Further this patch moves tx_bytes statistic accounting into the tx_complete
handler.
Signed-off-by: Reuben Dowle <reuben.dowle@navico.com>
[mkl: move tx_bytes accounting into tx_complete handler; cleanups]
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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can_get_echo_skb() is usually called in the TX complete handler.
The stats->tx_packets and stats->tx_bytes should be updated there, too.
This patch simplifies to figure out the size of the sent CAN frame.
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
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All of the interrupts from the ENET block are not routed to
the GPC block. Hence ENET interrupts are not able to wake
up the SOC when the system is in WAIT mode. And the ENET
interrupt gets serviced only when another interrupt causes
the SOC to exit WAIT mode. This impacts the ENET performance.
To fix the issue two options:
1. Route the ENET interrupt to a GPIO. Need to enable the
CONFIG_MX6_ENET_IRQ_TO_GPIO in the config.
2. If the GPIO mechanism cannot be used and is not enabled
by the above mentioned config, the patch will disable entry
to WAIT mode until ENET clock is active. When the ENET clock
is disabled, WAIT mode will be automatically enetered.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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This reverts commit 573bab0be2427d6664420eaf9d8e272dbe9d840f.
i.mx6dl/dq sabreauto/sabresd board will boot up failed
randomly with this patch-set, thus revert it. [Jason]
Signed-off-by: Jason Liu <r64343@freescale.com>
Signed-off-by: Huang Shijie <b32955@freescale.com>
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All of the interrupts from the ENET block are not routed to
the GPC block. Hence ENET interrupts are not able to wake
up the SOC when the system is in WAIT mode. And the ENET
interrupt gets serviced only when another interrupt causes
the SOC to exit WAIT mode. This impacts the ENET performance.
To fix the issue two options:
1. Route the ENET interrupt to a GPIO. Need to enable the
CONFIG_MX6_ENET_IRQ_TO_GPIO in the config.
This patch provides support for routing the ENET interrupt
to GPIO_1_6. Routing to this GPIO requires no HW board mods.
If the GPIO_1_6 is being used for some other peripheral,
this patch can be followed to route the ENET interrupt to
any other GPIO though a HW mode maybe required.
2. If the GPIO mechanism cannot be used and is not enabled
by the above mentioned config, the patch will disable entry
to WAIT mode until ENET clock is active. When the ENET clock
is disabled, WAIT mode will be automatically enetered.
Signed-off-by: Ranjani Vaidyanathan <ra5478@freescale.com>
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MTIP enet IP have one IC issue recorded at PDM ticket:TKT168103
The issue description:
The TDAR bit after being set by software is not acted upon by the ENET
module due to the timing of when the ENET state machine clearing the
TDAR bit occurring coincident or momentarily after the software sets
the bit.
The result:
The corresponding transmit packet for an incoming ping is delayed.
Workaround:
This forces the ENET module to check the Transmit buffer descriptor
and take action if the “ready” flag is set. Otherwise the ENET module
returns to idle mode.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Since some ethernet MAC flow control is relied on phy pause
status, both link partners exchange information via auto neg to
determine if both parties are capable of flow control.
Advertise phy pause frame to avoid pause frame is not responsed
by the other net node.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Warning: no return statement in function returning non-void.
fec_ptp_ioctl return zero when 1588 is not enable.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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When do Ethernet UDP stress overnight test with abundance of
data transmission, RX path may hang-on.
Dump the RX BD, found all BD "Empty" bit is cleared, which means
CPU read BD status is not right and waiting here.
Change BD memroy attribute from Normal to strongly ordered:
changes the memory attribute of C=0, B=0 instead of C=0, B=1.
Apply the change, the issue cannot be reproduced.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Upgrade drivers to support IXXAT IEEE1588 stack V1.05.03.
Ptp message protocol support IPv4, IPv6, and IEEE802.3 L2.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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When do overnight gpu stress test throught nfs, kernel dump as below:
------------[ cut here ]------------
WARNING: at net/sched/sch_generic.c:255 dev_watchdog+0x284/0x2a8()
NETDEV WATCHDOG: eth0 (fec): transmit queue 0 timed out
Modules linked in: galcore imx2_wd_test [last unloaded: galcore]
[<80045854>] (unwind_backtrace+0x0/0xf8) from [<80070c2c>]
(warn_slowpath_common+0x4c/0x64)
<snip>
In sometime, ethernet cannot recover after watchdog timeout which
results in nfs no responding and system hang on.
The patch fixes the way that ->trans_start is refreshed to avoid watchdog
timeout during ethernet status change (such as speed, duplex), and re-init
fec to recover ethernet after watchdog timeout.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Ethernet performance is downgraded when wait mode on in
100Mbps mode.
wait mode off:
100Mbps mode: tx bandwidth is 94Mbps
rx bandwidth is 94Mbps
wait mode on:
100Mbps mode: tx bandwidth is 30Mbps
rx bandwidth is 94Mbps
After apply the patch:
wait mode on:
100Mbps mode: tx bandwidth is 94Mbps
rx bandwidth is 94Mbps
Wait mode on cause enet interrupt has long latency, which
results in BD entries are full and stop tx queue, so cpus
have more chance to enter wait mode.
Incresing TX BD entries can properly accommodate the blance
between BD request before tx packets and BD release after tx
completion in interrupt process.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Kernel dump when do wifi stress test with suspend and resume as below:
eth0: tx queue full!.
remove wake up source irq 103
PM: resume of devices complete after 348.934 msecs
Restarting tasks ... done.
------------[ cut here ]------------
WARNING: at net/sched/sch_generic.c:255 dev_watchdog+0x284/0x2a8()
NETDEV WATCHDOG: eth0 (fec): transmit queue 0 timed out
Modules linked in: ar6000
[<8004482c>] (unwind_backtrace+0x0/0xf8) from
[<80068cd0>] (warn_slowpath_common+0x4c/0x64)
[<80068cd0>] (warn_slowpath_common+0x4c/0x64)from
[<80068d7c>] (warn_slowpath_fmt+0x30/0x40)
[<80068d7c>] (warn_slowpath_fmt+0x30/0x40) from
[<803f0c50>] (dev_watchdog+0x284/0x2a8)
[<803f0c50>] (dev_watchdog+0x284/0x2a8) from
[<80074430>] (run_timer_softirq+0xec/0x214)
[<80074430>] (run_timer_softirq+0xec/0x214) from
[<8006e524>] (__do_softirq+0xac/0x140)
[<8006e524>] (__do_softirq+0xac/0x140) from
[<8006ea60>] (irq_exit+0x94/0x9c)
[<8006ea60>] (irq_exit+0x94/0x9c) from
[<80039240>] (do_local_timer+0x54/0x70)
[<80039240>] (do_local_timer+0x54/0x70) from
[<8003ea0c>] (__irq_svc+0x4c/0xe8)
Exception stack(0x80a2bf68 to 0x80a2bfb0)
bf60: 0000001f 80a3babc 80a2bfb0 00000000 80a2a000 80a7b8e4
bf80: 804befcc 80a3ee7c 1000406a 412fc09a 00000000 00000000 80a81440 80a2bfb0
bfa0: 8003fa64 8003fa68 60000013 ffffffff
[<8003ea0c>] (__irq_svc+0x4c/0xe8) from [<8003fa68>] (default_idle+0x24/0x28)
[<8003fa68>] (default_idle+0x24/0x28) from [<8003fc60>] (cpu_idle+0xbc/0xfc)
[<8003fc60>] (cpu_idle+0xbc/0xfc) from [<80008878>] (start_kernel+0x258/0x29c)
[<80008878>] (start_kernel+0x258/0x29c) from [<10008040>] (0x10008040)
---[ end trace 30671ac42e272c2d ]---
But ethernet and system still be alive. In sometime,the issue
will cause system hang like "nfs: server 10.192.242.179 not
responding, still trying".
The root cause is tx buffer descriptors are not cleaned when
ethernet resume back.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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ENET pause frame has two issues (ticket TKT116501):
1. RX status fifo full.
2. XOFF has higher priority than XON when both XOFF and
XON have pending request.
Both of the issues can cause RX FIFO overruns when RX bandwidth
is over 120Mbps.
The issue has been fixed on Rigel TO1.1 and Arik TO1.2. Pause
frame has been enabled to avoid the overrun issue.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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The flexcan is still in disable mode during suspend if it's still
not up. We do not need to enter stop mode if find the device is not
up since the stop mode does not work well in disable mode(remote wakeup
does not work).
Using disable mode for suspend if it's not up.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Clean up duplicated code and hide the details of enter/exit
stop mode into API.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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Currently flexcan only exits stop mode by remote wakeup,
if system resumes normally, the flexcan may still in stop mode
and can not work anymore.
Change to also exit stop mode during normal resume in case system
is not remote wakeup by flexcan.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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- Fix the typo to avoid kernel build warning.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Modify the the platform macro define like as cpu_is_xxx()
for supporting Mergrez chip.
- Config MIIGSK for FEC IP to enable RMII mode. MX25,MX53,
and MX6Sololite use FEC IP, which need to config the MIIGSK
registers memory map for RMII and MII.
- Correct device id_table entry name for differnt IP.
- Rewrite FEC MAC address by net_device address when reset FEC,
which can avoid invalid MAC address to result in FEC cannot
work.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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The root cause is missed to set CAN2_STOP_REQ in iomuxc
group register which is used to support can wakeup feature.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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- Increase RX BD size to 384 entrys from 16 entrys, and allocate
the enough DMA memory for buffer description.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Fix clock enable/disable match operation to avoid kernel
dump warning "clock enable/disable mismatch".
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Increase RX BD size to 384 entrys from 16 entrys, which
can reduce the overruns number in busy system.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Add NAPI methods.
NAPI can improve the performance of high-speed networking,
which can reduce the cpu loading of interrupt generate and
drop packets.
- Enet RX FIFO overruns number has been reduced by NAPI method.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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The issue is hard to reproduce in normal envrionment. And
the reproduce rate is about 40% when doing VTE auto test.
while the driver did report being busy when the link is down
or no transmission buffers are available, it did not stop the
queue, causing instant retries. furthermore, transmission being
triggered with link down was caused by unconditional queue
wakes, especially on timeouts.
Now, wake queue only if link is up and transmission buffers
are available, and dont forget to wake queue when link has
been adjusted. next, add stop queue notification upon driver
induced transmission problems, so network stack has a chance
to handle the situation.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Last May we started working on cleaning up ath6kl driver which is
currently in staging. The work has happened in a separate
ath6kl-cleanup tree:
http://git.kernel.org/?p=linux/kernel/git/kvalo/ath6kl-cleanup.git;a=summary
After over 1100 (!) patches we have now reached a state where I would
like to start discussing about pushing the driver to the wireless
trees and replacing the staging driver.
The driver is now a lot smaller and looks like a proper Linux driver.
The size of the driver (measured with simple wc -l) dropped from 49
kLOC to 18 kLOC and the number of the .c and .h files dropped from 107
to 22. Most importantly the number of subdirectories reduced from 26
to zero :)
There are two remaining checkpatch warnings in the driver which we
decided to omit for now:
drivers/net/wireless/ath/ath6kl/debug.c:31:
WARNING: printk() should include KERN_ facility level
drivers/net/wireless/ath/ath6kl/sdio.c:527:
WARNING: msleep < 20ms can sleep for up to 20ms;
see Documentation/timers/timers-howto.txt
The driver has endian annotations for all the hardware specific
structures and there are no sparse errors. Unfortunately I don't have
any big endian hardware to test that right now.
We have been testing the driver both on x86 and arm platforms. The
code is also compiled with sparc and parisc cross compilers.
Notable missing features compared to the current staging driver are:
o HCI over SDIO support
o nl80211 testmode
o firmware logging
o suspend support
Testmode, firmware logging and suspend support will be added soon. HCI
over SDIO support will be more difficult as the HCI driver needs to
share code with the wifi driver. This is something we need to research
more.
Also I want to point out the changes I did for signed endian support.
As I wasn't able to find any support for signed endian annotations I
decided to follow what NTFS has done and added my own. Grep for sle16
and sle32, especially from wmi.h.
Various people have been working on the cleanup, the hall of
fame based on number of patches is:
543 Vasanthakumar Thiagarajan
403 Raja Mani
252 Kalle Valo
16 Vivek Natarajan
12 Suraj Sumangala
3 Joe Perches
2 Jouni Malinen
Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qca.qualcomm.com>
Signed-off-by: Raja Mani <rmani@qca.qualcomm.com>
Signed-off-by: Vivek Natarajan <nataraja@qca.qualcomm.com>
Signed-off-by: Suraj Sumangala <surajs@qca.qualcomm.com>
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Jouni Malinen <jouni@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
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Default use RMII 50MHz clock for ts_clk.
Test result:
Enet work fine at 100/1000Mbps in TO1.1 and Rigel.
IEEE 1588 timestamp is convergent for 25M & 50M & 100MHz
timestamp clock.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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This patch change is very trivial and simply just add
cpu_is_mx6dl() or using cpu_is_mx6 to replace cpu_is_mx6q
each driver owner will check it and adjust it accordingly later,
such as sdhc etc.
Signed-off-by: Jason Liu <r64343@freescale.com>
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Remove linux/mm.h inclusion from netdevice.h -- it's unused (I've checked manually).
To prevent mm.h inclusion via other channels also extract "enum dma_data_direction"
definition into separate header. This tiny piece is what gluing netdevice.h with mm.h
via "netdevice.h => dmaengine.h => dma-mapping.h => scatterlist.h => mm.h".
Removal of mm.h from scatterlist.h was tried and was found not feasible
on most archs, so the link was cutoff earlier.
Hope people are OK with tiny include file.
Note, that mm_types.h is still dragged in, but it is a separate story.
Signed-off-by: Alexey Dobriyan <adobriyan@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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fix the building errors when upgrade to v3.0
The following commit change the function name:
commit a0cd9ca2b907d7ee26575e7b63ac92dad768a75e
Author: Thomas Gleixner <tglx@linutronix.de>
Date: Thu Feb 10 11:36:33 2011 +0100
genirq: Namespace cleanup
The irq namespace has become quite convoluted. My bad. Clean it up
and deprecate the old functions. All new functions follow the scheme:
irq number based:
irq_set/get/xxx/_xxx(unsigned int irq, ...)
irq_data based:
irq_data_set/get/xxx/_xxx(struct irq_data *d, ....)
irq_desc based:
irq_desc_get_xxx(struct irq_desc *desc)
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
We need give one fix to change the function call name to align this change,
- ret = set_irq_wake(dev->irq, 1);
+ ret = irq_set_irq_wake(dev->irq, 1);
Signed-off-by: Jason Liu <r64343@freescale.com>
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Flexcan can use the self wakeup function to wakeup system in system
suspend state.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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The original FEC_MII_TIMEOUT was set to 1ms, which is too low when
passed to the usecs_to_jiffies macro.
On ARM one jiffy is 10ms, so use msecs_to_jiffies instead and use
a timeout of 30ms, which corresponds to 3 jiffies.
After running 3 hours NFS boots, the MDIO timeout do not occur
anymore.
Signed-off-by: Rogerio Pimentel <rogerio.pimentel@freescale.com>
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Enable "CONFIG_DMA_API_DEBUG" in kernel, and system print:
DMA-API: device driver tries to free DMA memory it has not
allocated [device address=0x0000000046688020]...[<80222494>]
(debug_dma_unmap_page+0x8c/0x98) from [<802a36a0>]
(fec_enet_interrupt+0x430/0x5ac)
Correct the usage of "dma_map_single" function.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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since smp_lock.h has been removed on v3.0
Signed-off-by: Jason Liu <r64343@freescale.com>
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Signed-off-by: Jason Liu <jason.hui@linaro.org>
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- MII timeout when config ipg 40MHz mode and add "rootwait"
para in uboot. Kernel will delay before peripheral equipment
are ready, which lead to CPU loss interrupt.
- So, prolong the timeout time, and increase the MII clock.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Clear state error to avoid ednless state error if error happens
which will call napi_schedule() each time, seems a little high load,
to cause system hang.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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- Set phy AR8031 to save power mode when no cable connect.
- Close enet clock gate when FEC is no use.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Using platform ids to handle differences between different SoCs.
The default rx fifo global mask register, newly introduced in mx6q,
is 0xffffffff and the reset value in Message buffers(can be reused as the
memory of rx fifo filter table) is none zero, it will wrongly cause the
can to be unable to recevie packets due to filter.
We need to clear it to make sure to receive all packets.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
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fix build warning:
> drivers/net/fec.c:435: warning: unused variable 'estatus'
Signed-off-by: Fugang Duan <B38611@freescale.com>
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- Support time stamp sync with networking master timer.
- Support ipg 40MHz clock, and precision is about 20ns.
- Don't support ipg 66MHz clock.
- Test flow:
1. Enable CONFIG_FEC_1588 in imx6_defconfig file.
2. Select pll3 for ipg clk 40M in uboot plugin code.
I. set reg 0x20c8028 value to 0x10000;
II.set reg 0x20c8024 value to 0x3040;
III. set reg 0x20c4014[25] to 0x1
IV. set reg 0x20c4014[12:10] to 0x5
3. Rebuid uboot and setup the ethernet environment.
4. Run the 1588 stack ptp_main in master and slave.
Signed-off-by: Fugang Duan <B38611@freescale.com>
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Received a fix from Micrel to fix their driver. Without this
patch the Micrel PHY does not get recognized during boot
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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Move the board specific code out of the FEC driver to the platform
layer
Signed-off-by: Mahesh Mahadevan <r9aadq@freescale.com>
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fix following build warning:
drivers/staging/ath6kl/os/linux/ioctl.c:4673:
warning: the frame size of 1976 bytes is larger than 1024 bytes
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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add some delay after resuming.
Signed-off-by: Tony Lin <tony.lin@freescale.com>
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