summaryrefslogtreecommitdiff
path: root/drivers/pci/dwc
AgeCommit message (Collapse)Author
2019-12-19Merge branch 'github.com/Freescale/linux-fslc/4.14-2.0.x-imx' into ↵Marcel Ziswiler
toradex_4.14-2.0.x-imx-next Conflicts: sound/soc/codecs/sgtl5000.c
2019-12-18Merge tag 'v4.14.159' into 4.14-2.0.x-imxMarcel Ziswiler
This is the 4.14.159 stable release Conflicts: arch/arm/Kconfig.debug arch/arm/boot/dts/imx7s.dtsi arch/arm/mach-imx/cpuidle-imx6sx.c drivers/crypto/caam/caamalg.c drivers/crypto/mxs-dcp.c drivers/dma/imx-sdma.c drivers/input/keyboard/imx_keypad.c drivers/net/can/flexcan.c drivers/net/can/rx-offload.c drivers/net/wireless/ath/ath10k/pci.c drivers/pci/dwc/pci-imx6.c drivers/spi/spi-fsl-lpspi.c drivers/usb/dwc3/gadget.c
2019-12-01PCI: keystone: Use quirk to limit MRRS for K2GKishon Vijay Abraham I
[ Upstream commit 148e340c0696369fadbbddc8f4bef801ed247d71 ] PCI controller in K2G also has a limitation that memory read request size (MRRS) must not exceed 256 bytes. Use the quirk to limit MRRS (added for K2HK, K2L and K2E) for K2G as well. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-11-25Revert "Revert "MLK-18433 PCI: imx: remove the lpcg_xxx clocks in driver""Oleksandr Suvorov
This reverts commit c1e7d4fc8c1b9bd599eed9cf848eff3ed9a34637. Adding pcie_per leads to eventual kernel panics on boot for Apalis iMX8QM modules. Related-To: #58016 Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-11-12PCI: dra7xx: Add shutdown handler to cleanly turn off clocksKeerthy
commit 9c049bea083fea21373b8baf51fe49acbe24e105 upstream Add shutdown handler to cleanly turn off clocks. This will help in cases of kexec where in a new kernel can boot abruptly. Signed-off-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-10-07PCI: exynos: Propagate errors for optional PHYsThierry Reding
[ Upstream commit ddd6960087d4b45759434146d681a94bbb1c54ad ] devm_of_phy_get() can fail for a number of reasons besides probe deferral. It can for example return -ENOMEM if it runs out of memory as it tries to allocate devres structures. Propagating only -EPROBE_DEFER is problematic because it results in these legitimately fatal errors being treated as "PHY not specified in DT". What we really want is to ignore the optional PHYs only if they have not been specified in DT. devm_of_phy_get() returns -ENODEV in this case, so that's the special case that we need to handle. So we propagate all errors, except -ENODEV, so that real failures will still cause the driver to fail probe. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Kukjin Kim <kgene@kernel.org> Cc: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-10-07PCI: imx6: Propagate errors for optional regulatorsThierry Reding
[ Upstream commit 2170a09fb4b0f66e06e5bcdcbc98c9ccbf353650 ] regulator_get_optional() can fail for a number of reasons besides probe deferral. It can for example return -ENOMEM if it runs out of memory as it tries to allocate data structures. Propagating only -EPROBE_DEFER is problematic because it results in these legitimately fatal errors being treated as "regulator not specified in DT". What we really want is to ignore the optional regulators only if they have not been specified in DT. regulator_get_optional() returns -ENODEV in this case, so that's the special case that we need to handle. So we propagate all errors, except -ENODEV, so that real failures will still cause the driver to fail probe. Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Andrew Murray <andrew.murray@arm.com> Cc: Richard Zhu <hongxing.zhu@nxp.com> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Shawn Guo <shawnguo@kernel.org> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: Fabio Estevam <festevam@gmail.com> Cc: kernel@pengutronix.de Cc: linux-imx@nxp.com Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-09-21PCI: kirin: Fix section mismatch warningNathan Chancellor
commit 6870b673509779195cab300aedc844b352d9cfbc upstream. The PCI kirin driver compilation produces the following section mismatch warning: WARNING: vmlinux.o(.text+0x4758cc): Section mismatch in reference from the function kirin_pcie_probe() to the function .init.text:kirin_add_pcie_port() The function kirin_pcie_probe() references the function __init kirin_add_pcie_port(). This is often because kirin_pcie_probe lacks a __init annotation or the annotation of kirin_add_pcie_port is wrong. Remove '__init' from kirin_add_pcie_port() to fix it. Fixes: fc5165db245a ("PCI: kirin: Add HiSilicon Kirin SoC PCIe controller driver") Reported-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Nathan Chancellor <natechancellor@gmail.com> [lorenzo.pieralisi@arm.com: updated commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-09-17Merge remote-tracking branch 'fslc/4.14-2.0.x-imx' into ↵Max Krummenacher
toradex_4.14-2.0.x-imx-next
2019-09-16PCI: dra7xx: Fix legacy INTD IRQ handlingVignesh R
commit 524d59f6e30aab5b618da55e604c802ccd83e708 upstream. Legacy INTD IRQ handling is broken on dra7xx due to fact that driver uses hwirq in range of 1-4 for INTA, INTD whereas IRQ domain is of size 4 which is numbered 0-3. Therefore when INTD IRQ line is used with pci-dra7xx driver following warning is seen: WARNING: CPU: 0 PID: 1 at kernel/irq/irqdomain.c:342 irq_domain_associate+0x12c/0x1c4 error: hwirq 0x4 is too large for dummy Fix this by using pci_irqd_intx_xlate() helper to translate the INTx 1-4 range into the 0-3 as done in other PCIe drivers. Suggested-by: Bjorn Helgaas <bhelgaas@google.com> Reported-by: Chris Welch <Chris.Welch@viavisolutions.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-09-16PCI: designware-ep: Fix find_first_zero_bit() usageNiklas Cassel
commit ad4a5becc689c3f32bbbc2b37eff89efe19dc2f9 upstream. find_first_zero_bit()'s parameter 'size' is defined in bits, not in bytes. find_first_zero_bit() is called with size in bytes rather than bits, which thus defines a too low upper limit, causing dw_pcie_ep_inbound_atu() to assign iatu index #4 to both bar 4 and bar 5, which makes bar 5 overwrite the settings set by bar 4. Since the sizes of the bitmaps are known, dynamically allocate the bitmaps, and use the correct size when calling find_first_zero_bit(). Additionally, make sure that ep->num_ob_windows and ep->num_ib_windows, which are obtained from device tree, are smaller than the maximum number of iATUs (MAX_IATU_IN/MAX_IATU_OUT). Fixes: f8aed6ec624f ("PCI: dwc: designware: Add EP mode support") Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-09-02Revert "MLK-18433 PCI: imx: remove the lpcg_xxx clocks in driver"Oleksandr Suvorov
This reverts commit 68a026f4d3d8d79185c0b1bcc1e74985e1322466. The clock pcie_per is required to be held to avoid crash of pcie driver on system suspend. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-09-02PCI: imx: fix crash on system suspendOleksandr Suvorov
The driver tries to modify registers after disable important clocks. This causes the crash a driver: [ 67.083289] Synchronous External Abort: synchronous external abort (0x96000210) at 0xffff00000d9c0008 [ 67.092620] Internal error: : 96000210 [#1] PREEMPT SMP [ 67.097935] Modules linked in: 8021q garp stp mrp crc32_ce crct10dif_ce mwifiex_pcie mwifiex galcore(O) [ 67.107447] Process sh (pid: 4032, stack limit = 0xffff00001a668000) [ 67.113897] CPU: 3 PID: 4032 Comm: sh Tainted: G O 4.14.117-3.0.2+ge43e3a26e1b7 #1 [ 67.122691] Hardware name: Toradex Colibri iMX8QXP/DX on Colibri Evaluation Board V3 (DT) [ 67.130963] task: ffff8000761b4380 task.stack: ffff00001a668000 [ 67.136983] PC is at regmap_mmio_read32le+0x8/0x20 [ 67.141866] LR is at regmap_mmio_read+0x2c/0x68 [ 67.146484] pc : [<ffff0000086db108>] lr : [<ffff0000086db1e4>] pstate: 000001c5 [ 67.153971] sp : ffff00001a66b990 [ 67.157372] x29: ffff00001a66b990 x28: 0000000000000000 [ 67.162778] x27: 0000000000000002 x26: ffff0000096de000 [ 67.168183] x25: 0000000000000000 x24: 0000000000000000 [ 67.173589] x23: 0000000000000200 x22: ffff00001a66ba4c [ 67.178994] x21: ffff80007ab83400 x20: ffff00001a66ba4c [ 67.184400] x19: ffff80007aab0680 x18: 0000000000000001 [ 67.189805] x17: 0000ffff8d856160 x16: 0000000000000000 [ 67.195210] x15: 0000000000000010 x14: ffff80007ff6bd80 [ 67.200615] x13: 0000000000000004 x12: 0000000000000000 [ 67.206023] x11: 0000000000000001 x10: 0000000000000980 [ 67.211428] x9 : ffff00001a66b920 x8 : ffff8000761b4d60 [ 67.216833] x7 : 0000000000000004 x6 : 0000000000000000 [ 67.222238] x5 : 0000000000000000 x4 : 0000000000000000 [ 67.227644] x3 : ffff0000086db1b8 x2 : ffff0000086db100 [ 67.233047] x1 : 00000000000c0008 x0 : ffff00000d9c0008 [ 67.238454] Call trace: [ 67.240987] Exception stack(0xffff00001a66b850 to 0xffff00001a66b990) [ 67.247521] b840: ffff00000d9c0008 00000000000c0008 [ 67.255448] b860: ffff0000086db100 ffff0000086db1b8 0000000000000000 0000000000000000 [ 67.263373] b880: 0000000000000000 0000000000000004 ffff8000761b4d60 ffff00001a66b920 [ 67.271300] b8a0: 0000000000000980 0000000000000001 0000000000000000 0000000000000004 [ 67.279226] b8c0: ffff80007ff6bd80 0000000000000010 0000000000000000 0000ffff8d856160 [ 67.287152] b8e0: 0000000000000001 ffff80007aab0680 ffff00001a66ba4c ffff80007ab83400 [ 67.295079] b900: ffff00001a66ba4c 0000000000000200 0000000000000000 0000000000000000 [ 67.303005] b920: ffff0000096de000 0000000000000002 0000000000000000 ffff00001a66b990 [ 67.310932] b940: ffff0000086db1e4 ffff00001a66b990 ffff0000086db108 00000000000001c5 [ 67.318858] b960: ffff80007ab838f0 0000000000000000 0000ffffffffffff 0000000000000002 [ 67.326785] b980: ffff00001a66b990 ffff0000086db108 [ 67.331756] [<ffff0000086db108>] regmap_mmio_read32le+0x8/0x20 [ 67.337681] [<ffff0000086d4134>] _regmap_bus_reg_read+0x14/0x20 [ 67.343693] [<ffff0000086d5a40>] _regmap_read+0x60/0xe0 [ 67.349011] [<ffff0000086d5e34>] _regmap_update_bits+0x9c/0xe8 [ 67.354937] [<ffff0000086d6e58>] regmap_update_bits_base+0x60/0x90 [ 67.361214] [<ffff0000084de284>] pci_imx_suspend_noirq+0x1dc/0x270 [ 67.367490] [<ffff0000086c0f30>] pm_generic_suspend_noirq+0x28/0x40 [ 67.373853] [<ffff0000086ce250>] genpd_finish_suspend+0xd0/0xf8 [ 67.379865] [<ffff0000086ce2a0>] pm_genpd_suspend_noirq+0x10/0x18 [ 67.386052] [<ffff0000086c5670>] dpm_run_callback.isra.7+0x40/0xa0 [ 67.392326] [<ffff0000086c5ca8>] __device_suspend_noirq+0xb0/0x148 [ 67.398598] [<ffff0000086c6f78>] dpm_noirq_suspend_devices+0x100/0x200 [ 67.405220] [<ffff0000086c709c>] dpm_suspend_noirq+0x24/0x60 [ 67.410975] [<ffff0000081122ec>] suspend_devices_and_enter+0x144/0x560 [ 67.417595] [<ffff000008112a14>] pm_suspend+0x30c/0x354 [ 67.422913] [<ffff0000081114d8>] state_store+0x88/0xf8 [ 67.428146] [<ffff000008d5c92c>] kobj_attr_store+0x14/0x28 [ 67.433727] [<ffff000008287b90>] sysfs_kf_write+0x40/0x58 [ 67.439219] [<ffff000008286e54>] kernfs_fop_write+0xcc/0x1e0 [ 67.444975] [<ffff00000820b1e8>] __vfs_write+0x18/0x118 [ 67.450292] [<ffff00000820b4d4>] vfs_write+0xa4/0x1a8 [ 67.455438] [<ffff00000820b77c>] SyS_write+0x44/0xa0 [ 67.460492] Exception stack(0xffff00001a66bec0 to 0xffff00001a66c000) [ 67.467028] bec0: 0000000000000001 0000aaaacb49e7d0 0000000000000004 0000ffffb585cf68 [ 67.474953] bee0: 0000000000000000 5551000454000000 0000000000000003 000000000000006d [ 67.482883] bf00: 0000000000000040 0000000000000001 0000ffffc12f3c30 0000000000000000 [ 67.490808] bf20: 0000000000000000 0000000000000018 0000000000000001 0000000000000008 [ 67.498736] bf40: 0000aaaab6c698e8 0000ffffb575c540 0000000000000fff 0000000000000001 [ 67.506663] bf60: 0000aaaacb49e7d0 0000ffffb5859588 0000000000000004 0000aaaacb49e7d0 [ 67.514591] bf80: 0000000000000004 0000ffffb5859670 0000aaaab6c32000 0000000000000000 [ 67.522519] bfa0: 0000aaaab6c6a000 0000ffffc12f3c70 0000ffffb575f930 0000ffffc12f3c70 [ 67.530444] bfc0: 0000ffffb57b13dc 0000000020000000 0000000000000001 0000000000000040 [ 67.538371] bfe0: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 [ 67.546300] [<ffff000008083b18>] __sys_trace_return+0x0/0x4 [ 67.551968] Code: b5000001 d65f03c0 f9400000 8b214000 (b9400000) [ 67.558157] ---[ end trace 72215c33ce658969 ]--- Using runtime PM across suspend/resume fixes this crash. Still need to convert all clock work into runtime PM carefully. Signed-off-by: Oleksandr Suvorov <oleksandr.suvorov@toradex.com>
2019-07-31PCI: dwc: pci-dra7xx: Fix compilation when !CONFIG_GPIOLIBYueHaibing
[ Upstream commit 381ed79c8655a40268ee7391f716edd90c5c3a97 ] If CONFIG_GPIOLIB is not selected the compilation results in the following build errors: drivers/pci/controller/dwc/pci-dra7xx.c: In function dra7xx_pcie_probe: drivers/pci/controller/dwc/pci-dra7xx.c:777:10: error: implicit declaration of function devm_gpiod_get_optional; did you mean devm_regulator_get_optional? [-Werror=implicit-function-declaration] reset = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH); drivers/pci/controller/dwc/pci-dra7xx.c:778:45: error: ‘GPIOD_OUT_HIGH’ undeclared (first use in this function); did you mean ‘GPIOF_INIT_HIGH’? reset = devm_gpiod_get_optional(dev, NULL, GPIOD_OUT_HIGH); ^~~~~~~~~~~~~~ GPIOF_INIT_HIGH Fix them by including the appropriate header file. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> [lorenzo.pieralisi@arm.com: commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-07-12Merge tag 'v4.14.126' into 4.14-2.0.x-imxMax Krummenacher
This is the 4.14.126 stable release Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Conflicts: drivers/gpio/gpio-vf610.c: Follow commit 338aa10750ba gpio: vf610: Do not share irq_chip drivers/gpu/drm/bridge/adv7511/adv7511_drv.c: Follow commit 67793bd3b394 drm/bridge: adv7511: Fix low refresh rate selection Use drm_mode_vrefresh(mode) helper drivers/net/ethernet/freescale/fec_main.c: Keep downstream file. drivers/net/wireless/broadcom/brcm80211/brcmfmac/cfg80211.c Follow commit 46953f97224d brcmfmac: fix missing checks for kmemdup sound/soc/fsl/Kconfig: Follow commit ea751227c813 ASoC: imx: fix fiq dependencies Logical Conflicts: sound/soc/fsl/fsl_sai.c: Revert upstream d7325abe29b as downstream fixed it differently drivers/clk/imx/clk-imx6sl.c Revert upstream bda9f846ae0 as downstream implemented it differently 68c736e9378
2019-06-21pci-imx6.c: allow clean initalisation sequence for colibri imx8qxp pcie/wifiMax Krummenacher
- Port the driver to use the gpiod framework This allows to choose the polarity of the power_on and disable gpio in the device tree. - Actually use the gpios in the initialisation sequence Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> (cherry picked from commit 91aedb97b4e65c4afc66f5a5b8d670061addd80d) (cherry picked from commit 15a9d28286bba122f15e342cd40c6da7294b9bb6)
2019-06-21MLK-18433 PCI: imx: remove the lpcg_xxx clocks in driverRichard Zhu
Remove the lpcg_xxx clocks codes, since they are HW gated. These clocks controlled by HW, and would be turned on automatically, if there are access operations. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> (cherry picked from commit 9b8da32493057502a912b6d1426eadeb76780e69) Conflicts: arch/arm64/boot/dts/freescale/fsl-imx8qm.dtsi drivers/pci/host/pci-imx6.c Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> (cherry picked from commit 7615a560c48aeb53911c7a6f025420c0f9a5a51f) (cherry picked from commit 0507816aa4b9a4f5764d308b23332fc297e6fe0f) (cherry picked from commit 24258f088b89df68e5fa2c54eb3334ff50fcb8f0)
2019-06-21PCI: imx6: add external clock support for i.MX8QMStefan Agner
Add external reference clock via clock tree. This allows to model the shared reference clock provided via PCIE_SATA_REFCLK100M_P/N properly. Signed-off-by: Stefan Agner <stefan.agner@toradex.com> (cherry picked from commit db22e75903386929c76188978f28b3bf355322a0) Conflicts: drivers/pci/host/pci-imx6.c Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> (cherry picked from commit 57364eca822fb2803b6aa93257e93e0d4242282d) (cherry picked from commit f32040d9607bf3e7de57cf05733ae0b5d27b5640) (cherry picked from commit 1c51d5cc8d041a5dfe3a1793bb3767450cab3c1a)
2019-06-21Revert "pcie-imx6: add reset function for reseting downstream EP"Marcel Ziswiler
Rely on mainline mechanism. This reverts commit 7a376c99fbda16402bedb9bf9a09c1c84bf899f8.
2019-06-21Revert "pcie-imx6: improve reset function for reseting EP"Marcel Ziswiler
Rely on mainline mechanism. This reverts commit 8919fc15076365b46db93c9404314e22dfdd455c.
2019-06-21Revert "PCI: imx6: fix PCIe EP device self-initialisation"Marcel Ziswiler
Rely on mainline mechanism. This reverts commit 2a49ade0f97f565b9048af41913cb4881ba3f500.
2019-06-15PCI: keystone: Prevent ARM32 specific code to be compiled for ARM64Kishon Vijay Abraham I
[ Upstream commit f316a2b53cd7f37963ae20ec7072eb27a349a4ce ] hook_fault_code() is an ARM32 specific API for hooking into data abort. AM65X platforms (that integrate ARM v8 cores and select CONFIG_ARM64 as arch) rely on pci-keystone.c but on them the enumeration of a non-present BDF does not trigger a bus error, so the fixup exception provided by calling hook_fault_code() is not needed and can be guarded with CONFIG_ARM. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> [lorenzo.pieralisi@arm.com: commit log] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Sasha Levin <sashal@kernel.org>
2019-05-24PCI: imx6: fix PCIe EP device self-initialisationMarcel Ziswiler
This fixes PCIe EP device self-initialisation in case only a regular reset EP GPIO is used as PERST# which is e.g. the case on our Ixora carrier board by always waiting 20 milliseconds after releasing PERST#. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Acked-by: Max Krummenacher <max.krummenacher@toradex.com> (cherry picked from commit 3eaf56fc694e8b960a29e0205f40380cf59f9fc9) (cherry picked from commit 826486c65363059986fa12fa1eeb7c0e50c3af48)
2019-05-24pcie-imx6: improve reset function for reseting EPMax Krummenacher
If the reset gpio for a PCIe switch is invalid, but a gpio for reseting downstream EP devices is valid no reset pulse for the EP devices is generated. (i.e. in the device tree reset-gpio is not defined but reset-ep-gpio is defined) The patch fixes this. Original patch from Juha Kokkonen, Huoltamoeletroniikka Ky Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit f593ebc9921013a992c1d096bf4cbad17c1af01b) (cherry picked from commit 8437c2f0e4fafb9a31dd260704cc6b7a22bf33f8) Conflicts: drivers/pci/host/pci-imx6.c (cherry picked from commit fc0d0a29ab0e6fc0de72b63fba80845cc554d543)
2019-05-24pcie-imx6: add reset function for reseting downstream EPMax Krummenacher
With the following dtb node one can define a gpio to reset downstream endpoints. reset-ep-gpio = <...>; Currently the logic is 1 for reset asserted and 0 for reset deasserted. Some pcie switches require their downstream endpoints to be kept in reset for an additonal millisecond after their reset has been deasserted. Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com> Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> (cherry picked from commit 94a60e7f645965b1e422e4e80aa8ccb9e0ec845c) (cherry picked from commit f2bb337d37acd680404371d2530a486bfe821ce2) Conflicts: drivers/pci/host/pci-imx6.c (cherry picked from commit 557f0276856f1731264492ad82fe2f13e2d64831)
2019-05-08Merge branch 'linux-4.14.y_for_4.14-2.0.x-imx' into 4.14-2.0.x-imxPhilippe Schenker
2019-03-27PCI: designware-ep: Read-only registers need DBI_RO_WR_EN to be writableNiklas Cassel
commit 1cab826b30c6275d479a6ab1dea1067e15dbec62 upstream. Certain registers that pcie-designware-ep tries to write to are read-only registers. However, these registers can become read/write if we first enable the DBI_RO_WR_EN bit. Set/unset the DBI_RO_WR_EN bit before/after writing these registers. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-03-27PCI: designware-ep: dw_pcie_ep_set_msi() should only set MMC bitsNiklas Cassel
commit 099a95f3591ade29da52131895a3ba9f92a0e82c upstream. Previously, dw_pcie_ep_set_msi() wrote all bits in the Message Control register, thus overwriting the PCI_MSI_FLAGS_64BIT bit. By clearing the PCI_MSI_FLAGS_64BIT bit, we break MSI on systems where the RC has set a 64 bit MSI address. Fix dw_pcie_ep_set_msi() so that it only sets MMC bits. Tested-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com> Signed-off-by: Niklas Cassel <niklas.cassel@axis.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Joao Pinto <jpinto@synopsys.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-02-12MLK-20142-2 PCI: imx: refine codes in the initializationRichard Zhu
- replace the sleep by the udelay, since it would be used in the no_irq_suspend/resume callbacks. - aligned the retries to the PHY_PLL_LOCK_WAIT_MAX_RETRIES Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-20099-2 PCI: imx: use ext osc as pcie refclk on 8mmRichard Zhu
Use the external osc as the pcie refclk on 8mm evk board. - Do not turn off the over ride of rc's clkreq#, when L1SS is not enabled. NOTE: L1SS_EN would be set at both RC and EP by pcie_config_aspm_link when the L1SS is supported by the link. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-19959 PCI: imx: make sure the sysfile api is add properlyRichard Zhu
Make sure that the sysfile api of the pcie ep is add properly. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Acked-by: Fugang Duan <fugang.duan@nxp.com>
2019-02-12MLK-19932 PCI: imx: make sure the ref_clk is enabledRichard Zhu
In the EP RC validation system, EP wouldn't set RC's CLK_REQ# to low, like one real inserted EP device to do. Let RC to set the over ride low and enabled, make sure that REF_CLK of RC side is turned on. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Fugang Duan <fugang.duan@nxp.com>
2019-02-12MLK-19412 PCI: imx: keep clkreq# active in compliance testsRichard Zhu
- Do not de-assert the clkreq# when compliance tests mode is enabled, make sure that the ref_clk is turned on. - Correct the PLL lock bit check point. - Adjust the TRSV PHY registers to pass the compliance tests. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-19113-2 PCI: imx: enable the l1.1 aspm on imx8mmRichard Zhu
Enable the L1.1 ASPM support on iMX8MM, and verified the EVK board. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-19088-2 PCI: imx: enable the l1.1 aspm support on imx8mqRichard Zhu
- Enable the L1.1 ASPM support on iMX8MQ, and verified on the both PCIe ports of the EVK board. - Fix the L1 exit latency larger than 64us issue Otherwise, the L1/L1.1 ASPM would be disabled in the initialization. - Add the internal PLL of the PCIe REF_CLK support, and verify the L1.1 ASPM on port0 of 8MQ EVK board Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-18953 PCI: imx: fix the building warningRichard Zhu
- warning: ‘retries’ may be used uninitialized in this function - WARNING: vmlinux.o(.data+0x5d2d8): Section mismatch in reference from the variable imx_pcie_driver to the function .init.text:imx_pcie_probe() The variable imx_pcie_driver references the function __init imx_pcie_probe() If the reference is valid then annotate the variable with __init* or __refdata (see linux/init.h) or name the variable: *_template, *_timer, *_sht, *_ops, *_probe, *_probe_one, *_console Signed-off-by: Jason Liu <jason.hui.liu@nxp.com> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-18559 PCI: imx: fix crash when request reserved regionRichard Zhu
Fix the crash when pcie request the reserved memory region after the -EPROBE_DEFER in the probe. The pointer of the resource parameter would be invalided in the second probe. Use one structure varible to replace it. Put node after done with it, after call of_parse_phandle. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-18515-2 PCI: imx: get reserved region for ep rc ddr test regionRichard Zhu
PCIe ep rc validation is one remote processors communications. Remove the hard-coded ep rc ddr test region on imx8 platforms. Get the reserved region for ep rc ddr test region. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-17880 PCI: imx: fix the imx6q pcie resume hangRichard Zhu
The perst signal shouldn't be asserted during imx6q/dl pcie suspend. Otherwise, the link would be down during resume, and system would be hang. Fix it by one return in imx6q switch case. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-18298-4 PCI: imx: enable imx8mm pcie supportRichard Zhu
enable imx8mm pcie support. BTW, the power management is not supported yet. Disable pcie module, if you test power management on the imx8mm platforms. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-11780 PCI: imx: correct some type mistakesRichard Zhu
- They should be bitwise logic, not the boolean logic. - Correct the error return values. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-17731 PCI: dwc: implement MSI-X supportRichard Zhu
The DWC MSI controller does not support different MSI-X target addresses and does not allow to route individual IRQs to different CPUs. Aside from those shortcomings it is able to support MSI-X just fine. Some devices like the Intel i210 network controller depend on MSI-X to be available to enable all hardware features, so even a feature limited implementation of MSI-X on the host side is useful. Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-17544 PCI: imx: change the imx6 specific nameRichard Zhu
Replace the specific name imx6_xxx by imx_xxx. Since all imx6/7/8 PCIe use the same driver. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> During 4.14 rebase remade this manually Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
2019-02-12MLK-17552-2 PCI: imx: enable imx pcie ep dmaRichard Zhu
Enable the imx pcie ep dma in the pcie ep rc validation system. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-16982 PCI: imx: fix the failure of the msi verificationRichard Zhu
Failed to verify the MSI in the EP RC system. Root cause: the MSI address is not fetched corretly. The second port of iMX8MQ EVK board should be used as EP port, not the first one. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <frank.li@nxp.com>
2019-02-12MLK-16818-2 PCI: imx: enable the pcie ep rc for imx8Richard Zhu
Enable the PCIE EP RC for iMX8 RC access memory of EP: - EP: write the <ddr_region_address> to the bar0 of ep. - RC: access the <mem_base_address>, and this address would be mapped to the <ddr_region_address> of ep. Note: ddr_region_address mem_base_addr bar0_addr imx8mq 0xb820_0000 0x2000_0000 0x33c0_0010 imx8qxp 0xb820_0000 0x6000_0000 0x5f00_0010 imx8qm 0xb820_0000 0x7000_0000 0x5f01_0010 MSI verification: - EP: write 0 to the <msi_addr>, for example ./memtool -32 <msi_addr>=0 - RC: check the msi is triggered or not. cat /proc/interrupts | grep msi Note: The msi_addr can be get by the following command after RC platform is boot up. For example root@imx8_all:~# dmesg | grep msi_addr [ 2.670247] pci_msi_addr = 0x7ff80000, cpu_base 0x80000000 msi_addr imx8mq 0x27f8_0000 imx8qxp 0x6ff8_0000 imx8qm 0x7ff8_0000 iMX8QM: BuildInfo: - SCFW daabd5d3, IMX-MKIMAGE 0ad6069a, ATF 93dd1cc - U-Boot 2017.03-imx_v2017.03+gc662e0a iMX8QXP: BuildInfo: - SCFW daabd5d3, IMX-MKIMAGE 0ad6069a, ATF 93dd1cc - U-Boot 2017.03-imx_v2017.03+gc662e0a Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-16836 PCI: imx: add the bus freq sysfile interfaceRichard Zhu
To support the bus freq power saving mode, add the sysfile interface. request bus high: echo 1 > /sys/devices/platform/xxxxxxxx.pcie/bus_freq release bus high: echo 1 > /sys/devices/platform/xxxxxxxx.pcie/bus_freq Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-16830 PCI: imx: fix boot failulre when the pll is not lockedRichard Zhu
Return the error when the pll is not locked. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Reviewed-by: Frank Li <frank.li@nxp.com>
2019-02-12MLK-16817-2 PCI: imx: enable the pm on imx8qm/qxpRichard Zhu
Enable the pcie pm on imx8qm/qxp Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
2019-02-12MLK-16777 PCI: imx: enable pcie pm on mscaleRichard Zhu
Enable the PCIE PM on mScale. - Refine the codes. Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-27 20:47:23 +0000