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2016-11-17phy: twl4030-usb: Fix for musb session bit based PMTony Lindgren
Now with musb driver implementing generic session bit based PM, we need to have the USB PHYs behaving in a sane way for platforms implementing PM. Currently twl4030-usb enables PM in twl4030_phy_power_on() and then disables it in twl4030_phy_power_off(). This will block PM runtime for the SoC when no cable is connected. Fix the issue by moving PM runtime autosuspend call to happen where it gets called in twl4030_phy_power_on(). Note that this patch should not be backported to anything before commit 467d5c980709 ("usb: musb: Implement session bit based runtime PM for musb-core") as before that all the glue layers implemented their own PM. Fixes: 467d5c980709 ("usb: musb: Implement session bit based runtime PM for musb-core") Tested-by: Ladislav Michl <ladis@linux-mips.org> Tested-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Bin Liu <b-liu@ti.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-11-05phy: sun4i: check PMU presence when poking unknown bit of pmuIcenowy Zheng
Allwinner SoC's PHY 0, when used as OTG controller, have no pmu part. The code that poke some unknown bit of PMU for H3/A64 didn't check the PHY, and will cause kernel oops when PHY 0 is used. This patch will check whether the pmu is not NULL before poking. Fixes: b3e0d141ca9f (phy: sun4i: add support for A64 usb phy) Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-11-05phy-rockchip-pcie: remove deassert of phy_rst from exit callbackShawn Lin
The deassert of phy_rst from exit callback is incorrect as when doing phy_exit, we expect the phy_rst is on asserted state which was done by power_off callback, but not deasserted state. Meanwhile when disabling clk_pciephy_ref, the assert/deassert signal can't actually take effect on the phy. So let's fix it anyway. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-11-05phy: da8xx-usb: rename the ohci device to ohci-da8xxAxel Haslam
The ohci device name has changed in the board configuraion files, hence, change the phy lookup table to match the new name. Signed-off-by: Axel Haslam <ahaslam@baylibre.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-14phy-twl4030-usb: initialize charging-related stuff via pm_runtimeAndreas Kemnade
twl4030_phy_power_on() initializes some bits which are required for charging. As they are not set in twl4030_usb_runtime_resume() a call to pm_runtime_get_sync() is not sufficient to enable charging. This patch moves the initialization to twl4030_usb_runtime_resume() so everything needed for charging is initialized upon pm_runtime_get_sync(). That also gives improved possibilities to debug problems in that area because the relevant parts can be checked separately. Charging can be enabled without having the musb subsystem active. As a side effect this hides some bugs in musb which causes unbalanced calls to phy_power_off()/phy_power_on() so that phy->power_count becomes -1. The result is that e.g. the GTA04 phone (dm3730 + twl4030) works finally as a usb gadget again and charging is working. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Acked-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-14phy-twl4030-usb: better handle musb_mailbox() failureAndreas Kemnade
setting twl->linkstat = MUSB_UNKNOWN upon error in musb_mailbox as introduced in commit 12b7db2bf8b8 ("usb: musb: Return error value from musb_mailbox") causes twl4030_usb_irq() to not detect a state change form cable connected to cable disconnected after such an error so that pm_runtime_put_autosuspend() will not be called and the usage counter gets unbalanced. Such errors happen e.g. if the omap2430 module is not (yet) loaded during plug/unplug events. This patch introduces a flag instead that indicates whether there is information for the musb_mailbox pending and calls musb_mailbox() if that flag is set. Signed-off-by: Andreas Kemnade <andreas@kemnade.info> Tested-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: sun4i-usb: Use spinlock to guard phyctl register accessChen-Yu Tsai
The musb driver calls into this phy driver to disable/enable squelch detection. This function was introduced in 24fe86a617c5 ("phy: sun4i-usb: Add a sunxi specific function for setting squelch-detect"). This function in turn calls sun4i_usb_phy_write, which uses a mutex to guard the common access register. Unfortunately musb does this in atomic context, which results in the following warning with lock debugging enabled: BUG: sleeping function called from invalid context at kernel/locking/mutex.c:97 in_atomic(): 1, irqs_disabled(): 128, pid: 96, name: kworker/0:2 CPU: 0 PID: 96 Comm: kworker/0:2 Not tainted 4.8.0-rc4-00181-gd502f8ad1c3e #13 Hardware name: Allwinner sun8i Family Workqueue: events musb_deassert_reset [<c010bc01>] (unwind_backtrace) from [<c0109237>] (show_stack+0xb/0xc) [<c0109237>] (show_stack) from [<c02a669b>] (dump_stack+0x67/0x74) [<c02a669b>] (dump_stack) from [<c05d68c9>] (mutex_lock+0x15/0x2c) [<c05d68c9>] (mutex_lock) from [<c02c3589>] (sun4i_usb_phy_write+0x39/0xec) [<c02c3589>] (sun4i_usb_phy_write) from [<c03e6327>] (musb_port_reset+0xfb/0x184) [<c03e6327>] (musb_port_reset) from [<c03e4917>] (musb_deassert_reset+0x1f/0x2c) [<c03e4917>] (musb_deassert_reset) from [<c012ecb5>] (process_one_work+0x129/0x2b8) [<c012ecb5>] (process_one_work) from [<c012f5e3>] (worker_thread+0xf3/0x424) [<c012f5e3>] (worker_thread) from [<c0132dbd>] (kthread+0xa1/0xb8) [<c0132dbd>] (kthread) from [<c0105f31>] (ret_from_fork+0x11/0x20) Since the register access is mmio, we can use a spinlock to guard this specific access, rather than the mutex that guards the entire phy. Fixes: ba4bdc9e1dc0 ("PHY: sunxi: Add driver for sunxi usb phy") Cc: Hans de Goede <hdegoede@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeupRandy Li
It is a hardware bug in RK3288, the only way to solve it is to reset the phy. Signed-off-by: Randy Li <ayaka@soulik.info> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: Add reset callbackRandy Li
The only use for this is for solving a hardware design problem in usb of Rockchip RK3288. Signed-off-by: Randy Li <ayaka@soulik.info> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy-sun4i-usb: Warn when external vbus is detectedHans de Goede
Warn when external vbus is detected when we're trying to enable our own vbus. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy-sun4i-usb: Add support for phy_set_modeHans de Goede
Together with some musb sunxi glue changes this allows run-time dr_mode switching support via the "mode" musb sysfs attribute. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy-sun4i-usb: Simplify missing dr_mode handlingHans de Goede
If we cannot get dr_mode or no id gpio is specified simply assume peripheral mode, as this is always safe. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy-sun4i-usb: Refactor forced session endingHans de Goede
The phy-sun4i-usb code supports forced ending a session on systems which lack Vbus detection, to allow switching between host and peripheral mode on such systems. Role switching via the musb driver "mode" sysfs attribute requires force ending the session too. This commit refactors the code to allow other parts of the phy-sun4i-usb code to request a forced session end. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy-sun4i-usb: Use bool where appropriateHans de Goede
We're using bool as true/false type in most places in phy-sun4i-usb.c for consistency fixup the remaining uses of ints which are ever only 0 or 1 to be bools too. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: rockchip-typec: add pm runtime supportChris Zhong
Adds pm_runtime support for rockchip Type-C, so that power domain is enabled only when there is a transaction going on to help save power. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10usb: phy: add USB_SUPPORT dependencyArnd Bergmann
The driver now calls of_usb_get_dr_mode_by_phy, which is part of the USB core layer, and it fails to build when that is not provided: drivers/phy/phy-sun4i-usb.o: In function `sun4i_usb_phy_probe': phy-sun4i-usb.c:(.text.sun4i_usb_phy_probe+0x140): undefined reference to `of_usb_get_dr_mode_by_phy' We already have a couple of other PHY drivers with a dependency on USB_SUPPORT, so that seems to be the easiest fix here. An alternative would be to adjust the #ifdef in include/linux/usb/of.h to also check for CONFIG_USB_SUPPORT. Signed-off-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Fixes: b33ecca87df9 ("phy-sun4i-usb: Add support for peripheral-only mode") Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: Add USB Type-C PHY driver for rk3399Chris Zhong
Add a PHY provider driver for the rk3399 SoC Type-c PHY. The USB Type-C PHY is designed to support the USB3 and DP applications. The USB3 operates in SuperSpeed mode and the DP can operate at RBR, HBR and HBR2 data rates. This driver create 2 PHY devices separately for USB3 and DisplyPort, and registers them under the child node. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Reviewed-by: Guenter Roeck <groeck@chromium.org> Tested-by: Guenter Roeck <groeck@chromium.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: da8xx-usb: Fix syscon device nameDavid Lechner
The syscon device in board config/device tree has been renamed. Signed-off-by: David Lechner <david@lechnology.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: rockchip-inno-usb2: add COMMON_CLK dependencyFrank Wang
On kernel builds without COMMON_CLK, the newly added rockchip-inno-usb2 driver fails to build: drivers/phy/phy-rockchip-inno-usb2.c:124:16: error: field 'clk480m_hw' has incomplete type struct clk_hw clk480m_hw; In file included from include/linux/clk.h:16:0 from drivers/phy/phy-rockchip-inno-usb2.c:17: include/linux/kernel.h:831:48: error: initialization from incompatible pointer type [-Werror=incompatible-pointer-types] const typeof( ((type *)0)->member ) *__mptr = (ptr); \ ... ... Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Heiko Stuebner <heiko@sntech.de>
2016-09-10phy: omap-usb2: support suspend/resumeSekhar Nori
Relying on PM-ops for shutting down PHY clocks was a bad idea since the users (e.g. USB DWC3) might not have been suspended by then. Get rid of all PM-ops. It is the sole responsibility of the PHY user to properly turn OFF and de-initialize the PHY as part of its suspend routine. Enable/disable PHY clock as part of ->init()/->exit() call respectively. With this phy_init() and phy_exit() can be called by PHY user during suspend/resume. This is similar to what is done for ti-pipe3 driver. See 31c8954efb1b ("phy: ti-pipe3: fix suspend") The pm_runtime_enable() call in omap_usb2_probe() is still required because without it, phy_create() will not enable runtime PM on the phy device it creates and phy_init() will not call pm_runtime_get_sync(). Without pm_runtime_get_sync(), ocp2scp hwmod will _not_ enable the IP and, thus, we will have abort exceptions. Signed-off-by: Sekhar Nori <nsekhar@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: rcar-gen3-usb2: Add a compatible string for r8a7796Yoshihiro Shimoda
This driver can support for r8a7796 SoC. So, this patch adds it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: bcm-ns2-pcie: Set missing .owner field in ns2_pci_phy_opsAxel Lin
Add missing .owner field in ns2_pci_phy_ops, which is used for refcounting. While at it, also makes ns2_pci_phy_ops const as it's never get modified. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-and-tested-by: Jon Mason <jon.mason@broadcom.com> Reviewed-by: Pramod Kumar <pramodku@broadcom.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: bcm-ns2-pcie: Get rid of struct ns2_pci_phyAxel Lin
By setting phy_set_drvdata(phy, mdiodev), struct ns2_pci_phy can be removed. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-and-tested-by: Jon Mason <jon.mason@broadcom.com> Reviewed-by: Pramod Kumar <pramodku@broadcom.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: tegra: mark tegra_xusb_lane_lookup_function() staticBaoyou Xie
We get 1 warning when building kernel with W=1: drivers/phy/tegra/xusb.c:104:5: warning: no previous prototype for 'tegra_xusb_lane_lookup_function' [-Wmissing-prototypes] In fact, this function is only used in the file in which it is declared and don't need a declaration, but can be made static. So this patch marks it 'static'. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: tegra: add missing header dependenciesBaoyou Xie
We get 5 warnings when building kernel with W=1: drivers/phy/tegra/xusb.c:948:27: warning: no previous prototype for 'tegra_xusb_padctl_get' [-Wmissing-prototypes] drivers/phy/tegra/xusb.c:981:6: warning: no previous prototype for 'tegra_xusb_padctl_put' [-Wmissing-prototypes] drivers/phy/tegra/xusb.c:988:5: warning: no previous prototype for 'tegra_xusb_padctl_usb3_save_context' [-Wmissing-prototypes] drivers/phy/tegra/xusb.c:998:5: warning: no previous prototype for 'tegra_xusb_padctl_hsic_set_idle' [-Wmissing-prototypes] drivers/phy/tegra/xusb.c:1008:5: warning: no previous prototype for 'tegra_xusb_padctl_usb3_set_lfps_detect' [-Wmissing-prototypes] In fact, these functions are declared in linux/phy/tegra/xusb.h, so this patch adds missing header dependencies. Signed-off-by: Baoyou Xie <baoyou.xie@linaro.org> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: add a driver for the Rockchip SoC internal PCIe PHYShawn Lin
This patch to add a generic PHY driver for rockchip PCIe PHY. Access the PHY via registers provided by GRF (general register files) module. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: rockchip-inno-usb2: add a new driver for Rockchip usb2phyFrank Wang
The newer SoCs (rk3366, rk3399) take a different usb-phy IP block than rk3288 and before, and most of phy-related registers are also different from the past, so a new phy driver is required necessarily. Signed-off-by: Frank Wang <frank.wang@rock-chips.com> Suggested-by: Heiko Stuebner <heiko@sntech.de> Suggested-by: Guenter Roeck <linux@roeck-us.net> Suggested-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: qcom-ufs: use of_property_read_boolJulia Lawall
Use of_property_read_bool to check for the existence of a property. The semantic patch that makes this change is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e1,e2,x; @@ - if (of_get_property(e1,e2,NULL)) - x = true; - else - x = false; + x = of_property_read_bool(e1,e2); // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: bcm-ns-usb3: new driver for USB 3.0 PHY on NorthstarRafał Miłecki
Northstar is a family of SoCs used in home routers. They have USB 2.0 and 3.0 controllers with PHYs that need to be properly initialized. This driver provides PHY init support in a generic way and can be bound with XHCI controller driver. There aren't any public datasheets from Broadcom so we can't have nice defines for all used bits. It means we just follow Broadcom's initialization procedure using their magic values. We were quite lucky actually that Broadcom put some comments in their SDK reference code explaining what given writes are responsible for. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: sun4i: add support for A64 usb phyIcenowy Zheng
There's something unknown in the pmu part that shared with H3. It's renamed as PMU_UNK1 from PMU_UNK_H3. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-09-10phy: exynos5-usbdrd: Remove "static" from local variableAxel Lin
The 'reg' local variable does not need to be static. Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-08-12phy: sun9i-usb: fix error handlingChristophe JAILLET
This is likely that checking 'phy->hsic_clk' instead of 'phy->clk' is expected here. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Acked-by: Chen-Yu Tsai <wens@csie.org Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-08-12phy: brcm-sata: Return proper error if brcm_sata_phy_init failsAxel Lin
Return proper error instead of 0 if brcm_sata_phy_init fails. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-08-12phy-sun4i-usb: Add support for peripheral-only modeHans de Goede
Use the new of_usb_get_dr_mode_by_phy() function to get the dr_mode from the musb controller node instead of assuming that having an id_det gpio means otg mode, and not having one means host mode. Implement peripheral-only mode by adding a sun4i_usb_phy0_get_id_det helper which looks at the dr_mode, always registering our extcon and always monitoring vbus. If dr_mode is not specified in the dts, do not register phy0 as we then do not know how to treat it. This is actually a good thing as this means we will not be registering phy0 on devices where the otg controller is not enabled in the devicetree. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-07-31Merge tag 'mmc-v4.8' of git://git.linaro.org/people/ulf.hansson/mmcLinus Torvalds
Pull MMC updates from Ulf Hansson: "MMC core: - A couple of changes to improve the support for erase/discard/trim cmds - Add eMMC HS400 enhanced strobe support - Show OCR and DSR registers in SYSFS for MMC/SD cards - Correct and improve busy detection logic for MMC switch (CMD6) cmds - Disable HPI cmds for certain broken Hynix eMMC cards - Allow MMC hosts to specify non-support for SD and MMC cmds - Some minor additional fixes MMC host: - sdhci: Re-works, fixes and clean-ups - sdhci: Add HW auto re-tuning support - sdhci: Re-factor code to prepare for adding support for eMMC CMDQ - sdhci-esdhc-imx: Fixes and clean-ups - sdhci-esdhc-imx: Update system PM support - sdhci-esdhc-imx: Enable HW auto re-tuning - sdhci-bcm2835: Remove driver as sdhci-iproc is used instead - sdhci-brcmstb: Add new driver for Broadcom BRCMSTB SoCs - sdhci-msm: Add support for UHS cards - sdhci-tegra: Improve support for UHS cards - sdhci-of-arasan: Update phy support for Rockchip SoCs - sdhci-of-arasan: Deploy enhanced strobe support - dw_mmc: Some fixes and clean-ups - dw_mmc: Enable support for erase/discard/trim cmds - dw_mmc: Enable CMD23 support - mediatek: Some fixes related to the eMMC HS400 support - sh_mmcif: Improve support for HW busy detection - rtsx_pci: Enable support for erase/discard/trim cmds" * tag 'mmc-v4.8' of git://git.linaro.org/people/ulf.hansson/mmc: (135 commits) mmc: rtsx_pci: Remove deprecated create_singlethread_workqueue mmc: rtsx_pci: Enable MMC_CAP_ERASE to allow erase/discard/trim requests mmc: rtsx_pci: Use the provided busy timeout from the mmc core mmc: sdhci-pltfm: Drop define for SDHCI_PLTFM_PMOPS mmc: sdhci-pltfm: Convert to use the SET_SYSTEM_SLEEP_PM_OPS mmc: sdhci-pltfm: Make sdhci_pltfm_suspend|resume() static mmc: sdhci-esdhc-imx: Use common sdhci_suspend|resume_host() mmc: sdhci-esdhc-imx: Assign system PM ops within #ifdef CONFIG_PM_SLEEP mmc: sdhci-sirf: Remove non needed #ifdef CONFIG_PM* for dev_pm_ops mmc: sdhci-s3c: Remove non needed #ifdef CONFIG_PM for dev_pm_ops mmc: sdhci-pxav3: Remove non needed #ifdef CONFIG_PM for dev_pm_ops mmc: sdhci-of-esdhc: Simplify code by using SIMPLE_DEV_PM_OPS mmc: sdhci-acpi: Simplify code by using SET_SYSTEM_SLEEP_PM_OPS mmc: sdhci-pci-core: Simplify code by using SET_SYSTEM_SLEEP_PM_OPS mmc: Change the max discard sectors and erase response when HW busy detect phy: rockchip-emmc: Wait even longer for the DLL to lock phy: rockchip-emmc: Be tolerant to card clock of 0 in power on mmc: sdhci-of-arasan: Revert: Always power the PHY off/on when clock changes mmc: sdhci-msm: Add support for UHS cards mmc: sdhci-msm: Add set_uhs_signaling() implementation ...
2016-07-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-nextLinus Torvalds
Pull networking updates from David Miller: 1) Unified UDP encapsulation offload methods for drivers, from Alexander Duyck. 2) Make DSA binding more sane, from Andrew Lunn. 3) Support QCA9888 chips in ath10k, from Anilkumar Kolli. 4) Several workqueue usage cleanups, from Bhaktipriya Shridhar. 5) Add XDP (eXpress Data Path), essentially running BPF programs on RX packets as soon as the device sees them, with the option to mirror the packet on TX via the same interface. From Brenden Blanco and others. 6) Allow qdisc/class stats dumps to run lockless, from Eric Dumazet. 7) Add VLAN support to b53 and bcm_sf2, from Florian Fainelli. 8) Simplify netlink conntrack entry layout, from Florian Westphal. 9) Add ipv4 forwarding support to mlxsw spectrum driver, from Ido Schimmel, Yotam Gigi, and Jiri Pirko. 10) Add SKB array infrastructure and convert tun and macvtap over to it. From Michael S Tsirkin and Jason Wang. 11) Support qdisc packet injection in pktgen, from John Fastabend. 12) Add neighbour monitoring framework to TIPC, from Jon Paul Maloy. 13) Add NV congestion control support to TCP, from Lawrence Brakmo. 14) Add GSO support to SCTP, from Marcelo Ricardo Leitner. 15) Allow GRO and RPS to function on macsec devices, from Paolo Abeni. 16) Support MPLS over IPV4, from Simon Horman. * git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1622 commits) xgene: Fix build warning with ACPI disabled. be2net: perform temperature query in adapter regardless of its interface state l2tp: Correctly return -EBADF from pppol2tp_getname. net/mlx5_core/health: Remove deprecated create_singlethread_workqueue net: ipmr/ip6mr: update lastuse on entry change macsec: ensure rx_sa is set when validation is disabled tipc: dump monitor attributes tipc: add a function to get the bearer name tipc: get monitor threshold for the cluster tipc: make cluster size threshold for monitoring configurable tipc: introduce constants for tipc address validation net: neigh: disallow transition to NUD_STALE if lladdr is unchanged in neigh_update() MAINTAINERS: xgene: Add driver and documentation path Documentation: dtb: xgene: Add MDIO node dtb: xgene: Add MDIO node drivers: net: xgene: ethtool: Use phy_ethtool_gset and sset drivers: net: xgene: Use exported functions drivers: net: xgene: Enable MDIO driver drivers: net: xgene: Add backward compatibility drivers: net: phy: xgene: Add MDIO driver ...
2016-07-26Merge branch 'for-4.8' of ↵Linus Torvalds
git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata Pull libata updates from Tejun Heo: "libata saw quite a bit of activities in this cycle: - SMR drive support still being worked on - bug fixes and improvements to misc SCSI command emulation - some low level driver updates" * 'for-4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/libata: (39 commits) libata-scsi: better style in ata_msense_*() AHCI: Clear GHC.IS to prevent unexpectly asserting INTx ata: sata_dwc_460ex: remove redundant dev_err call ata: define ATA_PROT_* in terms of ATA_PROT_FLAG_* libata: remove ATA_PROT_FLAG_DATA libata: remove ata_is_nodata ata: make lba_{28,48}_ok() use ATA_MAX_SECTORS{,_LBA48} libata-scsi: minor cleanup for ata_scsi_zbc_out_xlat libata-scsi: Fix ZBC management out command translation libata-scsi: Fix translation of REPORT ZONES command ata: Handle ATA NCQ NO-DATA commands correctly libata-eh: decode all taskfile protocols ata: fixup ATA_PROT_NODATA libsas: use ata_is_ncq() and ata_has_dma() accessors libata: use ata_is_ncq() accessors libata: return boolean values from ata_is_* libata-scsi: avoid repeated calculation of number of TRIM ranges libata-scsi: reject WRITE SAME (16) with n_block that exceeds limit libata-scsi: rename ata_msense_ctl_mode() to ata_msense_control() libata-scsi: fix D_SENSE bit relection in control mode page ...
2016-07-25phy: rockchip-emmc: Wait even longer for the DLL to lockDouglas Anderson
Two times out of 2000 reboots I ran into the error message "rockchip_emmc_phy_power: dllrdy timeout". Presumably there is some corner case where the DLL just takes a little longer to timeout. Let's give it even more time to handle these corner cases. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25phy: rockchip-emmc: Be tolerant to card clock of 0 in power onDouglas Anderson
It's possible that there are some reasons to turn the PHY on while the clock is 0. In this case we just won't wait for the DLL to lock. This is a bit of a stopgap until we figure out exactly when we're supposed to wait for the DLL to lock and when we're supposed to power cycle the PHY. Note: this patch should help with suspend/resume where the system will try to turn the PHY back on when the clock is 0. Signed-off-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25phy: rockchip-emmc: Set phyctrl_frqsel based on card clockDouglas Anderson
The "phyctrl_frqsel" is described in the Arasan datasheet [1] as "the frequency range of DLL operation". Although the Rockchip variant of this PHY has different ranges than the reference Arasan PHY it appears as if the functionality is similar. We should set this phyctrl field properly. Note: as per Rockchip engineers, apparently the "phyctrl_frqsel" is actually only useful in HS200 / HS400 modes even though the DLL itself it used for some purposes in all modes. See the discussion in the earlier change in this series: ("mmc: sdhci-of-arasan: Always power the PHY off/on when clock changes"). In any case, it shouldn't hurt to set this always. Note that this change should allow boards to run at HS200 / HS400 speed modes while running at 100 MHz or 150 MHz. In fact, running HS400 at 150 MHz (giving 300 MB/s) is the main motivation of this series, since performance is still good but signal integrity problems are less prevelant at 150 MHz. [1]: https://arasan.com/wp-content/media/eMMC-5-1-Total-Solution_Rev-1-3.pdf Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25phy: rockchip-emmc: Minor code cleanup in rockchip_emmc_phy_power_on/off()Douglas Anderson
There's no reason to store the return value of rockchip_emmc_phy_power() in a variable nor to check it. Just return it. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25phy: rockchip-emmc: Increase lock time allowanceDouglas Anderson
Previous PHY code waited a fixed amount of time for the DLL to lock at power on time. Unfortunately, the time for the DLL to lock is actually a bit more dynamic and can be longer if the card clock is slower. Instead of waiting a fixed 30 us, let's now dynamically wait until the lock bit gets set. We'll wait up to 10 ms which should be OK even if the card clock is at the super slow 100 kHz. On its own, this change makes the PHY power on code a little more robust. Before this change the PHY was relying on the eMMC code to make sure the PHY was only powered on when the card clock was set to at least 50 MHz before, though this reliance wasn't documented anywhere. This change will be even more useful in future changes where we actually need to be able to wait for a DLL lock at slower clock speeds. Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Shawn Lin <shawn.lin@rock-chips.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25phy: rockchip-emmc: reindent the register definitionsBrian Norris
Some of the spacing was wrong (spaces instead of tabs), and due to longer entries added later, the columns weren't aligned. Let's get everything consistent. Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25phy: rockchip-emmc: configure default output tap delayBrian Norris
The output tap delay controls helps maintain the hold requirements for eMMC. The exact value is dependent on the SoC and other factors, though it isn't really an exact science. But the default of 0 is not very good, as it doesn't give the eMMC much hold time, so let's bump up to 4 (approx 90 degree phase?). If we need to configure this any further (e.g., based on board or speed factors), we may need to consider a device tree representation. Suggested-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25phy: rockchip-emmc: configure frequency range and drive impedanceShawn Lin
Signal integrity analysis has suggested we set these values. Do this in power_on(), so that they get reconfigured after suspend/resume. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-25phy: rockchip-emmc: give DLL some extra time to be readyShawn Lin
According to the databook, 10.2us is the max time for dll to be ready to work. However in testing, some chips need 20us for dll to be ready. This patch adds some extra margin for dllrdy to be ready, fixing our -ETIMEDOUT issues. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Kishon Vijay Abraham I <kishon@ti.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2016-07-14Merge tag 'phy-for-4.8-rc1' of ↵Greg Kroah-Hartman
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-testing Kishon writes: phy: for 4.8 -rc1 *) Add a new phy_ops for setting the phy mode *) Add a new phy driver for DA8xx SoC USB PHY *) Minor fixes and cleanups Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2016-07-06Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/netDavid S. Miller
Conflicts: drivers/net/ethernet/mellanox/mlx5/core/en.h drivers/net/ethernet/mellanox/mlx5/core/en_main.c drivers/net/usb/r8152.c All three conflicts were overlapping changes. Signed-off-by: David S. Miller <davem@davemloft.net>
2016-07-04Merge 4.7-rc6 into usb-nextGreg Kroah-Hartman
We want the USB fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-07-04phy: rcar-gen3-usb2: fix mutex_lock calling in interruptYoshihiro Shimoda
This patch fixes an issue that the extcon_set_cable_state_() is possible to cause "BUG: scheduling while atomic" because this driver calls extcon_set_cable_state_() in the interrupt handler and mutex_lock() is possible to be called by like the following call trace. So, this patch adds a workqueue function to resolve this issue. [ 9.706504] BUG: scheduling while atomic: systemd-journal/25893/0x00010303 [ 9.714569] Modules linked in: [ 9.717629] CPU: 0 PID: 25893 Comm: systemd-journal Not tainted 4.7.0-rc4+ #86 [ 9.724844] Hardware name: Renesas Salvator-X board based on r8a7795 (DT) [ 9.731624] Call trace: [ 9.734077] [<ffff0000080889f0>] dump_backtrace+0x0/0x1a8 [ 9.739470] [<ffff000008088bac>] show_stack+0x14/0x20 [ 9.744520] [<ffff000008348ab4>] dump_stack+0x94/0xb8 [ 9.749568] [<ffff0000080da18c>] __schedule_bug+0x44/0x58 [ 9.754966] [<ffff0000087c6394>] __schedule+0x4e4/0x598 [ 9.760185] [<ffff0000087c6484>] schedule+0x3c/0xa8 [ 9.765057] [<ffff0000087c6928>] schedule_preempt_disabled+0x20/0x38 [ 9.771408] [<ffff0000080f20dc>] mutex_optimistic_spin+0x18c/0x1d0 [ 9.777583] [<ffff0000087c7ef0>] __mutex_lock_slowpath+0x38/0x140 [ 9.783669] [<ffff0000087c803c>] mutex_lock+0x44/0x60 [ 9.788717] [<ffff00000834ca48>] kobject_uevent_env+0x250/0x500 [ 9.794634] [<ffff0000086ae8c0>] extcon_update_state+0x220/0x298 [ 9.800634] [<ffff0000086ae9d8>] extcon_set_cable_state_+0x78/0x88 [ 9.806812] [<ffff000008376004>] rcar_gen3_device_recognition+0x5c/0xe0 [ 9.813420] [<ffff0000083761bc>] rcar_gen3_phy_usb2_irq+0x3c/0x48 [ 9.819509] [<ffff0000080fae94>] handle_irq_event_percpu+0x94/0x140 [ 9.825769] [<ffff0000080faf88>] handle_irq_event+0x48/0x78 [ 9.831334] [<ffff0000080fe620>] handle_fasteoi_irq+0xb8/0x1b0 [ 9.837162] [<ffff0000080fa3c4>] generic_handle_irq+0x24/0x38 [ 9.842900] [<ffff0000080fa6fc>] __handle_domain_irq+0x5c/0xb8 [ 9.848727] [<ffff000008081520>] gic_handle_irq+0x58/0xb0 Reported-by: Simon Horman <horms@verge.net.au> Fixes: 2b38543c8db1 ("phy: rcar-gen3-usb2: add extcon support") Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-23 22:23:45 +0000