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path: root/drivers/pwm/pwm-mediatek.c
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2017-08-21pwm: mediatek: Disable clock on PWM configuration failureZhi Mao
Make sure to disable the PWM clock if the PWM cannot be configured due to the clock divider exceeding the maximum value. While at it, replace the hardcoded maximum clock divider with a defined constant to improve code readability. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21pwm: mediatek: Fix clock control issueZhi Mao
In order to save some power, do not prepare the top and main clocks during mtk_pwm_probe(). Instead, prepare the clocks only when necessary and also make sure to enable the clocks to match the semantics of the common clock framework. While at it, don't explicitly disable all PWM channels in ->remove() because all users should have done that already. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-08-21pwm: mediatek: Fix PWM source clock selectionZhi Mao
In original code, the PWM output frequency is not correct when set bit<3>=1 to PWMCON register. Signed-off-by: Zhi Mao <zhi.mao@mediatek.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-13pwm: mediatek: Don't explicitly set .ownerkbuild test robot
drivers/pwm/pwm-mediatek.c:210:3-8: No need to set .owner here. The core will do it. Remove .owner field if calls are used which set it automatically Generated by: scripts/coccinelle/api/platform_no_drv_owner.cocci CC: John Crispin <john@phrozen.org> Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
2017-04-06pwm: Add MediaTek PWM supportJohn Crispin
This patch adds support for the PWM core found on current ARM base SoCs made by MediaTek. This IP core supports 5 channels and has 2 operational modes. There is the old mode, which is a classical PWM and the new mode which allows the user to define bitmasks that get clocked out on the pins. As the subsystem currently only supports PWM cores with the "old" mode, we can safely ignore the "new" mode for now. Signed-off-by: John Crispin <john@phrozen.org> [thierry.reding@gmail.com: minor cleanups] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>