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The voltage table for the SM2 regulator on TPS658643 was wrong. However,
since the requested voltage of 1.8V was at the right place, the system
worked fine nonetheless.
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From a regulator point of view those PMICs differentiate in their SM2 voltage tables. While the older tps658621a and tps658621d as utilised on Harmony resp. Ventana have a range from 3000 to 4550 mV the tps658623 goes from 1700 to 2475 mV and the tps658643 just from 1025 to 1800 mV. Using its VERSIONCRC register the type of PMIC is queried and the right ranges applied.
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bug 815933
Original-Change-Id: I3b8f8910b12ff4f8a5f9588615bd0bb6452bdc3b
Reviewed-on: http://git-master/r/40263
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Reviewed-by: Jonathan Mayo <jmayo@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R18292e6e68c95b9f67d24281a9f2b80439452ba8
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Minimum voltage for LDO0 was specified with a code construct,
better solve this with a voltage table. This avoids a warning
in kernel log, too.
Bug 798821
Original-Change-Id: I706276a9aae3359006ddc7fe9134b67e00ec34fd
Reviewed-on: http://git-master/r/25185
Reviewed-by: David Schalig <dschalig@nvidia.com>
Tested-by: David Schalig <dschalig@nvidia.com>
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R800f3239d35415e5cb2f5ff2570f6f0285e44adc
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TPS6586x SM0, SM1 and SM2 port have 2 power switching modes:
- PWM only, or
- PMW-PFM auto mode
Some of TPS6586x have voltage spike in PFM-to-FWM transition can lockup
the CPU if choose PWM-PFM auto mode.
This patch enables such mode selection on SMs ports from the board level
power configuration file.
BUG 796364
Original-Change-Id: I7015798151d6753ff5dcc329703338fde105e2b0
Reviewed-on: http://git-master/r/22701
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
Reviewed-by: Xin Xie <xxie@nvidia.com>
Tested-by: Xin Xie <xxie@nvidia.com>
Rebase-Id: R2f74b345bc3ea3adc22adcab40ee407c3e65cae9
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after enabling any LDO/SM, there is a specific amount of delay
required before the regulator becomes stable.
Original-Change-Id: Ife675b46eeec22e862bafd9f93774bd31782d53b
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
Reviewed-on: http://git-master/r/20738
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Rebase-Id: R2f7428e60415d486a43b8fab367ee597e8fce945
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Change the interface used by set_voltage() to report the selected value
to the regulator core in terms of a selector used by list_voltage().
This allows the regulator core to know the voltage that was chosen
without having to do an explict get_voltage(), which would be much more
expensive as it will generally access hardware.
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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Correct the register table for SM2, LDO8, RTC
Change-Id: I45348cec5ffbb7da9bd7523764fb611b537236b8
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Olof Johansson <olofj@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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Change-Id: I40400bb65eab496bb1becd26b37a9653b99d4f41
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Olof Johansson <olofj@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(Split into separate patches)
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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Change-Id: Idacf5e1e51dbbbcd5ea93f310a4e907977e7359e
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Olof Johansson <olofj@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(Split into separate patches)
(Minor formatting fixes)
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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Change-Id: I76eaceb31b56264f6978af15db1e6fc7e2e01b5a
Signed-off-by: Danny Huang <dahuang@nvidia.com>
Signed-off-by: Olof Johansson <olofj@chromium.org>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
(Split into separate patches)
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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The third parameter of tps6586x_set_bits() is the bit_mask,
thus we should use (1 << ri->go_bit) instead of ri->go_bit.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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val is used as array index of ri->voltages.
Thus the valid value range should be 0 .. ri->desc.n_voltages - 1.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Acked-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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Signed-off-by: Axel Lin <axel.lin@gmail.com>
Acked-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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Hi Liam,
Below are bugfixes for the tps6586x spotted by Gary King.
Please add this patch to your regulator tree.
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Signed-off-by: Liam Girdwood <lrg@slimlogic.co.uk>
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