summaryrefslogtreecommitdiff
path: root/drivers/video/tegra
AgeCommit message (Collapse)Author
2012-03-22video: tegra: dc: VGA modes in supported mode listShashank Sharma
Add following VGA video modes in tegra_dc_hdmi_supported_modes list: Resolution Refresh rate(Hz) ----------- ---------------- 640x480 75 720x400 59 800x600 60 800x600 75 1024x768 75 1024x768 60 1152x864 75 1280x800 60 1280x960 60 1280x1024 60 1368x768 60 1440x900 60 1600x1200 75 1680x1050 60 Add CVT representation of all above modes to make sure they pass all the HDMI constraints. Add a new function tegra_dc_reload_mode to pick up CVT representation of matching mode. Bug 883911 Signed-off-by: Shashank Sharma <shashanks@nvidia.com> Change-Id: I5227644207d38ca83a0452d3c078ef202e40a508 Reviewed-on: http://git-master/r/89126 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Kiran Adduri <kadduri@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-03-21video: tegra: dc: disable disp.emc clock when 0 new rate is requestedNitin Kumbhar
Not disabling emc clock when it's being set to zero results in incorrect reference count when a call is made to clear bandwidth. This happens when two worker threads try to handle dc emc rate. A deep-sleep/wake-up cycle easily shows this scenario. With this fix, disp.emc's ref count is properly managed even after multiple deep-sleep/wake-up cycles. Bug 947228 Change-Id: I045fafbd483af1e3d492b8d0395275e45642d059 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: http://git-master/r/90100 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-21video: tegra: host: Correct waitchk comparison logicTerje Bergstrom
Change waitchk comparison logic to use the new nvhost_syncpt_is_expired(). Bug 941327 Change-Id: Ib7de04ad7663990bb416e39f8d79a46a9f5955fa Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/89769 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-21video: tegra: host: refactor for upstreamingMayuresh Kulkarni
- split the nvhost clients into their own directories - each client is a nvhost_device and nvhost_driver - all the code related to host1x control node is centralized at single place in dev.c - all the code related to host1x modules nodes is centralized at single place in bus_client.c - update the copyright notice & year for new files Bug 871237 Change-Id: Ief85064699e35ad02b48a7e54496928d7f085af4 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/83491 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-20video: tegra: dsi: Clear host trigger bit explicitly on fifo emptyAnimesh Kishore
dsi HW does not clear host trigger bit automatically on dsi interface disable if host fifo is empty. This leads to hang. Clearing the bit explicitly. Bug 930453 Change-Id: Id24359dc274f187f8ac634ad838ef4a6a29a6a5e Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/90043 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-03-20arm: tegra: nvmap: Update nvmap_alloc api.Krishna Reddy
Update nvmap_alloc api to take heap_mask as arg. This is to let clients specify the specific heap needed. Change-Id: I9950b3e60e6dac0301b6dc66be3e9d0bab8e0fee Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/90471 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-03-20video: tegra: host: Fix sync point comparisonTerje Bergstrom
Fix sync point comparison to take into account old expired values, and do proper comparison taking into account wrapping. Bug 941327 Change-Id: I70724637ba870b2e29bac695abc0ea2b968394d7 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/84808 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Ilan Aelion <iaelion@nvidia.com> Reviewed-by: Acorn Pooley <apooley@nvidia.com>
2012-03-19video: tegra: nvmap: Optimze nvmap page pool shrink timeKrishna Reddy
Bug 925987 Change-Id: Ifab4e515c7dd06b92d798e7eb93094c35e02b878 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/89414 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-19video: tegra: clean-up warnings and code styleJon Mayo
fix some build warnings and bad code style. Change-Id: I907296ce0e5437dfd6acd0b2b3c119b6dbde7b1c Signed-off-by: Jon Mayo <jmayo@nvidia.com> Reviewed-on: http://git-master/r/89634 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-18video: tegra: host: disable 3d powergatingDonghan Ryu
this is a workaround for the SLI scissor bug which can happen intermittently. Bug 914785 Change-Id: I5b7071df5bbfdd03bfe8b6f6b12ac7279221bd4e Signed-off-by: Donghan Ryu <dryu@nvidia.com> Reviewed-on: http://git-master/r/87968 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User
2012-03-15video: tegra: dsi: Add checks to dsi for HOST1X powerTerje Bergstrom
Add checks to ensure host1x is powered when DSI is used. Change-Id: I2e61abdd5c0741571fb18262fd2efa16ffee71d9 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/86361 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-15video: tegra: host: Refactor context handling logicTerje Bergstrom
Currently nvhost hard codes usage of context handler and sync point id. Split the context handler and context structures into generic and host1x specific parts, and move the allocation to happen via a function pointer in nvhost_device. Also updates gr3d and mpe to use sync point id and waitbase from nvhost_device. Bug 926690 Change-Id: I7f00b450cac99f3816baa27b37ee4e4cf68cfe24 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/84901 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-15video: tegra: nvmap: Fix issue in handle_page_allocKrishna Reddy
Fix race condition in handle_page_alloc. Page allocations should not try allocate from pool, once it fails for a request. If it tries and allocation passes during subsequent attempts, the page_index is not valid for CPA and cache won't be flushed for all the necessary pages. Change-Id: I5548e11b713f271cc8473a3f2ae193a69e832f99 Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/89611 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-15video: tegra: hdmi: validate clocks per frame of HDMI modeYoungjin Kim
There are HDMI modes which have different margin/sync values although resolution and pixel clock are the same. One example is 1080p/24Hz and 1080p/30Hz case. Those modes are not distinguished when we check if given two modes are equal. So clocks per frame also should be validated to decide sameness of the modes. Bug 950935 Signed-off-by: Youngjin Kim <nkim@nvidia.com> Reviewed-on: http://git-master/r/89026 (cherry picked from commit b9e6316850a47445be7545aaec85c6a247c44cb9) Change-Id: I06d3c0f41e63d65f1908614d09df4d16028895f0 Reviewed-on: http://git-master/r/90030 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-15video: tegra: dc: Add rated refresh rate for one-shot mode.Kevin Huang
We add this variable for two purposes. First, it would remind developer to make sure actual refresh rate is larger than rated refresh rate. Second, gralloc would read rated refresh rate for one-shot mode since actual refresh rates of most devices are expected running at rated refresh rate. Bug 946370 Bug 934977 Change-Id: Ib4121337df1a388b40440b22687c39f373f08890 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/89871 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-15video: tegra: dsi: Add phy timing check for hblankAnimesh Kishore
Horizontal blank must be greater than phy timing for HS transmission. Bug 938043 Change-Id: I5afe68ec04341f7b83c2897c586d4618bd518222 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/89789 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-03-15video: tegra: dsi: Fix phy timing HW incrementAnimesh Kishore
Adding support to accomodate hw increment to phy timing reg values. Bug 938043 Change-Id: I8de14648c0994b03c37a2ee455a656ff11c3cc34 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/89741 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-03-15video: tegra: host: Replace license informationTerje Bergstrom
Replace license information in nvhost with GPLv2. Also adds copyright year 2012 in files which have been changed in 2012. Change-Id: I86e8ed27095df13d99e0250e57e244d531fdacec Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/89735 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-15video: tegra: host: Disable irq on shutdownTerje Bergstrom
Disable interrupts when driver is being removed. Bug 952600 Change-Id: I1d697c3c87aca935deadfe20b5e8fa8852b0e556 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/89405 Reviewed-by: Thomas Cherry <tcherry@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
2012-03-14video: tegra: dc: Fix the EMC bandwidth clear.Kevin Huang
Bug 951626 Change-Id: Ia7c7474aa0f066cba8bd1519a98e302c4b3992e0 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/89076 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-03-12video: tegra: nvmap: optimize uc & wc allocations.Krishna Reddy
Changing page attributes and cache maintenance reduces performance in applications doing runtime reallocations. Keep pool of UC & WC pages to avoid expensive operations when doing allocations. bug 865816 (refactored initial changes from Kirill and added shrinker notification handling) Change-Id: I43206efb1adc750ded672bfe074e0648f2f9490b Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/87532 Reviewed-by: Donghan Ryu <dryu@nvidia.com> Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-12video: tegra: host: Set rate for all clocks in nvhost deviceJinyoung Park
Fixed rate setting problem what set rate for only a clock in nvhost device, even if there are clocks more than one in nvhost device. Bug 938580 Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/85129 (cherry picked from commit 5818d42dc0ad5dfa7659dca5d7f61b572c08613d) Change-Id: Id3a7be50541b1d93a2ed7353f3eabc71dd398773 Reviewed-on: http://git-master/r/87276 Tested-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-08video: tegra: dc: Remove unnecessary delay in dc postsuspendMin-wuk Lee
Remove unnecessary 100ms delay for primary panel since this is needed for HDMI type only. Bug 940012 Change-Id: Id27966fb28faa73ade3a868a9f89cadbde76e227 Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/87613 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-08video: tegra: implement DC capabilities ioctlAdam Cheney
The returned capabilities bitfield is initially 0 (no caps). bug 942631 Change-Id: Ia7496981e525526147ecebe67b09dc877d3e0c17 Reviewed-on: http://git-master/r/87088 Tested-by: Adam Cheney <acheney@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com>
2012-03-08video: tegra: dc: Fix the race condition of one-shot work.Kevin Huang
Add lock to prevent race condition between cancellation of old delayed work and schedule of new delayed work. Bug 936337 Change-Id: I52df82e92279163841546127c72be9879ef810d0 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/86730 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-07video: tegra: host: convert kzalloc to vzallocDonghan Ryu
nvhost_job uses kzalloc to hold meta data. Convert it to vzalloc to avoid large physically contiguous allocations at runtime. Change-Id: I13d7e7d60e93354fcf69e5478437fa206b880dcc Signed-off-by: Donghan Ryu <dryu@nvidia.com> Reviewed-on: http://git-master/r/87967 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-07video: tegra: host: Set 3D pg timeout to 250msTerje Bergstrom
Power gating timeout for 3D is too short, and causes oscillation in non-idle use cases. Increase timeout to 250ms to get more benefits from power gating. Bug 914785 Change-Id: I4e37fda260ceecc2fe3e21989789105b7c8fcf36 Reviewed-on: http://git-master/r/87659 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Ilan Aelion <iaelion@nvidia.com> Reviewed-by: Graziano Misuraca <gmisuraca@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2012-03-06video: tegra: dsi: fix DSI_PAD_CONTROL reg wr value on resumeBoris Suvorov
In panel resume path DSI_PAD_CONTROL value gets calibrated, however later on values are overwritten with bit settings for ulpm mode. refactor value for reg write to only change ulpm related bits. Change-Id: I9f9713bdf376c06b0e1b9f43b3e6c9f719bbd855 Signed-off-by: Boris Suvorov <bsuvorov@nvidia.com> Reviewed-on: http://git-master/r/85873 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-06video: tegra: host: register nvhost master device in board-xxx-panel.cMayuresh Kulkarni
- the suspend order of devices is governed by the order in which devices are registered - this commit ensures that nvhost master is registered before any of the graphics devices - previously this was done in rootfs_init call which is later than arch_init calls of board-xxx-panel.c - this caused tegra-dc device to be registered *before* nvhost master device. as a result it was suspended *later* than nvhost master device. this is a clear violation of dependency rule for nvhost. this caused suspend-resume to fail for L4T - this worked on android as it has CONFIG early suspend enabled while it failed for L4T which doesn't have CONFIG early suspend enabled Bug 947617 Change-Id: I6cd405f3ba23d004e7659140019f5130e6c25159 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/87756 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2012-03-05video: tegra: dsi: Fix syncpt hang during early suspend cycleAnimesh Kishore
Fixing dsi syncpt hang issue after multiple cycles of early suspend-late resume. Bug 943096 Change-Id: Iefc0530a6e514b7733819dd1df35cde8f5c3dd47 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/86946 Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com> Tested-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
2012-02-28video: tegra: host: Merge tegra_grhost and host1x devicesMayuresh Kulkarni
- tegra_grhost is a platform device that represents host1x - nvhost has device host1x which represents the same hardware - merge these two device structs - as the new struct is a nvhost_device, platform_driver is also converted into a nvhost_driver - register nvhost device before other graphics devices. this ensures that nvhost_probe() is called as soon as nvhost_driver is registered with the core. - this also ensures that nvmap is probed first, followed by nvhost, followed by tegra-dc and nvavp (if they are enabled). Change-Id: Ic420a6516a9cb20d6f481692a4db10fa6053dd90 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/82631 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-28video: tegra: dc: Clear window option before window update.Kevin Huang
There exits an issue that if window number is less than DC_N_WINDOWS, window option of some windows won't be cleared. So although it should be disabled, it might not be disabled properly. This will lead to the failure of scan-out on screen. Bug 943846 Change-Id: I604399abaa590b27ab4ea41ed9eb2706be16a75a Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/86230 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-24video: tegra: host: Reject gathers if submit failedTerje Bergstrom
If submit failed, for example when we ran out of memory, we should reject any subsequent writes. Bug 936097 Change-Id: Ic124fc08b7715532d210a0c0d0b7aebcb54e43d4 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/85479 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-24video: tegra: nvmap: don't override contiguous flagKrishna Reddy
Don't override contiguous flag in nvmap_page_alloc(). This is causing incorrect iovm_commit accounting. Bug 938864 Change-Id: If30ea43702465980914b12816fa28eac9e14581d Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/85319 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Kamal Balagopalan <kbalagopalan@nvidia.com> Tested-by: Kamal Balagopalan <kbalagopalan@nvidia.com>
2012-02-23video: tegra: nvmap: Fix build warningHiroshi DOYU
Use correct type. Change-Id: Iec3ec1624e4f14c36f02fbee6d838f4b2d188569 Signed-off-by: Hiroshi DOYU <hdoyu@nvidia.com> Reviewed-on: http://git-master/r/84947 Reviewed-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-by: Scott Williams <scwilliams@nvidia.com>
2012-02-23video: tegra: dsi: Fix dsi phy timingAnimesh Kishore
Corrected the formulas to calculate phy timing. Added mipi d-phy constraints. Bug 938043 Change-Id: Ie1f2dd45e7e39f83735fe28e21a62dc0415c7c00 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/85217 Reviewed-by: Jon Mayo <jmayo@nvidia.com> Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-02-23video: tegra: host: Dump client managed sync pointsTerje Bergstrom
Change sync point debug dump filtering so that client managed sync points are added to output. Remove also an infinite loop when sync point value goes beyond maximum. Debug dump calls t20_syncpt_update_min, which should not call debug dump again. Change-Id: I086a3c21d6171d083e5254e7a34b1582e38a3e49 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/84940 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-23video: tegra: dc: fix pixel clock latency issueKen Chang
GENERAL_ACT_REQ causes double-buffered registers to become active. This register needs to be programed to reduce the latency of pixel clock after dc enabled by tegra_dc_enable(). bug 926189 Signed-off-by: Ken Chang <kenc@nvidia.com> Reviewed-on: http://git-master/r/83346 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> (cherry picked from commit f39c5ddd1867c508900c9aa2d4eead7eb3082343) Change-Id: I741c9be9074709c1ab571aa631cb462599d5fb78 Reviewed-on: http://git-master/r/84561 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-23video: tegra: dc: in continuous mode mask VBLANK after first frameNitin Kumbhar
A V_BLANK interrupt for each frame does not allow long lp2 idle intervals. If all windows are clean, mask V_BLANK interrupt after processing it for updating smart dimmer. It's unmasked again when a new window update is performed. This will schedule a work for updating smart dimmer for the new frame. Bug 920110 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: http://git-master/r/85137 (cherry picked from commit 68398090aee22cf02069e5767c3e9a062b0fc2f6) Change-Id: I588328bfd0d6036febed236dc07f441878aa81d1 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: http://git-master/r/85166 Reviewed-by: Lokesh Pathak <lpathak@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com>
2012-02-23video: tegra: host: Fix irq race in system resumeTerje Bergstrom
At system resume, host1x sync point values are restored from memory, and interrupts are enabled. This is done in reverse order, and in cases it might be that interrupt is triggered while sync point values are still being restored. Bug 940381 Change-Id: I0191b84b41306e0f0ba0758d41e5632dcf9d06cd Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/83995 Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Bo Yan <byan@nvidia.com>
2012-02-22video: tegra: host: Change sync queue to a listTerje Bergstrom
Sync queue is the list of jobs still in flight. As context priorities requires possibility to insert a job in the middle of the queue, the structure needs to be changed into a linked list. Bug 926690 Change-Id: Id257a11f18476c70dd69e36ba44ed2d380c80040 Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/83127
2012-02-21video: tegra: host: incr_syncpt should not modify maxTerje Bergstrom
When user space calls NvRmChannelSyncPointIncr(), the maximum value of sync point should not be incremented unless sync point is client managed. Also prevents kernel panic if user space tries to increment beyond maximum. Instead, give debug spew and ignore. Bug 936097 Change-Id: I4dc7ed46b1e0394d41066051a47f1d7a1f08493c Reviewed-on: http://git-master/r/79957 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
2012-02-21video: tegra: dc: use side-by-side stereo HDMI modeAndrija Bosnjakovic
Add a config option to limit HDMI stereo 3D output to 74.25MHz pixel clock. When this option is set, substitute the frame pack stereo modes for side-by-side (half) left-right stereo modes to meet this pixel clock restriction. By default, do not use it (use frame packed HDMI mode as usual). Bug 938807 Change-Id: I2ce2ca72cbb15ac1939af0f3386dd23650262435 Reviewed-on: http://git-master/r/84252 Reviewed-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Tested-by: Andrija Bosnjakovic <abosnjakovic@nvidia.com> Reviewed-by: Jon Mayo <jmayo@nvidia.com>
2012-02-18video: tegra: host: Add syncpt value to tracesTerje Bergstrom
Add current values of sync points to sync point read and wait IOCTL's. Change-Id: I479a66e283b47867ed13685b75c1858b4fb65c2d Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-on: http://git-master/r/80006 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-17video: tegra: dc: prevent nvmap_unpin crashMin-wuk Lee
This is a workaround to make sure serialization of flip worker, for Android specific. Android doesn't need mutiple workqueues per each window since it gets composited one from user layer. If the last windows' argument index is not 0, provided change will make the last index to 0 with swap operation so work will be queued into one workqueue all the time. Bug 929993 Bug 932592 Bug 933831 Bug 935623 Bug 934569 Change-Id: Ic467bb4f593c72ae98ea1fb324cf1a6d343faa62 Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/82971 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-16video: tegra: dsi: Config dsi and csi shared padAnimesh Kishore
Configure voltage regulator. Bug 914749 Change-Id: I6cf1924a928839249d4e62029dd14fca84b05792 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/83361 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-16video: tegra: dsi: Soft reset if dsi host busyAnimesh Kishore
If dsi host is unexpectedly busy, soft resetting will restore controller state. Bug 930453 Change-Id: I1bbce55d0b27a2be80a66218978e73c616e9d894 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/83986 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-02-16Revert "video: tegra: host: use runtime pm for clock management"Simone Willett
This reverts commit 961c60fe7213d92793d6072abc16f58721a33fed Change-Id: I8ef0fbaee30e94c78b8df609f729953fee6d1583 Reviewed-on: http://git-master/r/84135 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Tested-by: Lokesh Pathak <lpathak@nvidia.com> Reviewed-by: Lokesh Pathak <lpathak@nvidia.com>
2012-02-15video: tegra: dc: protect dc extension disabling with a lockNitin Kumbhar
When dc gets many underflows, instances of reset worker can race to perform reset. dc ext was getting disabled outside critical region affecting display path. disable dc ext after getting the lock. Bug 936545 Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com> Reviewed-on: http://git-master/r/83108 (cherry picked from commit f9dcf7eee8ca8db28cee6fa9550044d1f746e843) Change-Id: Ie29dc66eb52c9be472c2d0db8c0014bfe1837ad4 Reviewed-on: http://git-master/r/83406 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-02-15video: tegra: dc: Schedule delayed work to clear emc bandwidth.Kevin Huang
Bug 932840 Change-Id: I12d8d2d2cd42d0dafea38463ad77b44f7e64d7c1 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/83645 Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
generated by cgit v1.2.3 (git 2.0.4) at 2024-06-22 16:32:10 +0000