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commit 3573c4103f7a486838bb6b5b8353788103f91802 upstream.
v2: add a CPT-specific macro, make code cleaner
v3: fix commit message
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41272
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Keith Packard <keithp@keithp.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Change-Id: Ibebaa677dcb502f900d3571e7a65eafed3796418
Reviewed-on: http://git-master/r/74159
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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commit c3b79770e51ab1fd4201f3b54edf30113b9ce74f upstream.
The m41t80 driver can read and set the alarm, but it doesn't
seem to have a functional alarm irq.
This causes failures when the generic core sees alarm functions,
but then cannot use them properly for things like UIE mode.
Disabling the alarm functions allows proper error reporting,
and possible fallback to emulated modes. Once someone fixes
the alarm irq functionality, this can be restored.
CC: Matt Turner <mattst88@gmail.com>
CC: Nico Macrionitis <acrux@cruxppc.org>
CC: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
Reported-by: Matt Turner <mattst88@gmail.com>
Reported-by: Nico Macrionitis <acrux@cruxppc.org>
Tested-by: Nico Macrionitis <acrux@cruxppc.org>
Signed-off-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Change-Id: Idbb49a2b153a9da2a281e927f14e4a15a676987d
Reviewed-on: http://git-master/r/74157
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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first set emc clock rate and then enable it to take effect of the
operation.
bug 882076
Reviewed-on: http://git-master/r/68611
(cherry picked from commit 57e48fefa323fabd2cfb52093e6b0a600a18e7b0)
Change-Id: I69ad717ccbfd020202ed2f12390ae8b535ff127e
Signed-off-by: Puneet Saxena <puneets@nvidia.com>
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/73705
Reviewed-by: Automatic_Commit_Validation_User
(cherry picked from commit 8751a59f5cfd2fe4c0ed88b5417ebab7f04a447e)
Reviewed-on: http://git-master/r/73966
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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Max EMC rate is required only for video. Audio does not
need max EMC rate hence set EMC rate to min if no video.
Bug 869840
Reviewed-on: http://git-master/r/65460
(cherry picked from commit e256178831e5e6786ecd2c816c66dceec3d29b1a)
Change-Id: I185906a02e8afad1ca456747f87a81b38ad9d548
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/73704
Reviewed-by: Automatic_Commit_Validation_User
(cherry picked from commit f38c3c1ce7c81b8045f2789850704c0d764827fa)
Reviewed-on: http://git-master/r/73965
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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Some media streams requires maximum sclk rate. sclk rate is
requested from user space. Reset sclk rate to min after
the stream is finished.
Reviewed-on: http://git-master/r/57253
(cherry picked from commit b6215d8d28806003deb3721d9044a9cdfa9fe732)
Change-Id: I3f39d3e1e51abbe98ec78fa7752ac0edba61691c
Signed-off-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-on: http://git-master/r/73703
Reviewed-by: Automatic_Commit_Validation_User
(cherry picked from commit 90d3e47202d1468338b0df04333c3b9942454cef)
Reviewed-on: http://git-master/r/73964
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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The tegra display controller supports the YUV422R planar surface format, but
this was not handled by the dc driver.
This change also fixes the YUV422RA planar format variation.
Bug 914375
Change-Id: I73ffd2f7434c71d8353c7e16ada5ac6b13fee86b
Reviewed-on: http://git-master/r/69446
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
(cherry picked from commit a085ef1eeb332116f102d82af25f7a6451eb6329)
Reviewed-on: http://git-master/r/73950
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
Tested-by: Varun Wadekar <vwadekar@nvidia.com>
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This reverts commit c029772125594e31eb1a5ad9e0913724ed9891f2.
Change-Id: Id9ad9be437cd79db20362e1cc4b81b7380ee7f3d
Reviewed-on: http://git-master/r/72237
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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This reverts commit 20c82538e4f5ede51bc2b4795bc6e5cae772796d.
Conflicts:
drivers/md/dm-crypt.c
Change-Id: Id6c1f774c735836652c07ee279fb81093e732372
Reviewed-on: http://git-master/r/72236
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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This reverts commit 2dc5327d3acb3340ab6fa3981401b076b78a51f4.
Change-Id: I58ed3f6e8f9d053cb2ae9cfb0ae57528055a902b
Reviewed-on: http://git-master/r/72235
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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This reverts commit d1f9642381847e2b94caa34c3533211cf36ffcf4.
Change-Id: If1879b331c1f0e3dea7433c5de53ac653743d9c2
Reviewed-on: http://git-master/r/72234
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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This reverts commit 34745785937a2003c144c0d4802fa637470d87af.
Change-Id: Ic1ee80202b92a5ceb4e04ceb041adfbb40274ca0
Reviewed-on: http://git-master/r/72233
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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This reverts commit de8be5ac70f50a2340f24fd769a1aafa5a51ae34.
Change-Id: I4d2788550ab382ec248c7a2fa10b4cb4e2766283
Reviewed-on: http://git-master/r/72232
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com>
Tested-by: Ahung Cheng <ahcheng@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Add HW loopback support for testing purpose.
Bug 845036
Bug 921090
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Change-Id: I202781ed0b42c1bed2b9aad9576cf74cb938f9e6
Reviewed-on: http://git-master/r/73149
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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pn544 seems to be slow in handling I2C read/write requests.
Even though pn544 acks the read/write but next operation fails.
Bug: 915848
Bug: 914700
Bug: 914691
Bug: 915598
Change-Id: I7851d0d4b7c24810ad27f3e0fbd4542b52dc8a5e
Signed-off-by: Mohan T <mohant@nvidia.com>
Reviewed-on: http://git-master/r/72867
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Kumar <krakesh@nvidia.com>
Reviewed-by: Alok Chauhan <alokc@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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USB Device when resuming from LP0 will reset the PowerDown values of
USB, these powerdown have to be reprogrammed when there is no usb cable
when device resumes from LP0.
Bug 919432
Change-Id: I306efc3614cceffbf132db92e0a897693043e3f7
Signed-off-by: Suresh Mangipudi <smangipudi@nvidia.com>
Reviewed-on: http://git-master/r/72722
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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During regulator_register, the rail is set on the provided
machine constraints and if it is enabled then it is also
require to enable the supply regulator. This will make sure
that:
1. Proper reference count for supply regulator to be maintain.
2. Supply regulator should be enable when given rail is enabled.
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Cherry-picked from linus' mainline:
b2296bd43e781976743354c668a356b0df98e1da
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Ibfdcc8e8dc04a109905883239a7f358a1ef9d54d
Reviewed-on: http://git-master/r/73176
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
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Disable phy clock valid interrupt while suspending
the driver.
Bug 912286
Change-Id: I9b09230c80c12ba61f1c3281ffc90ad5eb9c4652
Signed-off-by: Rakesh Bodla <rbodla@nvidia.com>
Reviewed-on: http://git-master/r/72976
Reviewed-by: Varun Colbert <vcolbert@nvidia.com>
Tested-by: Varun Colbert <vcolbert@nvidia.com>
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Fix for stopping mipi high speed continuous clk.
Bug 903878
Change-Id: Id318fabd9c6aef116a60608c6f444846172f4803
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/72968
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Host controllers expose their capabilties for MMC.
But the mmc core code used to set MMC_CAP_ERASE
and MMC_CAP_CMD23 by default for all hosts. Ideally,
these capabilities should only be exposed by the hosts
and the core code should not set them by default.
Bug 914934
Change-Id: I82610bd48cdfc4926487ad436855bc84876c7283
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Change-Id: I99507d7cfdcee064f808856dc2ce99d806fd864f
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Kernel 3.1 has more than 32 quirks
changing quirks type to u64
Bug 921653
Change-Id: Id6607347e6e48cfa1534f1260e277f6e2f7a42ee
Signed-off-by: naveenk <naveenk@nvidia.com>
Reviewed-on: http://git-master/r/73167
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Wait tx fifo to be empty on close for the time it is require
to make fifo empty.
bug 921225
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: I0ea2ec488e975833103218d86e8dc37aec79ef88
Reviewed-on: http://git-master/r/72858
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
Reviewed-by: Prashant Gaikwad <pgaikwad@nvidia.com>
Tested-by: Prashant Gaikwad <pgaikwad@nvidia.com>
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put busses array as last struct member to avoid overwritting
arb_recovery function pointer.
Bug:889581
Reviewed-on: http://git-master/r/58347
(cherry picked from commit 223b2794fb0d3e94ccfb28549b74941a492415dd)
Change-Id: I4e8792a0cb42255724c8e45baea4f273181a8e2f
Signed-off-by: Linqiang Pu <dpu@nvidia.com>
Reviewed-on: http://git-master/r/58942
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
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Enabled io dpd when clock is disabled for each SD instance.
Clock enable for the SD instance causes io dpd to be disabled.
bug 919993
Change-Id: I7d58517a7c51ce969a167abf7bb90ea89731d999
Signed-off-by: Bitan Biswas <bbiswas@nvidia.com>
Reviewed-on: http://git-master/r/72027
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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bq27x00 takes 3 to 4 second to update charging/discharging
status so it requires to schedule work after 4 second on
external powersupply change.
Bug 902678
Change-Id: Ic5b42804ee3cd98ffab762c042bad447934eba85
Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com>
Reviewed-on: http://git-master/r/72411
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
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Apply the highest bandwidth setting before windows are programmed rather
than waiting for vblank.
Bug 914917
Change-Id: Iaaede9966191fdfc896bbbb19fbbadf9c4598bff
Signed-off-by: Jon Mayo <jmayo@nvidia.com>
Reviewed-on: http://git-master/r/72301
Reviewed-by: Michael I Gold <gold@nvidia.com>
Tested-by: Michael I Gold <gold@nvidia.com>
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After switching the voltage and enabling the
clock, wait for 1 msec for the clock to become
stable.
Bug 918563
Change-Id: I3cda964280daf739e8898dffb6ba3ed22ff54b14
Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-on: http://git-master/r/72231
Reviewed-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Tested-by: Naveen Kumar Arepalli <naveenk@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Move source files related to host1x into an own directory.
Bug 871237
Change-Id: I6fa3ef057f8b788c37dd2ab698271cf7508711c6
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/71783
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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A work around for Ethernet adapter with EEPROM
that has not been programmed.
Change-Id: I24242d404bda951d740dfb5ebfeae8dd692524ab
Signed-off-by: Mursalin Akon <makon@nvidia.com>
Reviewed-on: http://git-master/r/70633
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Allen Martin <amartin@nvidia.com>
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A flag, disable_ev_rep, is added to enable/disable repeat events
reported from the keyboard driver.
BUG 918758
Change-Id: I65be2f795fd64ebb7d36ad278aa2b24362c1e5ea
Signed-off-by: Nitin Kumbhar <nkumbhar@nvidia.com>
Reviewed-on: http://git-master/r/72952
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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Fixed system resume issue with hsic phy interface by
removing "usb_set_device_state(udev, USB_STATE_CONFIGURED)"
from tegra_usb_resume function. This line was added for old
kernels and not required for K39.
BUG 905931
Signed-off-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Change-Id: I53e34b4d46de23e88eedc02ca1fb4f380d6c1525
Reviewed-on: http://git-master/r/72403
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com>
Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
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Changes done:
1. As Ricoh RTC month range is between 1 - 12 instead of
0 - 11, fixing it.
2. Filling only two valid BCD digits in the year fields.
3. Enabling YAL alone, with workaround.
4. Code clean up based on check patch warnings.
bug 902137
Change-Id: I497ac5d04230e87baa776e84f6eafa8a28ae54ea
Signed-off-by: venu byravarasu <vbyravarasu@nvidia.com>
Reviewed-on: http://git-master/r/72082
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Move source files related to gr3d into own directory.
Bug 871237
Change-Id: I5118ad792d6ec136d2ec2575eff931e112d5f3b2
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/71782
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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Separate source code related to mpe into an own directory.
Bug 871237
Change-Id: I59251752119660bb1e57e1763626fa289a2b9f5b
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/70531
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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Replace magic numbers with constants throughout the code base.
Change-Id: If6071f3ee95078d7b631a300b241ebf6522ef68a
Signed-off-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-on: http://git-master/r/66795
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Krishna Reddy <vdumpa@nvidia.com>
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When nvavp driver is opened hint host1x busy and on release hint idle.
When going to suspend hint idle and on resume hint busy.
Bug 904555
Change-Id: I18218190cfd7c9ee9540813a8dcaead4556583dc
Signed-off-by: Sachin Nikam <snikam@nvidia.com>
Reviewed-on: http://git-master/r/72187
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com>
Reviewed-by: Mandar Potdar <mpotdar@nvidia.com>
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Remove seperate set gain/framelength/coarsetime calls in set_mode.
Integrate these functions into the write_table with extra override
register table.
Also remove the color specific gain registers in all mode tables
and replace with the global gain register.
This can fix the low brightness issue in still image capture.
bug 909827
Change-Id: I6a117d286f3e7c3d1a2c9cedad4c66011baf511f
Signed-off-by: Charlie Huang <chahuang@nvidia.com>
Reviewed-on: http://git-master/r/71900
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Erik Lilliebjerg <elilliebjerg@nvidia.com>
Reviewed-by: Jon Mayo <jmayo@nvidia.com>
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mask the GPIO_SET bit (0x1) before decide set it or not by the input
parameter 'value'
Signed-off-by: Haley Teng <hteng@nvidia.com>
Reviewed-on: http://git-master/r/60425
Reviewed-on: http://git-master/r/66589
(cherry picked from commit d7ac2209e0a3783004fba240eea87a8e569d3745)
Change-Id: I33c69c9aaaf3c9b624fabbcbcab80e75de706d38
Reviewed-on: http://git-master/r/71962
Reviewed-by: Automatic_Commit_Validation_User
Tested-by: Haley Teng <hteng@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Move allocation of RX dma buffer to startup to avoid data corruption.
Bug 902813
Change-Id: I3bf751c01543c9d6eca08b2942b4f62bc9115775
Signed-off-by: Pradeep Goudagunta <pgoudagunta@nvidia.com>
Reviewed-on: http://git-master/r/71937
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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The correct voltage conversion formula for the register programming
is
Code=((Vout-0.6077)/0.01266)+1
Changing existing formula to above equation.
bug 915859
Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com>
Change-Id: Id745cc82269282318cc064f25e789837dc0dfa7a
Reviewed-on: http://git-master/r/72017
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
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Fix dc stream randomly failing to stop.
Add stablization delay during dsi interface reset.
Bug 913019
Change-Id: I1cf3013659de75d15cb1ff41b27c63abd953d614
Signed-off-by: Animesh Kishore <ankishore@nvidia.com>
Reviewed-on: http://git-master/r/71952
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com>
Reviewed-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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Fixed i2c_add_slave_adapter routine because id attribute has been
dropped from adapter.
Change-Id: I84a8d3a8fb3a16b772107a5d265cfadfb70dbaec
Signed-off-by: Chaitanya Bandi <bandik@nvidia.com>
Change-Id: I3181507404e929b48ba2f1f7290e423d1a07f559
Reviewed-on: http://git-master/r/70944
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
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When fifo is read, it can contain valid data bits and random bits
in rest of the fifo.
Reading only valid bits from fifo and resetting rest to zero
before sending to client.
Change-Id: I961279048aada6087b323ab6730bf72706730917
Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com>
Reviewed-on: http://git-master/r/70534
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
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Add tegra specific custom ioctl handling.
Change-Id: If87b47f969fe0b3fdbb3bee965c370f6610fd4be
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/71113
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Hiroshi Doyu <hdoyu@nvidia.com>
Tested-by: Hiroshi Doyu <hdoyu@nvidia.com>
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Change-Id: Ifb3bc3d7fa54cddda7e3f0acd34dbcc4b1ed39d3
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/72644
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
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Prepare nvmap api's to be able to use Ion Memory Manger.
Change-Id: Ie7de2c4afc491290d61e8545667ffa477af32d8b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/71112
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
Reviewed-by: Automatic_Commit_Validation_User
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Move ion priv data structs and methods to ion_priv.h.
This is needed to allow vendor spcific code dereferencing
ion data structs and accessing methods.
Change-Id: I4f863e0f4a59a80ec6b4468ca27ed7b96a78772b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/71111
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Aleksandr Frid <afrid@nvidia.com>
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Handle and buffer are not ref counted correct during fork from
a process, which has mmap'ed ion memory.
Change-Id: Ida98f4639f29fef8397abd07bbf317c1baa0130e
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/72643
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
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Disable nvmap struct dereferencing, if nvmap is disabled.
Change-Id: If089adae92366865669389b2f965020cfb90c10b
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/71031
Reviewed-by: Automatic_Commit_Validation_User
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Use nvmap user space to kernel handle conversion macro.
Change-Id: I65ce6cee77e46ab2d3a7ac49a1b210fae7a85810
Signed-off-by: Krishna Reddy <vdumpa@nvidia.com>
Reviewed-on: http://git-master/r/71029
Reviewed-by: Automatic_Commit_Validation_User
Reviewed-by: Scott Williams <scwilliams@nvidia.com>
Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
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