| Age | Commit message (Collapse) | Author |
|---|
|
Since Logitech Quickcam E3500 is defaultly listed in usb_quirk_list on current
linux kernel. So the USB camera only supports reset resume, but doesn't support
normal usb suspend/resume. Actually, the USB camera works abnormally after USB
reset resume, but it works well after doing normal suspend/resume.
Signed-off-by: make shi <b15407@freescale.com>
|
|
Vsync-pre irq is invalid for IPU overlay channel. The fb driver code
wrongly registers Vsync-pre for overlay channel with an un-initialized
irq number(0), which is conflict with CSI EOF irq number and causes
capture function broken. This patch avoids registering vsync-pre irq
for overlay channel.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
|
|
- invalid data preparation is a reasonable path, so no need to set to
WARNING level, change it to DEBUG level.
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
In suspend/resume and HDMI plugin/plugout stress test,
sometimes fbcon will call fb_set_par with
parameter fb_var_screeninfo that xres anfd yres is zero.
MX frame buffer driver can not correct handle this casue,
it will cause IPU pixel clock gating/ungating mismatch.
Check fb_var_screeninfo parameter in mxcfb_check_var and
mxcfb_set_par function, returned if xres,yres zero.
Signed-off-by: Sandor Yu <R01008@freescale.com>
|
|
Test Env:
1. MX6DL SabreSD board.
2. On board eMMC (Sandisk: SDIN5C2-8G) running at 8-bit DDR @ 52MHz.
3. Test commands:
3.1 Writing command:
# dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=100 conv=fsync
3.2 Reading command:
# echo 1 > /proc/sys/vm/drop_caches
# echo 1 > /proc/sys/vm/drop_caches
# sleep 1
# dd if=/dev/mmcblk0 of=/dev/null bs=1M count=100
Performance result with this patch:
-------------------------------------------------------
| CPU freq | SDMA (512KB) | SDMA (64KB) | ADMA |
|----------+--------------+-------------+-------------|
| 1Ghz | ~11MB/s (w) | ~5MB/s (w) | ~11MB/s (w) |
| | ~25MB/s (r) | ~25MB/s (r) | ~23MB/s (r) |
|----------+--------------+-------------+-------------|
| 200Mhz | ~8MB/s (w) | ~5MB/s (w) | ~9MB/s (w) |
| | ~16MB/s (r) | ~20MB/s (r) | ~13MB/s (r) |
-------------------------------------------------------
Performance result without this patch:
-------------------------------------------------------
| CPU freq | SDMA (512KB) | SDMA (64KB) | ADMA |
|----------+--------------+-------------+-------------|
| 1Ghz | ~10MB/s (w) | ~5MB/s (w) | ~10MB/s (w) |
| | ~22MB/s (r) | ~23MB/s (r) | ~22MB/s (r) |
|----------+--------------+-------------+-------------|
| 200Mhz | ~8MB/s (w) | ~4MB/s (w) | ~8MB/s (w) |
| | ~13MB/s (r) | ~16MB/s (r) | ~11MB/s (r) |
-------------------------------------------------------
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
- set bounce buffer to 512KB from 64K, which is hw max seg size for
fsl sd host controller
- by enlarging the size of bounce buffer, it will reduce the number
of irq on writing by merging small requests into a large one, which
will improve writing throughput.
- the side effect is that the reading throughput of 512KB bounce buffer
is lower than the one of 64KB bounce buffer, when cpu freq is at 200Mhz.
Test Env:
1. MX6DL SabreSD board
2. On board eMMC (Sandisk: SDIN5C2-8G) running at 8-bit DDR @ 52Mhz
3. Test commands:
3.1 Writing test command:
# dd if=/dev/zero of=/dev/mmcblk0 bs=1M count=100 conv=fsync
3.2 Reading test command:
# echo 1 > /proc/sys/vm/drop_caches
# echo 1 > /proc/sys/vm/drop_caches
# sleep 1
# dd if=/dev/mmcblk0 of=/dev/null bs=1M count=100
Performance result:
-------------------------------------------------------
| CPU freq | SDMA (512KB) | SDMA (64KB) | ADMA |
|----------+--------------+-------------+-------------|
| 1Ghz | ~10MB/s (w) | ~5MB/s (w) | ~10MB/s (w) |
| | ~22MB/s (r) | ~23MB/s (r) | ~22MB/s (r) |
|----------+--------------+-------------+-------------|
| 200Mhz | ~8MB/s (w) | ~4MB/s (w) | ~8MB/s (w) |
| | ~13MB/s (r) | ~16MB/s (r) | ~11MB/s (r) |
-------------------------------------------------------
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
If we use the late_initcall(), then there is a time slot between
the exit of early uart console and the real console:
-->late_initcall(mxc_early_uart_console_disable)
......
-->imx_startup()
In this time slot, the clock will be closed, so the log printed during
the time slot is buffered, this is why we can not see the NFS's log.
Change the late_initcall() to late_initcall_sync() which eliminates the
time slot.
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
1.Avoiding system wrong reboot caused by error temperature without
cancel_delayed_work before entering into suspend,so to cancel
thermal_zone_device temperature polling temperature delayed_work
before entering into suspend, reenable polling temperature delayed_work
after entering into resume.
2.In anatop_thermal_suspend, turn off alarm firstly
Signed-off-by: Rong Dian <b38775@freescale.com>
|
|
Original design is VPU lib API StartOneFrame() enables clock, and VPU
driver disables clock after codec done interrupt has been received.
However there are known issues of interrupt handling as below:
- VPU interrupt handling callback is not scheduled in time causing work
queue overflow
- JPU done interrupt is not received because JPU issues it while JPU
buffer empty interrupt is still being served
- VPU finishes a frame (!vpu_IsBusy) but VPU done interrupt is not
received
All above will cause clk_disable in interrupt handling not called,
thus VPU clock count increases by 1.
So I plan to resolve clock unbalance issue first by removing
clk_disable from VPU driver interrupt handling. Interrupt problem
will not affect clock issue any longer.
1. Driver: remove clk_disable from vpu_worker_callback
2.1. Lib: remove clk_enable from API GetOutputInfo
2.2. Lib: avoid disabling VPU clock when VPU is busy in SWReset
3. Test: replace GetOutputInfo with SWReset in decoder_close /
encoder_close
Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
|
|
This patch changes to use original sync mechanism for eof
irq, which may improve pan-display or alpha buffer update
performance.
1) Initialize flip_completion and alpha_flip_completion
only once when fb is initialized instead of initializing
it every time when pan display is called.
2) Clear and enable eof irq after selecting buffer ready.
In this way, we have no chance to lose an interrupt, as
selecting a new buffer ready doesn't make the eof irq
come(from the newly selected buffer) before we clear the irq
status and enable the irq. Otherwise, if we clear the irq
status and enable the irq before we doing down in pan-display
or alpha buffer update, we have chance(users call pan-display or
alpha buffer update faster than vsync frequency and blocks at
down()) to clear an unhandled irq, which may cause performance
issue.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
|
|
add vsync uevent report for user space.
add a IOCTL to enable/disable vsync uevent report to user space.
VSYNC uevent can let user space start draw just receive VSYNC irq,
and keep the draw within 16.7 ms that make the draw will show in
this frame, enhance the draw speed after receive input event.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
|
|
Currently, we support 2 cameras, which are relevant to
2 video devices respectively. This patch checks if video
device is opened to determine whether we need to power
down/on relevant camera when doing suspend/resume.
Also, this patch protects capture resources with busy
lock semaphore.
Signed-off-by: Liu Ying <Ying.Liu@freescale.com>
|
|
fix battery coulomb data for power down system ,define low battery
voltage for power down system is 3.42V
Signed-off-by: Rong Dian <b38775@freescale.com>
|
|
|
|
Early versions of this driver used a set of entropy generation parameters
inherited from QorIQ devices. Those parameters were a hardcoded set
based upon internally-suggested values, and worked well on QorIQ. However,
for certain mx6 devices, oscillator values were found to be exceeding
the upper limit, and so RNG instantiation was failing in those cases.
This code improves initialization by (a) making sure the oscillator
divider is set to a known value, and (b) converting the parameter selection
to a symbolic compiler-generated form, instead of using embedded
magic number constants.
The calculation is now based on the definition of RNG4_ENT_CLOCKS_SAMPLE,
which defaults to 1600 unless overridden by something. The lower limit
is then set as /4, and the upper limit set to *8.
Tested-by: Minnick Michael-B21710 <b21710@freescale.com>
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Jason Liu <r64343@freescale.com>
|
|
|
|
fix Kconfig waring of defaults for choice values not supported
Signed-off-by: Yuxi Sun <b36102@freescale.com>
|
|
Kernel dump when do wifi stress test with suspend and resume as below:
eth0: tx queue full!.
remove wake up source irq 103
PM: resume of devices complete after 348.934 msecs
Restarting tasks ... done.
------------[ cut here ]------------
WARNING: at net/sched/sch_generic.c:255 dev_watchdog+0x284/0x2a8()
NETDEV WATCHDOG: eth0 (fec): transmit queue 0 timed out
Modules linked in: ar6000
[<8004482c>] (unwind_backtrace+0x0/0xf8) from
[<80068cd0>] (warn_slowpath_common+0x4c/0x64)
[<80068cd0>] (warn_slowpath_common+0x4c/0x64)from
[<80068d7c>] (warn_slowpath_fmt+0x30/0x40)
[<80068d7c>] (warn_slowpath_fmt+0x30/0x40) from
[<803f0c50>] (dev_watchdog+0x284/0x2a8)
[<803f0c50>] (dev_watchdog+0x284/0x2a8) from
[<80074430>] (run_timer_softirq+0xec/0x214)
[<80074430>] (run_timer_softirq+0xec/0x214) from
[<8006e524>] (__do_softirq+0xac/0x140)
[<8006e524>] (__do_softirq+0xac/0x140) from
[<8006ea60>] (irq_exit+0x94/0x9c)
[<8006ea60>] (irq_exit+0x94/0x9c) from
[<80039240>] (do_local_timer+0x54/0x70)
[<80039240>] (do_local_timer+0x54/0x70) from
[<8003ea0c>] (__irq_svc+0x4c/0xe8)
Exception stack(0x80a2bf68 to 0x80a2bfb0)
bf60: 0000001f 80a3babc 80a2bfb0 00000000 80a2a000 80a7b8e4
bf80: 804befcc 80a3ee7c 1000406a 412fc09a 00000000 00000000 80a81440 80a2bfb0
bfa0: 8003fa64 8003fa68 60000013 ffffffff
[<8003ea0c>] (__irq_svc+0x4c/0xe8) from [<8003fa68>] (default_idle+0x24/0x28)
[<8003fa68>] (default_idle+0x24/0x28) from [<8003fc60>] (cpu_idle+0xbc/0xfc)
[<8003fc60>] (cpu_idle+0xbc/0xfc) from [<80008878>] (start_kernel+0x258/0x29c)
[<80008878>] (start_kernel+0x258/0x29c) from [<10008040>] (0x10008040)
---[ end trace 30671ac42e272c2d ]---
But ethernet and system still be alive. In sometime,the issue
will cause system hang like "nfs: server 10.192.242.179 not
responding, still trying".
The root cause is tx buffer descriptors are not cleaned when
ethernet resume back.
Signed-off-by: Fugang Duan <B38611@freescale.com>
|
|
Show video to IPU DP/fb0 when bootup, the color space incorrect
It needs to set the correct SRM_MODE when enable DP.
Signed-off-by: Wayne Zou <b36644@freescale.com>
|
|
Revert ENGR00212529 MX6x show video to fb0 when bootup,
the color space incorrect.
Update IPU DP CSC setting should not change the DP FG window's position setting,
it can be update when enabling IPU DP channel.
Otherwise, it will appear NFB4EOF_ERR and flip irq timeout errors.
Signed-off-by: Wayne Zou <b36644@freescale.com>
|
|
the original low memory killer only take care of system memory accounting,
but for so large shared memory occupy by GPU, and each process memory
killer account become unfair, very large 3D game will not killed firstly
if it going to background.
Add this account to let real large memory user get killed if going to background
eg, the "angry bird Space" will acquire 68,215,360 GPU memory for 1-6 toll-gate.
The test show it can quicker recovery from memory shortage situation,
since it's very like to be killed after add so much GPU memory for such 3D game.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
Acked-by: Lily Zhang
|
|
Add ipu device queue processing for overlay, and make it default.
This will instead prp_viewfinder work flow in the most user case.
Signed-off-by: Yuxi Sun <b36102@freescale.com>
|
|
Replace CSI_PRP_VF_MEM channel with CSI_MEM, then using ipu device
to do the processing or directly send to framebuffer if no processing
need to be perform.
Add the foreground overlay driver file name ipu_fg_overlay_sdc.c correspondding
to the former ipu_prp_vf_sdc.c
Discard the cam->vf_rotation parametter when uing the ipu device for processing
in the overlay, share the cam->rotation parametter with pp.
Signed-off-by: Yuxi sun <b36102@freescale.com>
|
|
If using mxcfb1 for HDMI display, it will print
'PHY PLL not locked'.
Fixed it with setting HDMI default to blank state.
Signed-off-by: Sandor Yu <R01008@freescale.com>
|
|
In RIGEL TO1.1, the same HDMI_SDMA fix is introduced as ARIK TO1.2. Add
support for RIGEL TO1.1 for HDMI_SDMA functionality.
In this patch:
1.Add hdmi_SDMA_check() interface to judge whether MX6 chip
support HDMI_SDMA.
2.Replace mx6q_version() check with hdmi_SDMA_check() to support
both ARIK To1.2 and RIGEL TO1.1.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
the original low memory killer only take care of system memory accounting,
but for so large shared memory occupy by GPU, and each process memory
killer account become unfair, very large 3D game will not killed firstly
if it going to background.
Add this account to let real large memory user get killed if going to background
eg, the "angry bird Space" will acquire 68,215,360 GPU memory for 1-6 toll-gate.
The test show it can quicker recovery from memory shortage situation,
since it's very like to be killed after add so much GPU memory for such 3D game.
Signed-off-by: Zhang Jiejing <jiejing.zhang@freescale.com>
|
|
Bug: VPU easily hang during suspend/resume standby mode i.MX6Q/i.MX6DL
Fix: standby mode doesn't power off/on PU but changes voltage instead, thus
VPU requires a reset cause there's always chance some cell is on
unstable state after voltage change
suspend/resume DSM is OK because it power off/on PU and probably there is a
power-on-reset sequence embedded in SOC
Signed-off-by: Hongzhang Yang <Hongzhang.Yang@freescale.com>
|
|
ENET pause frame has two issues (ticket TKT116501):
1. RX status fifo full.
2. XOFF has higher priority than XON when both XOFF and
XON have pending request.
Both of the issues can cause RX FIFO overruns when RX bandwidth
is over 120Mbps.
The issue has been fixed on Rigel TO1.1 and Arik TO1.2. Pause
frame has been enabled to avoid the overrun issue.
Signed-off-by: Fugang Duan <B38611@freescale.com>
|
|
The ioctl should return 0 when successful.
And the physical address is returned by
the parameter structures.
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
|
|
Need to enable both axi and pix clock before doing EPDC reset,
or the hardware reset will fail, which will result in dead loop
of EPDC resume function, and block system resume.
Signed-off-by: Anson Huang <b20788@freescale.com>
|
|
The flexcan is still in disable mode during suspend if it's still
not up. We do not need to enter stop mode if find the device is not
up since the stop mode does not work well in disable mode(remote wakeup
does not work).
Using disable mode for suspend if it's not up.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
|
|
Clean up duplicated code and hide the details of enter/exit
stop mode into API.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
|
|
Currently flexcan only exits stop mode by remote wakeup,
if system resumes normally, the flexcan may still in stop mode
and can not work anymore.
Change to also exit stop mode during normal resume in case system
is not remote wakeup by flexcan.
Signed-off-by: Dong Aisheng <b29396@freescale.com>
|
|
This patch limits AXI pipeline depth to 1 as a workaround for errta
TKT134813, the write
concurrency problem on mx6.
Signed-off-by: Steve Cornelius <steve.cornelius@freescale.com>
Signed-off-by: Terry Lv <r65388@freescale.com>
|
|
The synchronize_rcu() call resulting from making every serial driver
wake-up capable (commit b3b708fa) slows boot down on my Tegra2x system
(with CONFIG_PREEMPT disabled).
But this is avoidable since it is the device_set_wakeup_enable() and then
subsequence disable which causes the delay. We might as well just make
the device wakeup capable but not actually enable it for wakeup until
needed.
Effectively the current code does this:
device_set_wakeup_capable(dev, 1);
device_set_wakeup_enable(dev, 1);
device_set_wakeup_enable(dev, 0);
We can just drop the last two lines.
Before this change my boot log says:
[ 0.227062] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 0.702928] serial8250.0: ttyS0 at MMIO 0x70006040 (irq = 69) is a Tegra
after:
[ 0.227264] Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
[ 0.227983] serial8250.0: ttyS0 at MMIO 0x70006040 (irq = 69) is a Tegra
for saving of 450ms.
Suggested-by: Rafael J. Wysocki <rjw@sisk.pl>
Acked-by: Rafael J. Wysocki <rjw@sisk.pl>
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
Signed-off-by: Huang Shijie <b32955@freescale.com>
|
|
Clean build warning:
drivers/dma/imx-sdma.c: In function 'sdma_config_channel':
drivers/dma/imx-sdma.c:763: warning: unused variable 'data'
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
|
|
- On mx6dl TO 1.1, adma now can work when ahb bus frequency is low like
24Mhz.
Note:
hw issue number:TKT093233
Signed-off-by: Ryan QIAN <b32804@freescale.com>
|
|
For common DMA enguine, only slave_sg mode and cyclic mode is support.
However, SDMA can meet more kinds of DMA operation mode requirement. The
origin flags NORMAL and LOOP can no longer satisfy SDMA user's need.
In this patch,
1 Construct a new enum sdma_mode to declare more kind of SDMA
modes. This new variable would replace the old flags.
2 Init sdma_mode to unvalid every time allocating a SDMA channel
to avoid last SDMA channel configuration's impact.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
HDMI enable/disable_pins setting HDMI DDC enable, but the pins confilct
with I2C2 bus on board design, so only HDCP function is enable
the function can been called.
Remove enable/disable_pins in blank/unblank function to make sure
I2C2 bus can work when HDCP disable.
Signed-off-by: Sandor Yu <R01008@freescale.com>
|
|
1. Current thermal framework use delayed work to update
temperature, but delayed work may be blocked if system is
busy with the high priority task, which will cause the thermal
protect function not working in time, so we need to add alarm
function, when temperature reach the critical point, the alarm
function will generate an interrupt to reboot system.
2. No need to read 5 times of sensor value, read once is enough.
Signed-off-by: Anson Huang <b20788@freescale.com>
|
|
Conflicts:
drivers/mxc/vpu/mxc_vpu.c
|
|
Fix build warning bring in by Google's code
Signed-off-by: Xinyu Chen <xinyu.chen@freescale.com>
|
|
Two reason:
1. VPU regulator is not enough stable,sometimes will cause system hang
2. GPU regulator is not ready, because GPU/VPU share PU LDO, so revert
the patch firstly.
Signed-off-by: Robin Gong <B38343@freescale.com>
|
|
ASRC driver would configure ASRC as ideal ratio mode for p2p playback.
However, multi channel convert can't work well with ideal ratio mode.
In this patch, change ASRC p2p playbck mode to internal ratio mode to
better support multi channel p2p playback.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
1 Add support for HDMI_SDMA config.
2 Add support for HDMI_SDMA interrupt handler.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
To allocate an SDMA channel, imx_dma_data struct is need. However,
if the member dma_request_p2p is not set to 0 before configuration,
SDMA driver would treat the channel as p2p(periphal to periphal) DMA and
set SDMA channel context in p2p way. In the worst case, SDMA would
access some unexisted address cause of mis configuration above and thus
cause kernel panic or hang.
In this patch, set imx_dma_data struct to 0 once it is allocated from
stack.
Signed-off-by: Chen Liangjun <b36089@freescale.com>
|
|
Add non-interleaved YUV444 pixel format IPU_PIX_FMT_YUV444P support
Signed-off-by: Wayne Zou <b36644@freescale.com>
|
|
Add non-interleaved YUV444 pixel format IPU_PIX_FMT_YUV444P support
Signed-off-by: Wayne Zou <b36644@freescale.com>
|
|
Add non-interleaved YUV444 pixel format IPU_PIX_FMT_YUV444P support
Signed-off-by: Wayne Zou <b36644@freescale.com>
|
