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2015-10-10mmc: sdhci: check interrupt flags in ISR againAlexander Stein
When using MSI it is possible that a new MSI is sent while an earlier MSI is currently handled. In this case SDHCI_INT_STATUS only contains SDHCI_INT_RESPONSE and the ISR would not be called again. But at the end of the ISR SDHCI_INT_DATA_END is now also pending which would be ignored. Fix this by rereading the interrupt flags in the ISR until no interrupt we care is pending. Signed-off-by: Alexander Stein <alexander.stein@systec-electronic.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 6379b2375a0c5a6ad437616a4018e6b8fd95e97c)
2015-10-09mmc: sdhci-pci: add runtime pm supportAdrian Hunter
Ths patch allows runtime PM for sdhci-pci, runtime suspending after inactivity of 50ms and ensuring runtime resume before SDHC registers are accessed. During runtime suspend, interrupts are masked. The host controller state is restored at runtime resume. For Medfield, the host controller's card detect mechanism is supplanted by an always-on GPIO which provides for card detect wake-up. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 66fd8ad5100b5003046aa744a4f12fa31bb831f9)
2015-06-10colibri_t20/t30: net: usb: asix: ethernet mac address handlingMarcel Ziswiler
Revise Ethernet MAC address assignment: should now handle up to two instances of custom user MACs (2nd one with a 0x100000 offset). This way customer does not have to worry about NVM on a secondary Ethernet on the carrier board and still gets a valid official MAC address from us (e.g. analogous to how we did it on our Protea carrier board). Please note that instead of defaulting to the default ASIX MAC address if no valid one is encountered this driver now generates a random one pre-fixed with the ASIX OUI.
2015-06-10net: usb: asix: integrate driver 4.17.0Marcel Ziswiler
Integrate latest ASIX proprietary driver version 4.17.0 (AX88772C_772B_772A_760_772_178_LINUX_DRIVER_v4.17.0_Source.tar.bz2).
2015-05-12spi:tegra: fix number of words in transferMurat Khairulin
Calculate the number of words in a transfer properly: if there are 129-131 bytes, then number of words is more than 32, therefore the transfer should be handled with DMA rather than FIFO.
2015-05-12Merge branch 'tegra-nand-next' into tegra-nextMarcel Ziswiler
2015-05-04drivers: w1: tegra_w1: Improve IRQ detectionSanchayan Maity
On Tegra30, on a high CPU load or operating at maximum frequency results in continous interrupt generation, with the following log spewout: (tegra_w1_irq: line 236) spurious interrupt, status = 0x800 (tegra_w1_irq: line 236) spurious interrupt, status = 0x800 (tegra_w1_irq: line 236) spurious interrupt, status = 0x800 (tegra_w1_irq: line 236) spurious interrupt, status = 0x800 which shows the TX_FIFO_DATA_REQ to be somehow continously being set. To circumvent this specifically detect the bit transfer and presence done IRQ's only, for generating a "completion" signal on which the core logic waits. We anyhow only wait for these interrupts in particular. While at it, also change the error message to be printed only if it is conditionally enabled instead of all the time, which floods the serial console and allows a wrong interpretation of the one wire device not working at all. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2015-05-04drivers: w1: tegra_w1: Fix race condition on high CPU loadSanchayan Maity
On Tegra3 at high CPU load, for example while running stress, reading data from one wire results in the following stack trace: [ 58.436052] [<c05e93d4>] (__raw_spin_lock_irqsave+0x3c/0xac) from [<c05e945c>] (_raw_spin_lock_irqsave+0x18/0x1c) [ 58.446322] [<c05e945c>] (_raw_spin_lock_irqsave+0x18/0x1c) from [<c0048eb4>] (complete+0x28/0x64) [ 58.455276] [<c0048eb4>] (complete+0x28/0x64) from [<c03e276c>] (tegra_w1_irq+0x74/0xb4) [ 58.463376] [<c03e276c>] (tegra_w1_irq+0x74/0xb4) from [<c009a1fc>] (handle_irq_event_percpu+0x9c/0x278) [ 58.472847] [<c009a1fc>] (handle_irq_event_percpu+0x9c/0x278) from [<c009a424>] (handle_irq_event+0x4c/0x6c) [ 58.482666] [<c009a424>] (handle_irq_event+0x4c/0x6c) from [<c009cc40>] (handle_fasteoi_irq+0xe0/0x118) [ 58.492048] [<c009cc40>] (handle_fasteoi_irq+0xe0/0x118) from [<c0099bd8>] (generic_handle_irq+0x30/0x40) [ 58.501616] [<c0099bd8>] (generic_handle_irq+0x30/0x40) from [<c000ecfc>] (handle_IRQ+0x88/0xc8) [ 58.510393] [<c000ecfc>] (handle_IRQ+0x88/0xc8) from [<c0008430>] (asm_do_IRQ+0x18/0x1c) [ 58.518475] [<c0008430>] (asm_do_IRQ+0x18/0x1c) from [<c000e098>] (__irq_usr+0x38/0xc0) [ 58.526464] Exception stack(0xe51a3fb0 to 0xe51a3ff8) [ 58.531506] 3fa0: 00000000 bea29b04 4030b1b0 4030b4c8 [ 58.539673] 3fc0: 4030b22c 4fd2f305 0000d770 0000d6b0 00000000 00000001 0000000d 00000145 [ 58.547839] 3fe0: 193c62ce bea29af4 4030b22c 4020beb4 600b0010 ffffffff [ 58.554445] Code: e5843004 e10f0000 f10c0080 e3a02001 (e1953f9f) [ 58.560539] ---[ end trace fb2fc83ceb8e95c1 ]--- [ 58.565154] Kernel panic - not syncing: Fatal exception in interrupt [ 58.571520] [<c0014ef4>] (unwind_backtrace+0x0/0xec) from [<c05e10c8>] (dump_stack+0x20/0x24) [ 58.580039] [<c05e10c8>] (dump_stack+0x20/0x24) from [<c05e16a0>] (panic+0x7c/0x1ac) [ 58.587783] [<c05e16a0>] (panic+0x7c/0x1ac) from [<c0012038>] (die+0x280/0x2e8) [ 58.595087] [<c0012038>] (die+0x280/0x2e8) from [<c05e1130>] (__do_kernel_fault.part.3+0x64/0x84) [ 58.603952] [<c05e1130>] (__do_kernel_fault.part.3+0x64/0x84) from [<c0015c84>] (do_page_fault+0x204/0x21c) [ 58.613681] [<c0015c84>] (do_page_fault+0x204/0x21c) from [<c000830c>] (do_DataAbort+0x44/0xa8) [ 58.622369] [<c000830c>] (do_DataAbort+0x44/0xa8) from [<c000de18>] (__dabt_svc+0x38/0x60) This seems to be generated due a possible race condition between the on stack kernel completion being set to NULL in tegra_w1_touch_bit, while a possible spurious IRQ calling this completion in the IRQ handler. This is a temporary bandaid and the ideal solution would be to find why this affects the Tegra3 and not Tegra2. Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com> Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
2015-04-02apalis_t30: igb: no nvm and Ethernet MAC address handlingMarcel Ziswiler
Springville/i211 with a blank Flash/iNVM use different PCI IDs. Extend the driver to load despite i210/i211 data sheets claiming tools only, not for driver. Only warn rather than fail on NVM validation failures on Apalis T30. Revise Ethernet MAC address assignment: should now handle up to two instances of custom user MACs (2nd one with a 0x100000 offset). This way customer does not have to worry about NVM on a secondary Ethernet on the carrier board and still gets a valid official MAC address from us (e.g. analogous to how we did it on our Protea carrier board). Use the Toradex OUI as default MAC address if no valid one is encountered. Tested on samples of Apalis T30 2GB V1.0B, V1.0C, V1.1A, Apalis T30 1GB V1.0A, V1.1A and Apalis T30 1GB IT V1.1A both with blank NVMs as well as iNVMs programmed with Intel's defaults.
2015-04-02igb: integrate tools only device supportMarcel Ziswiler
Springville/i211 with a blank Flash/iNVM use a different PCI ID (tools only, not for driver) than properly programmed ones. While at it also fix ethtool time stamping as well as RX flow hash indirection functionality.
2015-04-02igb: integrate igb driver 5.2.17Marcel Ziswiler
Integrate latest igb driver version 5.2.17 (igb-5.2.17.tar.gz from e1000.sf.net).
2015-04-02colibri_t20: initial 16-bit BCH ECC supportMarcel Ziswiler
2015-03-30Merge remote-tracking branch 'remotes/ubifs-v3.1/master' into tegra-nand-nextMarcel Ziswiler
Conflicts: drivers/mtd/ubi/ubi.h drivers/mtd/ubi/wl.c
2015-03-12media: fix work of analog camerasWojciech Bieganski
2015-02-10Prevent null pointer dereferenceMariusz Glebocki
2015-02-09apalis_t30: fix work of MIPI-CSI2 cameras after merging 'l4t-r16-r2' branchWojciech Bieganski
2015-02-03Revert "mmc: card: retry if transfer aborted due to out of range"Marcel Ziswiler
This reverts commit bdf9e11d339ebc121e80e7ecdd44e0abcaf4ff38.
2015-02-03mmc: card: increase command retries to 10 from 3Varun Wadekar
When commands timeout, previously we had code to retry the same command 3 times. But under some situations 3 retries do not suffice. Increasing the retries to 10 does the trick. Also if the card does not respond after 10 retries then the card is dead for sure. But if the same card responds in between 3 to 10 retries then it is always beneficial to have retries as 10. Bug 914934 Change-Id: I6b1e95c10ca5a62dde84ce8cacbe53ad2197ab33 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/72092 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> (cherry picked from commit c4beda3e798ed91e1dadbce4206b407832fcc40b)
2015-02-03mmc: core: Retry if data commands fail with errorMayuresh Kulkarni
If the data commands fail due to some error, retry the transfer. Add 3 retries for data commands. for bug 914934 Change-Id: I53245ddd159abdbade09f841d9490d2f106e7c88 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/71181 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Sachin Nikam <snikam@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> (cherry picked from commit fd804ee58d3f9ce10cb2fe16aa76ae0407912d32)
2015-02-03mmc: Add tracepoints of mmc block operationsKen Sumrall
Add tracepoints to record the start and end of each mmc block operation. This includes read, write, erase, secure erase, trim, secure trim1 and secure trim 2, discard and sanitize commands. Change-Id: Ic5d1cbdb9adb940d8b1a2a13c73970023575df50 Signed-off-by: Ken Sumrall <ksumrall@android.com> Signed-off-by: Iliyan Malchev <malchev@google.com> Conflicts: drivers/mmc/card/block.c drivers/mmc/core/core.c (cherry picked from commit 4de9a433c26e47d9b4a93105eb92935321100786)
2015-02-03mmc: core: new discard feature support at Samsung eMMC v4.41+.singhome_lee
Support discard feature if MID field in the CID register is 0x15, EXT.CSD[192] (device version) is 5 and Bit 0 in the EXT.CSD[64] is 1. Also removed REQ_SECURE flag check to avoid kernel hang. This patch is released from samsung. Change-Id: I4023a900680e9bca10c40311b09ed077a22617db (cherry picked from commit 4acc227edfb631d377e14911287c1b73682fc9c2) Conflicts: drivers/mmc/card/block.c
2015-02-03eMMC: Fix electric leakage SDMMC4_DAT0~DAT7 in Nakasisimon_chuang
Change-Id: Ia56018522e5d18ca5bfd25858ec943da93d3edc3 (cherry picked from commit e363e576f448d6132340c5d0bda580fef212888d) Conflicts: drivers/mmc/host/sdhci-tegra.c
2015-02-03[PATCH 3/3] mmc: host: sdhci: abort suspend if host suspend fails.kirt_hsieh
Change-Id: I46e3f1a158d61a0b255fae5d510c8f87579c435d Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/47847 Reviewed-by: Kirt Hsieh <Kirt_Hsieh@asus.com> Tested-by: Kirt Hsieh <Kirt_Hsieh@asus.com> Reviewed-by: Vincent Yue <Vincent_Yue@asus.com> Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/48199 Reviewed-by: Jim1 Lin <jim1_lin@asus.com> Tested-by: Jim1 Lin <jim1_lin@asus.com> Reviewed-by: Leslie Yu <Leslie_Yu@asus.com> (cherry picked from commit 8eadc6d514b7838c398ff3499ab5f2e012e2fc06) Conflicts: drivers/mmc/host/sdhci.c
2015-02-03eMMC: Enable deferred resume functionban_feng
Change-Id: I40a8481618b1a5995a713ff343c7532badd20b65 Change-Id: I399302118c9d8d8246a4a304ff7a1ea80889dbc6 Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45568 Reviewed-by: Ban Feng <Ban_Feng@asus.com> Tested-by: Ban Feng <Ban_Feng@asus.com> Reviewed-by: Sam hblee <Sam_hblee@asus.com> (cherry picked from commit 121c0c6dffe16c683f4dbf00ed841fb4de1f70a0) Conflicts: drivers/mmc/core/mmc.c
2015-02-03eMMC: Add more debugging messagesban_feng
Change-Id: I28d670944cbfd55e2b2ad98b727368a8dfdc0944 Change-Id: I2bb65335c2468b257473fe264e705826cfd4474e Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45300 Reviewed-by: Ban Feng <Ban_Feng@asus.com> Tested-by: Ban Feng <Ban_Feng@asus.com> Reviewed-by: Sam hblee <Sam_hblee@asus.com> (cherry picked from commit 1711f72a9840f3667cf93c774ac16c2d8417375c) Conflicts: drivers/mmc/core/core.c
2015-02-03eMMC: Add Product revision, Sector count and driver init logban_feng
Change-Id: I89b544afbb0a109a222621a9948399fba8f77693 Change-Id: Ie366a152100a478e7811b4395f3fae9794bb1386 Reviewed-on: http://mcrd1-5.corpnet.asus/code-review/master/45221 Reviewed-by: Ban Feng <Ban_Feng@asus.com> Tested-by: Ban Feng <Ban_Feng@asus.com> Reviewed-by: Sam hblee <Sam_hblee@asus.com> Conflicts: drivers/mmc/core/mmc.c include/linux/mmc/card.h asdf
2015-01-16Merge remote-tracking branch 'remotes/nvidia/l4t/l4t-r16-r2' into tegra-nextMarcel Ziswiler
(tegra-l4t-r16-16.5) Conflicts: drivers/media/video/tegra_v4l2_camera.c drivers/mmc/host/sdhci.c drivers/watchdog/tegra_wdt.c include/media/tegra_v4l2_camera.h
2015-01-09media: Added Analog Devices ADV7280 video decoder driverWojciech Bieganski
2014-12-18video: tegra: fb: fix pixel clock polarityMarcel Ziswiler
The pixel clock polarity setting was wrong: The kernel display flags are rather somewhat confusing: The flags specify the edge where the data should be driven by the controller (and hence not sampled by the display!). Please note that we don't change the default pixel clock polarity.
2014-12-18apalis/colibri_t20/t30: hdmi: fix dc disable stateMarcel Ziswiler
Our move to modedb lead to the HDMI display controller always being enabled (unless forced off by vidargs). This patch makes sure it gets disabled upon boot disconnected as well as upon later disconnect. Note: This also fixes DVFS on Colibri T30 in the sense that it will again stay at 400 MHz EMC as long as no DVI-D aka HDMI display is connected during boot.
2014-12-09mmc: Allow forward compatibility for eMMCRomain Izard
As stated by the eMMC 5.0 specification, a chip should not be rejected only because of the revision stated in the EXT_CSD_REV field of the EXT_CSD register. Remove the control on this value, the control of the CSD_STRUCTURE field should be sufficient to reject future incompatible changes. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> (cherry picked from commit 03a59437ef6b6ad7fb0165cb9b96c08d6bf057fc)
2014-12-09mmc: core: Update the ext-csd.rev check for eMMC5.1Yuvaraj Kumar C D
With the new eMMC5.1 spec, there is a new EXT_CSD register with the revision number(EXT_CSD_REV) 7. This patch updates the check for ext-csd.rev number as 7. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Yuvaraj Kumar C D <yuvaraj.cd@samsung.com> Reviewed-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Chris Ball <cjb@laptop.org> (cherry picked from commit 6636bad839d9936e73e48c4841eda83a58fcdb53) Conflicts: drivers/mmc/core/mmc.c
2014-11-24media: adv7180 now works at 25 fpsWojciech Bieganski
This commit, updates the driver to work faster with 32-Lead and 40-Lead versions of adv7180 chip. Output pin VS/FIELD is now configured as VSYNC.
2014-10-28video: tegra: nvmap: prevent null pointer dereferenceColibri_T30_LinuxImageV2.3Beta3_20141031Colibri_T20_LinuxImageV2.3Beta3_20141031Apalis_T30_LinuxImageV2.3Beta3_20141031Mariusz Glebocki
2014-10-28mmc: tegra: mark host as CMD23 capableStefan Agner
Newer eMMC standards use CMD23 for multi-block transfer. These command has the advantage that only one command is necessary, no stop command after the transfer is required. The kernel already supports this command, but we need to enable the capability on the host level. Tests verified that the MMC code detects that SD-card do not support CMD23 and hence don't use that command.
2014-09-03uvcvideo: Add a mapping for H.264 payloadsStephan Lachowsky
Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
2014-08-04Revert "fbcon: workaround full screen custom boot logo issue and disable cursor"Colibri_T30_LinuxImageV2.3Beta1_20140804Colibri_T20_LinuxImageV2.3Beta1_20140804Apalis_T30_LinuxImageV2.3Beta1_20140804colibriMarcel Ziswiler
The whole rounding stuff really depends on a specific resolution. This reverts commit 4dd83942b418b937e3da02746baabf63f37fe682.
2014-08-04fbcon: workaround full screen custom boot logo issue and disable cursorRaul Munoz
Force round down in division calculating required logo height as preceding code did round up as follows: logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height); Which resulted in no boot-logo shown at all due to not enough lines being available. Additionally disable cursor for custom boot logo.
2014-08-04Revert "fbcon: workaround full screen boot-logo issue"Marcel Ziswiler
Using this unconditionally cuts the birds feet (;-p). This reverts commit 491f263ebfb338c59abfbde6d4e0e7256a0150fa.
2014-08-01nvmap: fix test condition to avoid infinite looptegra-l4t-r16-er-2014-08-01daily-2014.08.04.3_l4t/l4t-r16Bibek Basu
Make sure that we dont enter infinite loop due to negative value of pins in some cases. Also remove debugging check for refcount. Bug 1478467 Change-Id: I7df8efa5b3cf8927a0c18363add4f031aca48e48 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/450209 Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Tested-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-31media: tegra_v4l2_camera: use FRAME_START syncptBryan Wu
Also use nvhost_syncpt_incr_max_ext(). Bug 1478352 Change-Id: Ib868bd2bd7a070e4c410e48bd51977ac45b7d477 Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/439471 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Bibek Basu <bbasu@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com> Reviewed-by: Winnie Hsu <whsu@nvidia.com>
2014-07-31video: tegra: host: power module before accessBibek Basu
There could be race in refcount update leading to access of module registers without enabling the clock and power.This patch tries to catch such instances and enables power. Bug 1478467 Change-Id: Ia32da44bfcd7838e312815b6261ccadf4470a761 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/448701 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-31video: tegra: nvhost: validate nvmap_handle_refBibek Basu
nvhost_job_unpin should always get the nvmap_handle_ref from rb_entry after validating handle and presence in the tree. Bug 1478467 Change-Id: Ibf5f64a1a82fea8adbf7500bdb36b76357776448 Signed-off-by: Bibek Basu <bbasu@nvidia.com> Reviewed-on: http://git-master/r/436076 Reviewed-by: Automatic_Commit_Validation_User GVS: Gerrit_Virtual_Submit Reviewed-by: Venkat Moganty <vmoganty@nvidia.com> Reviewed-by: Matthew Pedro <mapedro@nvidia.com>
2014-07-21mmc: card: retry if transfer aborted due to out of rangeStefan Agner
This works around a issue we see when using eMMC 4.5 on tegra SDHCI host controller.
2014-07-21mmc: tegra: use 1.8V quirk only on affected instancesStefan Agner
The 1.8V quirk also affected the internal eMMC which disabled newer modes such as SDR50, SDR104 and DDR50. This in turn lead to an out of spec usage since the clock was still 50MHz. By creating a no_1v8 field in the platform data we can now enable this work around on a per-instance basis. Hence we enable the quirk only on the controllers which are connected to the external SD-slots.
2014-07-14fbcon: workaround full screen boot-logo issueRaul Munoz
Force round down in division calculating required logo height as preceding code did round up as follows: logo_lines = DIV_ROUND_UP(logo_height, vc->vc_font.height); Which resulted in no boot-logo shown at all due to not enough lines being available.
2014-07-08media: vi driver on Colibri T20 is working againWojciech Bieganski
This commit resolves an issue of non-working vi camera driver on Colibri T20 occured after a l4t-r16-r4 merge.
2014-07-08media: AS0260 camera driver improvementsWojciech Bieganski
2014-06-04media: video: fix clock settings for Tegra VI driverBryan Wu
- remove reduntant emc clock rate set which is controlled by DVFS - VI's maxim working clock freq is 300MHz - Change VI clock divider from an integer to a decimal, so the maxim VI clock on Cardhu should be 272MHz (PLL_P is 408MHz and divider is 1.5) Bug 1478352 Change-Id: I4028ed8531d92300d131befb53a4c9dc9f90930d Signed-off-by: Bryan Wu <pengw@nvidia.com> Reviewed-on: http://git-master/r/419071 Reviewed-by: Winnie Hsu <whsu@nvidia.com> Tested-by: Winnie Hsu <whsu@nvidia.com>
2014-06-04Added continuous mode capture supportAlex Feinman
Signed-off-by: Bryan Wu <pengw@nvidia.com> Change-Id: I67c50ff86b53a6c1001d2b688251dc55bd2eff55 Reviewed-on: http://git-master/r/419070 Reviewed-by: Winnie Hsu <whsu@nvidia.com>
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