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2012-03-14video: tegra: dc: Fix the EMC bandwidth clear.Kevin Huang
Bug 951626 Change-Id: Ia7c7474aa0f066cba8bd1519a98e302c4b3992e0 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/89076 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-03-13tegra: usb: host: Fix the race condition in hub controlvjagadish
Fix the race condition in tegra_ehci_hub_control which is causing the usb not to work on usb instance 1. Bug 948702 Change-Id: I3e8c7ecc90ee1ec96642292f9a83b09c413e9400 Signed-off-by: vjagadish <vjagadish@nvidia.com> Reviewed-on: http://git-master/r/89002 Reviewed-by: Varun Colbert <vcolbert@nvidia.com> Tested-by: Varun Colbert <vcolbert@nvidia.com>
2012-03-13wireless: bcmdhd: make wext and cfg80211 choicesMursalin Akon
make wext and cfg80211 integration from bcmdhd choices Bug 924521 Change-Id: Ie0c46159003985e4e4b29b2809fe881ce924dbee Signed-off-by: Mursalin Akon <makon@nvidia.com> Reviewed-on: http://git-master/r/88908 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Allen Martin <amartin@nvidia.com> Tested-by: Gerrit_Virtual_Submit
2012-03-13serial: tegra: Define correct port typeLaxman Dewangan
When doing the cat /proc/tty/driver/tegra_uart, the serial core display the message as 0: uart:unknown port:00000000 irq:68 tx:0 rx:0 CTS|DSR|CD|RI 4: uart:unknown port:00000000 irq:123 tx:0 rx:0 CTS|DSR|CD|RI This is because the correct port type and iotype are not getting set in tegra serial driver. Setting these parameter to proper to display the information as 1: uart:TEGRA_UART mmio:0x70006040 irq:69 tx:0 rx:0 CTS|DSR|CD|RI 2: uart:TEGRA_UART mmio:0x70006200 irq:78 tx:477 rx:1603 RTS|CTS|DTR|DSR|CD|RI 3: uart:TEGRA_UART mmio:0x70006300 irq:122 tx:0 rx:0 CTS|DSR|CD|RI 4: uart:TEGRA_UART mmio:0x70006400 irq:123 tx:0 rx:0 CTS|DSR|CD|RI bug 889724 Change-Id: Ia095623c53d1a3840c4d3759141cdf23cc2d4547 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/89122 Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
2012-03-13mfd: max77663: Handle case for PWR_OFF and SFT_RST setting simultaneouslyJinyoung Park
MAX77663 PMU doesn't allow PWR_OFF and SFT_RST setting in ONOFF_CFG1 at the same time. So if it try to set PWR_OFF and SFT_RST to ONOFF_CFG1 simultaneously, handle only SFT_RST and ignore PWR_OFF. Bug 949650 Change-Id: I90c602e22c813b05fcd9047153cea3ed2cbd596f Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/87981 Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Tested-by: Johnny Qiu <joqiu@nvidia.com>
2012-03-13regulator: max77663: Don't use low-power mode for N-Channel LDOsJohnny Qiu
N-Channel LDOs on MAX77663 doesn't work well. It has glitches. Don't use it as WAR. Bug 949641 Change-Id: Ib0c8918137bccc0ce3b30bd6d97ad5f9bd39277e Signed-off-by: Johnny Qiu <joqiu@nvidia.com> Reviewed-on: http://git-master/r/87691 Tested-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-13iio: light: ALS driver for LTR558Sachin Nikam
Adding driver for Ambient Light and Proximity sensor from Lite On Technology. This driver has sysfs interface to get the als and proximity values and enable/disable als and proximity. Bug 901133 Change-Id: Iafa0346d74825a67d94143181922de7a16cc7718 Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/83837 Reviewed-by: Darrell Hunt <dhunt@nvidia.com>
2012-03-12crypto: tegra-se: Check for valid reqeusted buffer sizeMallikarjun Kasoju
Added check for valid requested process buffer size. Bug 928454 Change-Id: I2dc389af64cb3de2f0a0a3f0bbc5057dd9bd676c Reviewed-on: http://git-master/r/89381 Reviewed-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Tested-by: Mallikarjun Kasoju <mkasoju@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-03-12misc: tegra-baseband: Add support for L2 and cleanup code.Raj Jayaraman
Bug 886459 Signed-off-by: Raj Jayaraman <rjayaraman@nvidia.com> (cherry picked from commit 9032b38a76d8337ee6b9582265171ca09473a3e9) Change-Id: Ifa5ad5bdb3a782119a2920281bc39ce5f6fd2a5a Reviewed-on: http://git-master/r/88868 Reviewed-by: Rajkumar Jayaraman <rjayaraman@nvidia.com> Tested-by: Rajkumar Jayaraman <rjayaraman@nvidia.com> Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-03-12video: tegra: nvmap: optimize uc & wc allocations.Krishna Reddy
Changing page attributes and cache maintenance reduces performance in applications doing runtime reallocations. Keep pool of UC & WC pages to avoid expensive operations when doing allocations. bug 865816 (refactored initial changes from Kirill and added shrinker notification handling) Change-Id: I43206efb1adc750ded672bfe074e0648f2f9490b Signed-off-by: Krishna Reddy <vdumpa@nvidia.com> Reviewed-on: http://git-master/r/87532 Reviewed-by: Donghan Ryu <dryu@nvidia.com> Reviewed-by: Kirill Artamonov <kartamonov@nvidia.com> Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com> Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
2012-03-12regulator: tps65910: Sleep off rails when ext sleep configuredLaxman Dewangan
Keep the rails OFF in sleep mode only when the rails are controlled by external sleep control. The devices tps65910 and tps65911, both has the sleep input. The tps65911's sleep input is not same as tps65910's EN3 and hence taking care of SLEEP input as separate external sleep control input. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> cherry picked from mainline commit 87ae88a17396fe3f91c34ab44f460e5680eb6f61 Change-Id: I05645082ad5268a4553891db6b35af33650b7a95 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/89125
2012-03-12video: tegra: host: Set rate for all clocks in nvhost deviceJinyoung Park
Fixed rate setting problem what set rate for only a clock in nvhost device, even if there are clocks more than one in nvhost device. Bug 938580 Signed-off-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-on: http://git-master/r/85129 (cherry picked from commit 5818d42dc0ad5dfa7659dca5d7f61b572c08613d) Change-Id: Id3a7be50541b1d93a2ed7353f3eabc71dd398773 Reviewed-on: http://git-master/r/87276 Tested-by: Jinyoung Park <jinyoungp@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-09staging: iio: magnetometer: ak8975: Retrieve the correct i2c client dataPreetham Chandru
i2c_get_clientdata() returns an object of type struct indio_dev and not of type struct ak8975_data. Bug 946328 Signed-off-by: Preetham Chandru R <pchandru@nvidia.com> Change-Id: I5803306d6a7829cdf822d22f51fdcdb769fbea1d Reviewed-on: http://git-master/r/88329 Reviewed-by: Mursalin Akon <makon@nvidia.com> Reviewed-by: Shashank Sharma <shashanks@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-09regulator: tps65910: Configure correct value for VDDCTRL vout regLaxman Dewangan
As per datasheet, the voltage output is defined as from SEL[6:0] = 3 to 64 (dec) Vout= (SEL[6:0] × 12.5 mV + 562.5 mV) The list_voltage returns the vout as 600mV + selector * 12.5mV and so equivalent VSEL is selector + 3. Adding 3 on selector when configuring VSEL register for VDDCTRL output. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> cherry picked from mainline commit c4632aed3e5b134c55b54af19db49662959384c1 Change-Id: Ifc514a87803191cf796ffc0d75d979476e712dde Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/88830
2012-03-09usb: gadget: android: Honor CONFIG_USB_GADGET_VBUS_DRAWScott Anderson
The maximum current draw was hard coded to 500 mA. composite.c has code that uses CONFIG_USB_GADGET_VBUS_DRAW to set the bMaxPower and to set whether or not the device is self-powered if they haven't been set. This change removes the code in android.c to allow composite.c to set them. (cherry picked from commit 09701e3edf03f92f4215aad83b32cd8cec7fb689 from android.googlesource.com/common.git) Change-Id: I9db37922e91ee86e9e5c0e14519e119e5c41ca48 Signed-off-by: Scott Anderson <saa@google.com> Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-on: http://git-master/r/78889 Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-03-08input: touch: atmel_mxt_ts: Reduce power during LP0.Robert Collins
Maximum power saving is observed by disabling multiple touchscreen objects. Objects must be saved going into LP0, and restored in reverse order upon resuming from LP0. Bug 919435 Change-Id: I42799fbb02efd28e4954b53b3d052ad138537ce9 Signed-off-by: Robert Collins <rcollins@nvidia.com> Reviewed-on: http://git-master/r/88458 Reviewed-by: Dan Willemsen <dwillemsen@nvidia.com> Tested-by: Gerrit_Virtual_Submit
2012-03-08drivers: misc: nct: Fixed spurious nct interruptsJoshua Primero
Enabled one-shot mode in the bottom half handler of nct interrupts to force a conversion/comparison. This effectively stops repeated nct interrupts. Signed-off-by: Joshua Primero <jprimero@nvidia.com> Reviewed-on: http://git-master/r/85277 (cherry picked from commit bc90335e0201cba073333c679b2fddff7bb293f1) Change-Id: Id0bd19f8f464ffbd9079fc2910a1bbcd0e621843 Reviewed-on: http://git-master/r/88373 Reviewed-by: Joshua Primero <jprimero@nvidia.com> Tested-by: Joshua Primero <jprimero@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com>
2012-03-08video: tegra: dc: Remove unnecessary delay in dc postsuspendMin-wuk Lee
Remove unnecessary 100ms delay for primary panel since this is needed for HDMI type only. Bug 940012 Change-Id: Id27966fb28faa73ade3a868a9f89cadbde76e227 Signed-off-by: Min-wuk Lee <mlee@nvidia.com> Reviewed-on: http://git-master/r/87613 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-08video: tegra: implement DC capabilities ioctlAdam Cheney
The returned capabilities bitfield is initially 0 (no caps). bug 942631 Change-Id: Ia7496981e525526147ecebe67b09dc877d3e0c17 Reviewed-on: http://git-master/r/87088 Tested-by: Adam Cheney <acheney@nvidia.com> Reviewed-by: Robert Morell <rmorell@nvidia.com>
2012-03-08video: tegra: dc: Fix the race condition of one-shot work.Kevin Huang
Add lock to prevent race condition between cancellation of old delayed work and schedule of new delayed work. Bug 936337 Change-Id: I52df82e92279163841546127c72be9879ef810d0 Signed-off-by: Kevin Huang <kevinh@nvidia.com> Reviewed-on: http://git-master/r/86730 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-07mpu3050: remove warning for unassigned irqPritesh Raithatha
Bug 924470 Change-Id: I55310652512bf87ab5fc83479a18a4c685958884 Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Reviewed-on: http://git-master/r/88327 Reviewed-by: Varun Wadekar <vwadekar@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-03-07gpio: gpiolib: Support for open source/emitter gpiosLaxman Dewangan
Adding support for the open source gpio on which client can specify the open source property through GPIO flag GPIOF_OPEN_SOURCE at the time of gpio request. The open source pins are normally pulled low and it cannot be driven to output with value of 0 and so when client request for setting the pin to LOW, the gpio will be set to input direction to make pin in tristate and hence PULL-DOWN on pins will make the state to LOW. The open source pin can be driven to HIGH by setting output with value of 1. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> cherry-picked from mainline commit 25553ff0756c59b617af6bdd280c94e943164184 Change-Id: I3062a5dec7bf745b624d9a147f79d3830927325b Reviewed-on: http://git-master/r/88265 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com>
2012-03-07gpio: gpiolib: Support for open drain/collector gpiosLaxman Dewangan
Adding support for the open drain gpio on which client can specify the open drain property through GPIO flag GPIOF_OPEN_DRAIN at the time of gpio request. The open drain pins are normally pulled high and it cannot be driven to output with value of 1 and so when client request for setting the pin to HIGH, the gpio will be set to input direction to make pin in tristate and hence PULL-UP on pins will make the state to HIGH. The open drain pin can be driven to LOW by setting output with value of 0. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviwed-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Grant Likely <grant.likely@secretlab.ca> Cherry-picked from mainline aca5ce14eb773a75e5d935968b2e390dc5bd29c3 Change-Id: I097caebcc7cf6fb1497bb0395320dfc061bb6277 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/88264
2012-03-07video: tegra: host: convert kzalloc to vzallocDonghan Ryu
nvhost_job uses kzalloc to hold meta data. Convert it to vzalloc to avoid large physically contiguous allocations at runtime. Change-Id: I13d7e7d60e93354fcf69e5478437fa206b880dcc Signed-off-by: Donghan Ryu <dryu@nvidia.com> Reviewed-on: http://git-master/r/87967 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-07video: tegra: host: Set 3D pg timeout to 250msTerje Bergstrom
Power gating timeout for 3D is too short, and causes oscillation in non-idle use cases. Increase timeout to 250ms to get more benefits from power gating. Bug 914785 Change-Id: I4e37fda260ceecc2fe3e21989789105b7c8fcf36 Reviewed-on: http://git-master/r/87659 Tested-by: Terje Bergstrom <tbergstrom@nvidia.com> Reviewed-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-by: Ilan Aelion <iaelion@nvidia.com> Reviewed-by: Graziano Misuraca <gmisuraca@nvidia.com> Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2012-03-07crypto: tegra-aes: fix "syntax error" in licenseMarc Dietrich
Should have been "GPL v2", not "GPLv2". Signed-off-by: Marc Dietrich <marvin24@gmx.de> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Change-Id: I7b4669c023c48e1080de7f87ed7166dc9b47884a Reviewed-on: http://git-master/r/88101 Reviewed-by: Scott Williams <scwilliams@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Varun Wadekar <vwadekar@nvidia.com>
2012-03-07power: smb349: Enable OTG supportSyed Rafiuddin
Addition of OTG support in smb349 charger driver Change-Id: Ib38c9f4c06285ae07d93cfa3c6f5e1637aaa9460 Signed-off-by: Syed Rafiuddin <srafiuddin@nvidia.com> Reviewed-on: http://git-master/r/86936 Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-03-07ti-st: do not free skb in st_send_frame if receive call returns errorNagarjuna Kristam
In st_send_frame, do not free skb when recveive[hci_recv_frame] function call returns failure. Since, skb is already freed in hci_recv_frame on failure. Bug 946756 Bug 949028 Change-Id: I3ef9a77f408a6a5329a0817547e0c0e08ec45f87 Signed-off-by: Nagarjuna Kristam <nkristam@nvidia.com> Reviewed-on: http://git-master/r/87138 Reviewed-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-03-06cpufreq: ondemand: Prevent sysfs create racePeter Boonstoppel
Protecting sysfs_remove_group() in CPUFREQ_GOV_STOP with dbs_mutex Bug 946462 Signed-off-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-on: http://git-master/r/86426 (cherry picked from commit d1131158e2ad4d5ccc53b3008743c29385650d86) Change-Id: Iae810e83eaa6f0f7d970b56238cbcb61118af610 Reviewed-on: http://git-master/r/87392 Reviewed-by: Peter Boonstoppel <pboonstoppel@nvidia.com> Reviewed-by: Diwakar Tundlam <dtundlam@nvidia.com> Tested-by: Peter Boonstoppel <pboonstoppel@nvidia.com>
2012-03-06drivers: media: tegra: Fix compilation errorChao Xu
Change-Id: If3a7c3911add67ff9f9aecd3c2b933a8553747f3 Signed-off-by: Chao Xu <cxu@nvidia.com> Reviewed-on: http://git-master/r/87313 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-06video: tegra: dsi: fix DSI_PAD_CONTROL reg wr value on resumeBoris Suvorov
In panel resume path DSI_PAD_CONTROL value gets calibrated, however later on values are overwritten with bit settings for ulpm mode. refactor value for reg write to only change ulpm related bits. Change-Id: I9f9713bdf376c06b0e1b9f43b3e6c9f719bbd855 Signed-off-by: Boris Suvorov <bsuvorov@nvidia.com> Reviewed-on: http://git-master/r/85873 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-06mmc: tegra: Enable SDHCI_QUIRK_BROKEN_CARD_DETECTIONPavan Kunapuli
Enable quirk SDHCI_QUIRK_BROKEN_CARD_DETECTION. Also, implemented tegra_sdhci_get_cd() to return the card presence status. Bug 948943 Change-Id: I42eed23f951304e331a235f5a9199b70ba5e96b5 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/87766 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-06mmc: sdhci: Add get_cd callback in host opsPavan Kunapuli
Add get_cd callback in the host ops to get the card presence status incase SDHCI_QUIRK_BROKEN_ CARD_DETECTION is enabled. Bug 948943 Change-Id: I788d9e907920a0aeb79784751ec0df25bc2a72d6 Signed-off-by: Pavan Kunapuli <pkunapuli@nvidia.com> Reviewed-on: http://git-master/r/87765 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-06video: tegra: host: register nvhost master device in board-xxx-panel.cMayuresh Kulkarni
- the suspend order of devices is governed by the order in which devices are registered - this commit ensures that nvhost master is registered before any of the graphics devices - previously this was done in rootfs_init call which is later than arch_init calls of board-xxx-panel.c - this caused tegra-dc device to be registered *before* nvhost master device. as a result it was suspended *later* than nvhost master device. this is a clear violation of dependency rule for nvhost. this caused suspend-resume to fail for L4T - this worked on android as it has CONFIG early suspend enabled while it failed for L4T which doesn't have CONFIG early suspend enabled Bug 947617 Change-Id: I6cd405f3ba23d004e7659140019f5130e6c25159 Signed-off-by: Mayuresh Kulkarni <mkulkarni@nvidia.com> Reviewed-on: http://git-master/r/87756 Reviewed-by: Terje Bergstrom <tbergstrom@nvidia.com>
2012-03-06sdhci: Don't set highspeed modeHarry Hong
if SDHCI_QUIRK_NO_HISPD_BIT is set in host->quirks, don't set SDHCI_CTRL_HISPD in sdhci_host_control register. bug 929985 Signed-off-by: Harry Hong <hhong@nvidia.com> Reviewed-on: http://git-master/r/79933 (cherry picked from commit 194670660af90b2bb7bc0efea920332459296141) Change-Id: I7b5f58f5078886309610e9e4cc2bad83f0788168 Reviewed-on: http://git-master/r/87704 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-06drivers: wireless: bcm4329: set MMC_PM_KEEP_POWER on suspendRakesh Kumar
MMC_PM_KEEP_POWER should be set before each suspend/resume cycle as mmc drivers clears MMC_PM_KEEP_POWER from pm_flags on resume. Bug 942826 Change-Id: Ie11c661bdc3450cc4e75fa7700b96aedc69d628a Signed-off-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-on: http://git-master/r/87703 Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com> Tested-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-03-06Hack: mmc: explicitly invoking mmc_test probe from bus drvSachin Nikam
Bug 930113 Change-Id: I15fede503217152263905d8f7f56d3392e460e8a Signed-off-by: Sachin Nikam <snikam@nvidia.com> Reviewed-on: http://git-master/r/87241 Reviewed-by: Shridhar Rasal <srasal@nvidia.com> Tested-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com> Reviewed-by: Bharat Nihalani <bnihalani@nvidia.com>
2012-03-06mmc: enable mmc suspend/resume for sdio deviceOm Prakash Singh
Bug 942826 Change-Id: Ie782f17c51e78994e0fc96da3fbbe2e6592f58dc Signed-off-by: Rakesh Kumar <krakesh@nvidia.com> Reviewed-on: http://git-master/r/84697 Reviewed-by: Rakesh Goyal <rgoyal@nvidia.com> Tested-by: Rakesh Goyal <rgoyal@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-03-06mmc: mmc_test support to set ios parametersShridhar Rasal
support to change *ios* parameteres bug 930113 Change-Id: I469db49ec9e4ca533ba3be654455ae6b4b052d1c Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Reviewed-on: http://git-master/r/79238 Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-03-05arm : tegra : comm: AT command loss WARSeshendra Gadagottu
Workaround to avoid make cdc-acm susp_count to negative. Bug 935834 Change-Id: I251049537e21662de329f11ecbad0ce15abb1037 Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/84288 (cherry picked from commit d056c04d453bc641e856a61251e7d0aa2dcce73b) Reviewed-on: http://git-master/r/87505 Reviewed-by: Simone Willett <swillett@nvidia.com> Tested-by: Simone Willett <swillett@nvidia.com>
2012-03-05usb: cdc-acm: Add acm handle validity checkSeshendra Gadagottu
Added check for acm handle validity before doing any action in acm_suspend, acm_resume and acm_reset_resume functions. Bug 939237 Change-Id: Idc5d7db6bd405056a90b85009825ccbd03547757 Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/83413 (cherry picked from commit 1dd9736cd2df12c0315a44c95010cb64eee04050) Reviewed-on: http://git-master/r/87504 Reviewed-by: Steve Lin <stlin@nvidia.com>
2012-03-05mmc: tegra: Clear SPI_MODE_CLKEN_OVERRIDE bit by defaultHarry Hong
This bit should always be 0 according to TRM. Bug 929985 Signed-off-by: Harry Hong <hhong@nvidia.com> Reviewed-on: http://git-master/r/79975 (cherry picked from commit 9371d04b4f9d79f1e03e60120bf1bba28af77d4b) Change-Id: I225d6b5442f63809a77ce92d9cbd152dc4112ac4 Reviewed-on: http://git-master/r/87640 Reviewed-by: Pavan Kunapuli <pkunapuli@nvidia.com> Tested-by: Harry Hong <hhong@nvidia.com> Reviewed-by: Sachin Nikam <snikam@nvidia.com>
2012-03-05arm: tegra: xmm power state handlingSeshendra Gadagottu
Avoid unwanted xmm power state changes. Added missing spin_unlock_irqrestore. Bug 935834 Bug 938553 Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/82796 (cherry picked from commit 8af674aadfc1196851d5a2ecd1ecdd2cfe2d4148) Change-Id: Ic5b354376c0239773762d1b0f6e8848491e74e08 Reviewed-on: http://git-master/r/87503 Reviewed-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Tested-by: Seshendra Gadagottu <sgadagottu@nvidia.com> Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-03-05tegra: usb: host: Clean-up hsic device connection retriesSeshendra Gadagottu
usb_phy is handling conenction with hsic device. Removing hsic conenction re-tries logic from ehci_tegra. Bug 932606 Change-Id: I7bdea39966eb66d4cb8271d913c449dfa1ff4b2f Signed-off-by: Seshendra Gadagottu<sgadagottu@nvidia.com> Reviewed-on: http://git-master/r/82758 (cherry picked from commit 5e3c81372ffb2601cc9f078111b90aba03a7b1f0) Reviewed-on: http://git-master/r/87502 Reviewed-by: Venkat Moganty <vmoganty@nvidia.com>
2012-03-05video: tegra: dsi: Fix syncpt hang during early suspend cycleAnimesh Kishore
Fixing dsi syncpt hang issue after multiple cycles of early suspend-late resume. Bug 943096 Change-Id: Iefc0530a6e514b7733819dd1df35cde8f5c3dd47 Signed-off-by: Animesh Kishore <ankishore@nvidia.com> Reviewed-on: http://git-master/r/86946 Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com> Tested-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Kevin Huang (Eng-SW) <kevinh@nvidia.com>
2012-03-05regmap: Bypassing cache when initializing cacheLaxman Dewangan
During regcache_init, if client has not passed the default data of cached register then it is directly read from the hw to initialize cache. This hw register read happens before cache ops are initialized and hence avoiding register read to check for the data available on cache or not by enabling flag of cache_bypass. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit df00c79f78d8b0ad788daf689ea461ace9d0811f) Change-Id: I4398162bd6b12689c795afe5ee02397e975e456c Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87593
2012-03-05regmap: Fix cache defaults initialization from raw cache defaultsLars-Peter Clausen
Currently registers with a value of 0 are ignored when initializing the register defaults from raw defaults. This worked in the past, because registers without a explicit default were assumed to have a default value of 0. This was changed in commit b03622a8 ("regmap: Ensure rbtree syncs registers set to zero properly"). As a result registers, which have a raw default value of 0 are now assumed to have no default. This again can result in unnecessary writes when syncing the cache. It will also result in unnecessary reads for e.g. the first update operation. In the case where readback is not possible this will even let the update operation fail, if the register has not been written to before. So this patch removes the check. Instead it adds a check to ignore raw defaults for registers which are volatile, since those registers are not cached. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: stable@vger.kernel.org (cherry picked from commit 61cddc57dc14a5dffa0921d9a24fd68edbb374ac) Change-Id: Iccd58a95a432d222befd8b339fe0c6edd26666bb Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87592
2012-03-05regmap: add regmap_bulk_write() for register writeLaxman Dewangan
The bulk_write() supports the data transfer to multi register which takes the data into cpu_endianness format and does formatting of data to device format before sending to device. The transfer can be completed in single transfer or multiple transfer based on data formatting. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 8eaeb21925563075ae036c2e5ba8d041b70e18fa) Change-Id: Id97fbcfa0ed7d00d97dc3ab89fdb2b025850c9b1 Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87591
2012-03-05regmap: Support for caching in reg_raw_write()Laxman Dewangan
Adding support for caching of data into the non-volatile register from the call of reg_raw_write(). This will allow the larger block of data write into multiple register without worrying whether register is cached or not through reg_raw_write(). Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit c9157198417076c0c2664ba997e7b0217f61fcce) Change-Id: I6e6a96bc9e08ca9b7fe0f52a0a5692a4a61ef0ae Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87590
2012-03-05regmap: Fix kcalloc parameters swappedAxel Lin
The first parameter should be "number of elements" and the second parameter should be "element size". Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com> (cherry picked from commit 2a14d7d9b7439fe62082a60a7f8983ccb463d134) Change-Id: Ibe00000c7c6db1b36e5530e00713cdb434052f0a Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-on: http://git-master/r/87589
generated by cgit v1.2.3 (git 2.0.4) at 2024-05-28 22:18:28 +0000